在各种类型的集成电路中,由于模拟IC的工作状态与模拟器件的特性密切相关,因此它们更多地依赖于布局。 因此,优化布局的设计变得越来越重要。本文提出了几种优化布局设计方法,并使用这些方法设计了优化的LDO布局。 LDO稳压器的整个布局设计均使用Cadence的Virtuoso并采用0.35um特许CMOS工艺。
In various types of integrated circuits, the analog IC are more rely on the layout due to itsoperating state with a deep relation with the characteristics of analog device. Therefore, the design ofoptimized layout becomes more and more important .This paper presents several optimized layout designmethods and the optimized LDO layout was designed using these proposed methods. The whole layoutdesign of LDO regulator manually uses Cadence\'s Virtuoso and chartered 0.35um CMOS process.
推荐帖子
精选文集
热门活动
活动回顾
datasheet推荐 换一换
评论