提出了数字LDO,以向0.5V近阈值逻辑电路提供低噪声和可调电源电压。 由于由运算放大器反馈控制的常规LDO无法在0.5V下工作,因此数字LDO消除了所有模拟电路,并由数字电路控制,从而实现了0.5V工作。 在65μmCMOS上开发的数字LDO在200μA的负载电流下可达到0.5V的输入电压和0.45V的输出电压,电流效率为98.7%,静态电流为2.7μA。 输入电压和静态电流均为已发布LDO的最低值,这表明数字LDO在0.5V工作电压下具有良好的能效。
Digital LDO is proposed to provide the low noise andtunable power supply voltage to the 0.5-V near-threshold logiccircuits. Because the conventional LDO feedback-controlled bythe operational amplifier fail to operate at 0.5V, the digital LDOeliminates all analog circuits and is controlled by digital circuits,which enables the 0.5-V operation. The developed digital LDO in65nm CMOS achieved the 0.5-V input voltage and 0.45-V outputvoltage with 98.7% current efficiency and 2.7-μA quiescentcurrent at 200-μA load current. Both the input voltage and thequiescent current are the lowest values in the published LDO’s,which indicates the good energy efficiency of the digital LDO at0.5-V operation.
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