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TSMC18rf 说明手册

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  • 日期: 2018-11-02
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标签: TSMC18rf

TSMC18rf

TSMC18rf工艺库的说明文件

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tsmc Taiwan Semiconductor Manufacturing Co LTD SECURITY B TSMCRESTRICTED Change Description 1Added mismatch model of RF CMOS 2Added 18V33V PMOS model without DNW 3Added LCESD model 4Corrected the flicker noise discontinuity from Bsim3v32 to Bsim3v324 5 Simple model solution to resolve audio frequency design a Baseband MOS varactor model b Distributed resistor model 6Deleted Rub Csub and deep Nwell diode in the 7Changed the VerilogA to bsource format of mos resistor models varacto......

tsmc Taiwan Semiconductor Manufacturing Co., LTD SECURITY B TSMC-RESTRICTED Change Description 1.Added mismatch model of RF CMOS 2.Added 1.8V/3.3V PMOS model without DNW 3.Added LCESD model 4.Corrected the flicker noise discontinuity from Bsim3v3.2 to Bsim3v3.2.4 5. Simple model solution to resolve audio frequency design a. Baseband MOS varactor model b. Distributed resistor model 6.Deleted Rub, Csub and deep N-well diode in the 7.Changed the Verilog_A to bsource format of mos resistor models. varactor C-V model ECN No Author E030200436039 Y. J. Wang Ver Eff_Date 09-16-04 1.3 Revisor : Y J. Wang (SPICE) Revising Line Manager : Sally Liu Please refer EDW workflow to see detail approval records ! Signature on file in DC ! Title TSMC 0.18UM MIXED SIGNAL 1P6M SALICIDE 1.8V/3.3V RF SPICE MODELS Document No. : T-018-MM-SP-001 Contents Attach. Total File Format Review (Date & Sig.) : : 102 : 0 : 102 : W !!!! PLEASE RETURN OLD VERSION SPEC TO DC !!!! The information contained herein is the exclusive property of TSMC and shall not be distributed, copied, reproduced, or disclosed in whole or in part without prior written permission of TSMC. tsmc Taiwan Semiconductor Manufacturing Co., LTD SECURITY B TSMC-RESTRICTED Ver Eff_Date ECN No Author T. J. Yeh T. J. Yeh Change Description 3. Updated MIM capacitor model. a. MIM_Cap without shield for 1P6M b. 2D scalable model covers both square and rectangular c. Temperature and bias effect are covered 4. Updated inductor model.  lumped equivalent ckt with skin effect a. Octagonal shape b. 2- c. Model covers down to 200 pH d. Symmetric with and without center-tapped e. Scalable with radius and turns 5. Updated MOS varactor model. a. Thin and thick oxide models b. Scalable with group and finger numbers 6. Updated junction varactor model. a. Wider coverage of device width and finger numbers b. Device not in deep Nwell 7. Updated resistor model. a. P-type poly resistor only b. Scalable with length and width c. Small geometry 8. Deleted ESD model 1.Fixed 3.3V MOS typo in modelcard Corrected node name from D and S to DI and SI Fixed 3.3V MOS typo in modelcards Corrected node name from D and S to DI and SI. (A) 05-19-04 E030200420066 (B) 05-26-04 E030200422027 Title Document No. TSMC 0.18UM MIXED SIGNAL 1P6M SALICIDE 1.8V/3.3V RF SPICE MODELS : T-018-MM-SP-001 Review (Date & Sig.) : ! Signature on file in DC ! !!!! PLEASE RETURN OLD VERSION SPEC TO DC !!!! The information contained herein is the exclusive property of TSMC and shall not be distributed, copied, reproduced, or disclosed in whole or in part without prior written permission of TSMC. tsmc Taiwan Semiconductor Manufacturing Co., LTD SECURITY B TSMC-RESTRICTED ECN No F022916 E030200417016 Author Y. J. Wang T. J. Yeh 04-27-04 Ver Eff_Date 11-18-02 1.1 1.2 ! Signature on file in DC ! !!!! PLEASE RETURN OLD VERSION SPEC TO DC !!!! The information contained herein is the exclusive property of TSMC and shall not be distributed, copied, reproduced, or disclosed in whole or in part without prior written permission of TSMC. Change Description 1. Corrected 1.8V PMOS and 3.3V NMOS for consistency with mixed-signal model. 2. Corrected the frequency range of the CMOS noise model from < 1GHz to < 4GHz in page 3. 3. Corrected a typo of the TC1 of P+ poly w/o silicide resistor from (cid:150)1.38E-5 to (cid:150)1.38E-4 in this document and model cards 4. Added the sheet resistance of CTM in the resistance table in p.55. 5. Revised the interconnect model. 1. Global model features a. 4-terminal MOSFET and 3-terminal passive a. Cover temperature range from (cid:150)40 C to 125 C b. Cover different metal schemes from four metal layers to six metal layers. 2. Updated MOS model a. Fully scalable model (N, L, W) b. Added body effect modeling c. Minimum finger number down to 1 d. Capacitance model with capmod=3 e. 1/f noise with BSIM3 model (noimod=2) f. HF noise verification g. Real part and imaginary part Y-parameter fitting h. Model covers maximum power up to 0.21 Watts i. Monte Carlo statistical modeling j. Integrated consistent corner models for baseband and RF circuit applications TSMC 0.18UM MIXED SIGNAL 1P6M SALICIDE 1.8V/3.3V RF SPICE MODELS : T-018-MM-SP-001 Document No. Review (Date & Sig.) : Title tsmc Taiwan Semiconductor Manufacturing Co., LTD SECURITY B TSMC-RESTRICTED Rev 1.0 Date 03-05-02 ECN From F020408 Y. J. Wang ! Signature on file in DC ! Description 1.Correct typos in the model cards in V1.0p1: a: corrected diode parameters (cid:147) tpb (cid:148) to (cid:147) pta (cid:148) and (cid:147) tphp (cid:148) to (cid:147) ptp (cid:148) in the spectre model card. b: corrected corner model skew parameter (cid:147)nmos_dlfac(cid:148) and (cid:147)pmos_dlfac(cid:148) by exchanging the values of their FF and SS corner. 2. Deleted current-related parameters in the diode model of 1.8V/3.3V N/P MOS. 3. Added corner model in the 1.8V P+/Nw diode. 4. Modified node names in the model card for consistancy with the layout: c. changed node names of (cid:147)nd ng ns nb (cid:148) to (cid:147)D G S B(cid:148) respectively in the subcuit 1.8V/3.3V N/P MOS. b. changed node names of (cid:147)1 10 (cid:148) to (cid:147)Gate Bulk (cid:148) respectively in the subcircuit MOS varactor. c. changed node names of (cid:147)p1 p2 (cid:148) to (cid:147)Top Bottom (cid:148) respectively in the subcircuit MIM and spiral inductors. d. changed node names of (cid:147)n1 n2 (cid:148) to (cid:147)Hi Lo (cid:148) respectively in the subcircuit resistors. e. changed node names of (cid:147)p1 p2 (cid:148) to (cid:147)Anode Cathode (cid:148) respectively in the subcircuit junction varactor. 5. Simplified the model cards by including the library RF_MACRO in TT_RFMOS, FF_RFMOS and SS_RFMOS. Title TSMC 0.18UM MIXED SIGNAL 1P6M SALICIDE 1.8V/3.3V RF SPICE MODELS Document No. : T-018-MM-SP-001 Review (Date & Sig.) : !!!! PLEASE RETURN OLD VERSION SPEC TO DC !!!! The information contained herein is the exclusive property of TSMC and shall not be distributed, copied, reproduced, or disclosed in whole or in part without prior written permission of TSMC. tsmc Taiwan Semiconductor Manufacturing Co., LTD SECURITY B TSMC-RESTRICTED Rev 0.5 Date 07-23-01 ECN From F012807 Y. J. Wang ! Signature on file in DC ! Description 1. Added models for ADS V1.5 and later version 2. Added high frequency Noise Figure model with look-up table 3. Corrected error in Hspice and Spectre model of MOS varactor: change the controlling node in the equation of Cgate from external node -- ’Cgmin+dCg*(1.0+tanh((v(1,10)-dVgs)/Vgnorm))’ to internal node -- ’Cgmin+dCg*(1.0+tanh((v(4,5)- dVgs)/ Vgnorm ))’ 4. Updated N/P MOS model from Bsim3v3.1 to Bsim3v3.2. 5. Corrected typos in document: a. Add Rd and Rs in Fig 3.2. b. Change Cdb(fF/ m 2), Csb(fF/ m 2) to Djdb(F), Djsb(F) and correct the equation of their scaling rule in Table 3.1 and 3.3. c. Corrected varactor size of (cid:147)(0.2x2.....(cid:148) to (cid:147)(0.5x2.....(cid:148) in the caption of Figs. 8.19 (cid:150) 8.24 and Table 8.3, 8.4. d. Revised the statement of resistor model below the sheet resistance table to make it clearer. Title TSMC 0.18UM MIXED SIGNAL 1P6M SALICIDE 1.8V/3.3V RF SPICE MODELS Document No. : T-018-MM-SP-001 Review (Date & Sig.) : !!!! PLEASE RETURN OLD VERSION SPEC TO DC !!!! The information contained herein is the exclusive property of TSMC and shall not be distributed, copied, reproduced, or disclosed in whole or in part without prior written permission of TSMC.
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165465
不够完整。
2020-03-31 21:06:42回复
yehao20001
可以使用,找了好久
2019-11-27 12:54:39回复
designsun
可以使用,找了好久,多谢分享
2019-07-30 21:50:53回复
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