首页资源分类 > PCA9554_en

PCA9554_en

已有 453124个资源

下载专区

上传者其他资源

热门资源

本周本月全部

文档信息举报收藏

标    签: PCA9554

分    享:

文档简介

The PCA9554 and PCA9554A are 16-pin CMOS devices that

provide 8 bits of General Purpose parallel Input/Output (GPIO)

2

expansion for I C/SMBus applications and were developed to

enhance the Philips family of I C I/O expanders. The improvements

include higher drive capability, 5V I/O tolerance, lower supply

current, individual I/O configuration, 400 kHz clock frequency, and

smaller packaging. I/O expanders provide a simple solution when

additional I/O is needed for ACPI power switches, sensors,

pushbuttons, LEDs, fans, etc..

文档预览

INTEGRATED CIRCUITS PCA9554/PCA9554A 8-bit I2C and SMBus I/O port with interrupt Product data Supersedes data of 2002 May 13 2002 Jul 26 Philips Semiconductors Philips Semiconductors 8-bit I2C and SMBus I/O port with interrupt Product data PCA9554/PCA9554A FEATURES • Operating power supply voltage range of 2.3 to 5.5 V • 5 V tolerant I/Os • Polarity inversion register • Active low interrupt output • Low stand-by current • Noise filter on SCL/SDA inputs • No glitch on power-up • Internal power-on reset • 8 I/O pins which default to 8 inputs • 0 to 400 kHz clock frequency • ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per JESD22-A115 and 1000 V CDM per JESD22-C101 • Latch-up testing is done to JESDEC Standard JESD78 which exceeds 100 mA • Four packages offered: SO16, SSOP16, TSSOP16, and HVQFN16 DESCRIPTION The PCA9554 and PCA9554A are 16-pin CMOS devices that provide 8 bits of General Purpose parallel Input/Output (GPIO) expansion for I2C/SMBus applications and were developed to enhance the Philips family of I@C I/O expanders. The improvements include higher drive capability, 5V I/O tolerance, lower supply current, individual I/O configuration, 400 kHz clock frequency, and smaller packaging. I/O expanders provide a simple solution when additional I/O is needed for ACPI power switches, sensors, pushbuttons, LEDs, fans, etc.. The PCA9554/54A consist of an 8-bit Configuration register (Input or Output selection); 8-bit Input register, 8-bit Output register and an 8-bit Polarity inversion register (Active high or Active low operation). The system master can enable the I/Os as either inputs or outputs by writing to the I/O configuration bits. The data for each Input or Output is kept in the corresponding Input or Output register. The polarity of the read register can be inverted with the Polarity Inversion Register. All registers can be read by the system master. Although pin to pin and I2C address compatible with the PCF8574 series, software changes are required due to the enhancements and are discussed in Application Note AN469. The PCA9554/54A open-drain interrupt output is activated when any input state differs from its corresponding input port register state and is used to indicate to the system master that an input state has changed. The power-on reset sets the registers to their default values and initializes the device state machine. Three hardware pins (A0, A1, A2) vary the fixed I2C address and allow up to eight devices to share the same I2C/SMBus. The PCA9554A is identical to the PCA9554 except that the fixed I2C address is different allowing up to sixteen of these devices (eight of each) on the same I2C/SMBus. ORDERING INFORMATION PACKAGES TEMPERATURE RANGE ORDER CODE TOPSIDE MARK 16-Pin Plastic SO (wide) –40 to +85 °C PCA9554D PCA9554D 16-Pin Plastic SSOP –40 to +85 °C PCA9554DB 9554DB 16-Pin Plastic TSSOP –40 to +85 °C PCA9554PW 9554DH 16-Pin Plastic HVQFN –40 to +85 °C PCA9554BS 9554 16-Pin Plastic SO (wide) –40 to +85 °C PCA9554AD PCA9554AD 16-Pin Plastic SSOP –40 to +85 °C PCA9554ADB 9554A 16-Pin Plastic TSSOP –40 to +85 °C PCA9554APW 9554ADH 16-Pin Plastic HVQFN –40 to +85 °C PCA9554ABS 554A Standard packing quantities and other packaging data are available at www.philipslogic.com/packaging. I2C is a trademark of Philips Semiconductors Corporation. SMBus as specified by the Smart Battery System Implementers Forum is a derivative of the Philips I2C patent. DRAWING NUMBER SOT162-1 SOT338-1 SOT403-1 SOT629-1 SOT162-1 SOT338-1 SOT403-1 SOT629-1 2002 Jul 26 2 853-2243 28672 Philips Semiconductors 8-bit I2C and SMBus I/O port with interrupt Product data PCA9554/PCA9554A PIN CONFIGURATION — SO, SSOP, TSSOP A0 1 A1 2 A2 3 I/O0 4 I/O1 5 I/O2 6 I/O3 7 VSS 8 16 VDD 15 SDA 14 SCL 13 INT 12 I/O7 11 I/O6 10 I/O5 9 I/O4 su01410 Figure 1. Pin configuration — SO, SSOP, TSSOP PIN DESCRIPTION SO. SSOP, TSSOP PIN NUMBER HVQFN PIN NUMBER 1 15 2 16 3 1 4–7 2–5 8 6 9 7–10 13 11 14 12 15 13 16 14 BLOCK DIAGRAM SYMBOL A0 A1 A2 I/O0–3 VSS I/O4–7 INT SCL SDA VDD PIN CONFIGURATION — HVQFN A1 A0 VDD SDA 13 14 15 16 A2 1 I/O0 2 I/O1 3 I/O2 4 12 SCL 11 INT 10 I/O7 9 I/O6 8 7 6 5 I/O3 VSS I/O4 I/O5 TOP VIEW su01670 Figure 2. Pin Configuration — HVQFN FUNCTION Address input 0 Address input 1 Address input 2 I/O0 to I/O3 Supply ground I/O4 to I/O7 Interrupt output (open drain) Serial clock line Serial data line Supply voltage A0 A1 A2 SCL SDA VDD VSS INPUT FILTER POWER-ON RESET I2C/SMBUS CONTROL 8-BIT WRITE pulse INPUT/ OUTPUT PORTS READ pulse I/O0 I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7 VCC LP FILTER NOTE: ALL I/Os ARE SET TO INPUTS AT RESET Figure 3. Block diagram INT SU01411 2002 Jul 26 3 Philips Semiconductors 8-bit I2C and SMBus I/O port with interrupt Product data PCA9554/PCA9554A REGISTERS Command Byte Command Protocol Function 0 Read byte Input port register 1 Read/write byte Output port register 2 Read/write byte Polarity inversion register 3 Read/write byte Configuration register The command byte is the first byte to follow the address byte during a write transmission. It is used as a pointer to determine which of the following registers will be written or read. Register 0 – Input Port Register bit I7 I6 I5 I4 I3 I2 I1 I0 default 1 1 1 1 1 1 1 1 This register is a read only port. It reflects the incoming logic levels of the pins, regardless of whether the pin is defined as an input or an output by Register 3. Writes to this register have no effect. Register 1 – Output Port Register bit O7 O6 O5 O4 O3 O2 O1 O0 default 1 1 1 1 1 1 1 1 This register reflects the outgoing logic levels of the pins defined as outputs by Register 3. Bit values in this register have no effect on pins defined as inputs. Reads from this register return the value that is in the flip-flop controlling the output selection, NOT the actual pin value. Register 2 – Polarity Inversion Register bit N7 N6 N5 N4 N3 N2 N1 N0 default 0 0 0 0 0 0 0 0 This register allows the user to invert the polarity of the Input Port Register data. If a bit in this register is set (written with ‘1’), the corresponding Input Port data is inverted. If a bit in this register is cleared (written with a ‘0’), the Input Port data polarity is retained. Register 3 – Configuration Register bit C7 C6 C5 C4 C3 C2 C1 C0 default 1 1 1 1 1 1 1 1 This register configures the directions of the I/O pins. If a bit in this register is set, the corresponding port pin is enabled as an input with high impedance output driver. If a bit in this register is cleared, the corresponding port pin is enabled as an output. At reset, the I/Os are configured as inputs with a weak pull-up to VDD. Power-on Reset When power is applied to VDD, an internal power-on reset holds the PCA9554 in a reset state until VDD has reached VPOR. At that point, the reset condition is released and the PCA9554 registers and state machine will initialize to their default states. Interrupt Output The open-drain interrupt output is activated when one of the port pins change state and the pin is configured as an input. The interrupt is deactivated when the input returns to its previous state or the input port register is read. Note that changing an I/O from an output to an input may cause a false interrupt to occur if the state of the pin does not match the contents of the input port register. 2002 Jul 26 4 Philips Semiconductors 8-bit I2C and SMBus I/O port with interrupt Product data PCA9554/PCA9554A SIMPLIFIED SCHEMATIC OF I/O0 TO I/O7 DATA FROM SHIFT REGISTER DATA FROM SHIFT REGISTER WRITE CONFIGURATION PULSE WRITE PULSE CONFIGURATION REGISTER DQ FF CK Q DQ FF CK Q OUTPUT PORT REGISTER READ PULSE Q1 INPUT PORT REGISTER DQ FF CK Q 100 kΩ Q2 DATA FROM SHIFT REGISTER WRITE POLARITY PULSE DQ FF CK Q POLARITY INVERSION REGISTER NOTE: At Power-on Reset, all registers return to default values. Figure 4. Simplified schematic of I/O0 to I/O7 I/O port When an I/O is configured as an input, FETs Q1 and Q2 are off, creating a high impedance input with a weak pull-up (100 kΩ typ.) to VDD. The input voltage may be raised above VDD to a maximum of 5.5 V. If the I/O is configured as an output, then either Q1 or Q2 is enabled, depending on the state of the output port register. Care should be exercised if an external voltage is applied to an I/O configured as an output because of the low impedance paths that exist between the pin and either VDD or VSS. OUTPUT PORT REGISTER DATA VDD I/O0 TO I/O7 VSS INPUT PORT REGISTER DATA TO INT POLARITY REGISTER DATA SU01472 2002 Jul 26 5 Philips Semiconductors 8-bit I2C and SMBus I/O port with interrupt Product data PCA9554/PCA9554A Device address SLAVE ADDRESS 0 1 0 0 A2 A1 A0 R/W FIXED HARDWARE SELECTABLE su01669 Figure 5. PCA9554 address slave address 0 1 1 1 A2 A1 A0 R/W fixed programmable su01418 Figure 6. PCA9554A address Bus transactions Data is transmitted to the PCA9554/PCA9554A registers using the write mode as shown in Figures 7 and 8. Data is read from the PCA9554/PCA9554A registers using the read mode as shown in Figures 9 and 10. These devices do not implement an auto-increment function so once a command byte has been sent, the register which was addressed will continue to be accessed by reads until a new command byte has been sent. 1 2345 6 78 9 SCL slave address command byte data to port SDA S 0 1 0 0 A2 A1 A0 0 A 0 0 0 0 0 0 0 1 A start condition R/W acknowledge from slave acknowledge from slave WRITE TO PORT DATA 1 DATA OUT FROM PORT Figure 7. WRITE to output port register AP acknowledge from slave DATA 1 VALID tpv su01421 1 2345 6 78 9 SCL slave address command byte data to register SDA S 0 1 0 0 A2 A1 A0 0 A 0 0 0 0 0 0 1 1/0 A start condition DATA TO REGISTER R/W acknowledge from slave acknowledge from slave DATA Figure 8. WRITE to configuration or polarity inversion registers AP acknowledge from slave su01422 2002 Jul 26 6 Philips Semiconductors 8-bit I2C and SMBus I/O port with interrupt Product data PCA9554/PCA9554A slave address acknowledge from slave S 0 1 0 0 A2 A1 A0 0 A R/W acknowledge from slave slave address acknowledge from slave acknowledge data from register from master COMMAND BYTE A S 0 1 0 0 A2 A1 A0 1 A R/W at this moment master-transmitter becomes master-receiver and slave-receiver becomes slave-transmitter DATA A first byte data from register no acknowledge from master DATA last byte NA P Figure 9. READ from register su01424 SCL SDA READ FROM PORT DATA INTO PORT 1 2345 6 78 9 slave address data from port S 0 1 0 0 A2 A1 A0 1 A start condition R/W acknowledge from slave DATA 1 DATA 2 DATA 3 tph data from port A acknowledge from master DATA 4 NA P no acknowledge from master stop condition DATA 4 tps INT tiv tir NOTES: 1. This figure assumes the command byte has previously been programmed with 00h. 2. Transfer of data can be stopped at any moment by a stop condition. Figure 10. READ input port register su01465 2002 Jul 26 7 Philips Semiconductors 8-bit I2C and SMBus I/O port with interrupt Product data PCA9554/PCA9554A ABSOLUTE MAXIMUM RATINGS In accordance with the Absolute Maximum Rating System (IEC 134) SYMBOL PARAMETER VDD II VI/O II/O IDD ISS Ptot Tstg Tamb Supply voltage DC input current DC voltage on an I/O DC output current on an I/O Supply current Supply current Total power dissipation Storage temperature range Operating ambient temperature CONDITIONS MIN –0.5 — VSS – 0.5 — — — — –65 –40 MAX 6.0 ±20 5.5 ±50 85 100 200 +150 +85 UNIT V mA V mA mA mA mW °C °C 2002 Jul 26 8 Philips Semiconductors 8-bit I2C and SMBus I/O port with interrupt Product data PCA9554/PCA9554A HANDLING Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is desirable to take precautions appropriate to handling MOS devices. Advice can be found in Data Handbook IC24 under ”Handling MOS devices”. DC CHARACTERISTICS VDD = 2.3 to 5.5 V; VSS = 0 V; Tamb = –40 to +85 °C; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN TYP Supplies VDD Supply voltage IDD Supply current Istbl Standby current Istbh Standby current VPOR Power-on reset voltage input SCL; input/output SDA 2.3 Operating mode; VDD = 5.5 V; no load; fSCL = 100 kHz — Standby mode; VDD = 5.5 V; no load; VI = VSS; fSCL = 0 kHz; I/O = inputs — Standby mode; VDD = 5.5 V; no load; VI = VDD; fSCL = 0 kHz; I/O = inputs — No load; VI = VDD or VSS — — 104 550 0.25 1.5 VIL VIH IOL IL CI I/Os LOW level input voltage HIGH level input voltage LOW level output current Leakage current Input capacitance VOL = 0.4V VI = VDD = VSS VI = VSS –0.5 — 0.7 VDD — 3 — –1 — — 6 VIL LOW level input voltage VIH HIGH level input voltage IOL LOW level output current VOH HIGH level output voltage IIH Input leakage current IIL Input leakage current CI Input capacitance CO Output capacitance Interrupt INT VOL = 0.5 V; VDD = 2.3 V; Note 1 VOL = 0.7 V; VDD = 2.3 V; Note 1 VOL = 0.5 V; VDD = 4.5 V; Note 1 VOL = 0.7 V; VDD = 4.5 V; Note 1 VOL = 0.5 V; VDD = 3.0 V; Note 1 VOL = 0.7 V; VDD = 3.0 V; Note 1 IOH = –8 mA; VDD = 2.3 V; Note 2 IOH = –10 mA; VDD = 2.3 V; Note 2 IOH = –8 mA; VDD = 3.0 V; Note 2 IOH = –10 mA; VDD = 3.0 V; Note 2 IOH = –8 mA; VDD = 4.75 V; Note 2 IOH = –10 mA; VDD = 4.75 V; Note 2 VDD = 3.6 V; VI = VDD VDD = 5.5 V; VI = VSS –0.5 — 2.0 — 8 10 10 13 8 17 10 24 8 14 10 19 1.8 — 1.7 — 2.6 — 2.5 — 4.1 — 4.0 — — — — — — 3.7 — 3.7 IOL LOW level output current Select Inputs A0, A1, A2 VOL = 0.4 V 3 — VIL LOW level input voltage VIH HIGH level input voltage ILI Input leakage current NOTES: 1. The total current sunk by all I/Os must be limited to 100 mA. 2. The total current sourced by all I/Os must be limited to 85 mA. –0.5 — 2.0 — –1 — MAX UNIT 5.5 V 175 µA 700 µA 1 µA 1.65 V 0.3 VDD V 5.5 V — mA +1 µA 10 pF 0.8 V 5.5 V — mA — mA — mA — mA — mA — mA — V — V — V — V — V — V 1 µA –100 µA 5 pF 5 pF — mA 0.8 V 5.5 V 1 µA 2002 Jul 26 9 Philips Semiconductors 8-bit I2C and SMBus I/O port with interrupt Product data PCA9554/PCA9554A SDA tF SCL S tLOW tR tSU;DAT tF tHD;STA tHD;STA tHD;DAT tHIGH tSU;STA SR tSP tR tBUF tSU;STD P S Figure 11. Definition of timing SU01469 AC SPECIFICATIONS SYMBOL PARAMETER STANDARD MODE I2C BUS MIN MAX fSCL tBUF tHD;STA tSU;STA tSU;STO tHD;DAT tVD;ACK tVD;DAT tSU;DAT tLOW tHIGH tF tR tSP Operating frequency 0 Bus free time between STOP and START conditions 4.7 Hold time after (repeated) START condition 4.0 Repeated START condition setup time 4.7 Setup time for STOP condition 4.0 Data in hold time 0 Valid time for ACK condition2 0.3 Data out valid time3 300 Data setup time 250 Clock LOW period 4.7 Clock HIGH period 4.0 Clock/Data fall time — Clock/Data rise time — Pulse width of spikes that must be suppressed by the — input filters 100 — — — — — 3.45 — — — — 300 1000 50 Port Timing tPV Output data valid tPS Input data setup time tPH Input data hold time Interrupt Timing — 200 100 — 1 — tIV Interrupt valid tIR Interrupt reset — 4 — 4 NOTES: 1. Cb = total capacitance of one bus line in pF. 2. tVD;ACK = time for Acknowledgement signal from SCL low to SDA (out) low. 3. tVD;DAT = minimum time for SDA data out to be valid following SCL low. FAST MODE I2C BUS MIN MAX 0 400 1.3 — 0.6 — 0.6 — 0.6 — 0 — 0.1 0.9 50 — 100 — 1.3 — 0.6 — 20 + 0.1 Cb1 300 20 + 0.1 Cb1 300 — 50 — 200 100 — 1 — — 4 — 4 UNITS kHz µs µs µs µs ns µs ns ns µs µs ns ns ns ns ns µs µs µs 2002 Jul 26 10 Philips Semiconductors 8-bit I2C and SMBus I/O port with interrupt Product data PCA9554/PCA9554A SO16: plastic small outline package; 16 leads; body width 7.5 mm SOT162-1 2002 Jul 26 11 Philips Semiconductors 8-bit I2C and SMBus I/O port with interrupt Product data PCA9554/PCA9554A SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm SOT338-1 2002 Jul 26 12 Philips Semiconductors 8-bit I2C and SMBus I/O port with interrupt Product data PCA9554/PCA9554A TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 2002 Jul 26 13 Philips Semiconductors 8-bit I2C and SMBus I/O port with interrupt Product data PCA9554/PCA9554A HVQFN16: plastic heatsink very thin quad flat package; no leads; 16 terminals; body 4 x 4 x 0.85 mm SOT629-1 2002 Jul 26 14 Philips Semiconductors 8-bit I2C and SMBus I/O port with interrupt Product data PCA9554/PCA9554A Purchase of Philips I2C components conveys a license under the Philips’ I2C patent to use the components in the I2C system provided the system conforms to the I2C specifications defined by Philips. This specification can be ordered using the code 9398 393 40011. Data sheet status Data sheet status [1] Product status [2] Definitions Objective data Development This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. Product data Production This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Changes will be communicated according to the Customer Product/Process Change Notification (CPCN) procedure SNW-SQ-650A. [1] Please consult the most recently issued data sheet before initiating or completing a design. [2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com. © Koninklijke Philips Electronics N.V. 2002 All rights reserved. Printed in U.S.A. Document order number: Date of release: 07-02 9397 750 10163 Philips Semiconductors 2002 Jul 26 15

Top_arrow
回到顶部
EEWORLD下载中心所有资源均来自网友分享,如有侵权,请发送举报邮件到客服邮箱bbs_service@eeworld.com.cn 或通过站内短信息或QQ:273568022联系管理员 高进,我们会尽快处理。