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TL494, NCV494 SWITCHMODE™ Pulse Width Modulation Control Circuit The TL494 is a fixed frequency, pulse width modulation control circuit designed primarily for SWITCHMODE power supply control. • Complete Pulse Width Modulation Control Circuitry • On–Chip Oscillator with Master or Slave Operation • On–Chip Error Amplifiers • On–Chip 5.0 V Reference • Adjustable Deadtime Control • Uncommitted Output Transistors Rated to 500 mA Source or Sink • Output Control for Push–Pull or Single–Ended Operation • Undervoltage Lockout MAXIMUM RATINGS (Full operating ambient temperature range applies, unless otherwise noted.) Rating Symbol Power Supply Voltage Collector Output Voltage Collector Output Current (Each transistor) (Note 1) VCC VC1, VC2 IC1, IC2 Amplifier Input Voltage Range Power Dissipation @ TA ≤ 45°C Thermal Resistance, Junction–to–Ambient VIR PD RqJA Operating Junction Temperature TJ Storage Temperature Range Tstg Operating Ambient Temperature Range TA TL494B TL494C TL494I NCV494B Derating Ambient Temperature TA 1. Maximum thermal limits must be observed. Value 42 42 500 –0.3 to +42 1000 80 125 –55 to +125 –40 to +125 0 to +70 –40 to +85 –40 to +125 45 Unit V V mA V mW °C/W °C °C °C °C PIN CONNECTIONS Noninv Input 1 Inv Input 2 Compen/PWN Comp Input 3 Deadtime Control 4 CT 5 RT 6 Ground 7 + Error -Amp 1 ≈ 0.1 V + 2 Error Amp- VCC 5.0 V REF Oscillator Q2 16 Noninv Input 15 Inv Input 14 Vref 13 Output Contro l 12 VCC 11 C2 10 E2 C1 8 Q1 9 E1 (Top View) © Semiconductor Components Industries, LLC, 2002 1 April, 2002 – Rev. 4 16 1 http://onsemi.com SO–16 D SUFFIX CASE 751B MARKING DIAGRAMS 16 TL494xD AWLYWW 1 16 1 16 PDIP–16 N SUFFIX CASE 648 TL494xN * AWLYYWW 1 x = B, C or I A = Assembly Location WL, L = Wafer Lot YY, Y = Year WW, W = Work Week *This marking diagram also applies to NCV494. ORDERING INFORMATION Device TL494BD Package SO–16 Shipping 48 Units/Rail TL494BDR2 SO–16 2500 Tape & Reel TL494CD SO–16 48 Units/Rail TL494CDR2 SO–16 2500 Tape & Reel TL494CN PDIP–16 25 Units/Rail TL494IN PDIP–16 25 Units/Rail NCV494BDR2* SO–16 2500 Tape & Reel *NCV494: Tlow = –40°C, Thigh = +125°C. Guaranteed by design. NCV prefix is for automotive and other applications requiring site and change control. Publication Order Number: TL494/D TL494, NCV494 RECOMMENDED OPERATING CONDITIONS Characteristics Power Supply Voltage Collector Output Voltage Collector Output Current (Each transistor) Amplified Input Voltage Current Into Feedback Terminal Reference Output Current Timing Resistor Timing Capacitor Oscillator Frequency Symbol VCC VC1, VC2 IC1, IC2 Vin lfb lref RT CT fosc Min 7.0 – – –0.3 – – 1.8 0.0047 1.0 Typ 15 30 – – – – 30 0.001 40 Max Unit 40 V 40 V 200 mA VCC – 2.0 V 0.3 mA 10 mA 500 kW 10 mF 200 kHz ELECTRICAL CHARACTERISTICS (VCC = 15 V, CT = 0.01 mF, RT = 12 kW, unless otherwise noted.) For typical values TA = 25°C, for min/max values TA is the operating ambient temperature range that applies, unless otherwise noted. Characteristics Symbol Min Typ Max Unit REFERENCE SECTION Reference Voltage (IO = 1.0 mA) Line Regulation (VCC = 7.0 V to 40 V) Load Regulation (IO = 1.0 mA to 10 mA) Short Circuit Output Current (Vref = 0 V) OUTPUT SECTION Collector Off–State Current (VCC = 40 V, VCE = 40 V) Emitter Off–State Current VCC = 40 V, VC = 40 V, VE = 0 V) Collector–Emitter Saturation Voltage (Note 2) Common–Emitter (VE = 0 V, IC = 200 mA) Emitter–Follower (VC = 15 V, IE = –200 mA) Output Control Pin Current Low State (VOC v 0.4 V) High State (VOC = Vref) Output Voltage Rise Time Common–Emitter (See Figure 12) Emitter–Follower (See Figure 13) Vref 4.75 5.0 5.25 V Regline – 2.0 25 mV Regload – 3.0 15 mV ISC 15 35 75 mA IC(off) IE(off) Vsat(C) Vsat(E) IOCL IOCH tr – 2.0 100 mA – – –100 mA V – 1.1 1.3 – 1.5 2.5 – 10 – mA – 0.2 3.5 mA ns – 100 200 – 100 200 Output Voltage Fall Time Common–Emitter (See Figure 12) Emitter–Follower (See Figure 13) tf ns – 25 100 – 40 100 2. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient temperature as possible. http://onsemi.com 2 TL494, NCV494 ELECTRICAL CHARACTERISTICS (VCC = 15 V, CT = 0.01 mF, RT = 12 kW, unless otherwise noted.) For typical values TA = 25°C, for min/max values TA is the operating ambient temperature range that applies, unless otherwise noted. Characteristics Symbol Min Typ Max Unit ERROR AMPLIFIER SECTION Input Offset Voltage (VO (Pin 3) = 2.5 V) Input Offset Current (VO (Pin 3) = 2.5 V) Input Bias Current (VO (Pin 3) = 2.5 V) Input Common Mode Voltage Range (VCC = 40 V, TA = 25°C) Open Loop Voltage Gain (DVO = 3.0 V, VO = 0.5 V to 3.5 V, RL = 2.0 kW) Unity–Gain Crossover Frequency (VO = 0.5 V to 3.5 V, RL = 2.0 kW) Phase Margin at Unity–Gain (VO = 0.5 V to 3.5 V, RL = 2.0 kW) Common Mode Rejection Ratio (VCC = 40 V) Power Supply Rejection Ratio (DVCC = 33 V, VO = 2.5 V, RL = 2.0 kW) Output Sink Current (VO (Pin 3) = 0.7 V) Output Source Current (VO (Pin 3) = 3.5 V) PWM COMPARATOR SECTION (Test Circuit Figure 11) Input Threshold Voltage (Zero Duty Cycle) Input Sink Current (V(Pin 3) = 0.7 V) DEADTIME CONTROL SECTION (Test Circuit Figure 11) Input Bias Current (Pin 4) (VPin 4 = 0 V to 5.25 V) Maximum Duty Cycle, Each Output, Push–Pull Mode (VPin 4 = 0 V, CT = 0.01 mF, RT = 12 kW) (VPin 4 = 0 V, CT = 0.001 mF, RT = 30 kW) Input Threshold Voltage (Pin 4) (Zero Duty Cycle) (Maximum Duty Cycle) VIO IIO IIB VICR AVOL fC– fm CMRR PSRR IO– IO+ VTH II– IIB (DT) DCmax Vth – 2.0 10 mV – 5.0 250 nA – –0.1 –1.0 mA –0.3 to VCC–2.0 V 70 95 – dB – 350 – kHz – 65 – deg. 65 90 – dB – 100 – dB 0.3 0.7 – mA 2.0 –4.0 – mA – 2.5 4.5 V 0.3 0.7 – mA – –2.0 –10 mA % 45 48 50 – 45 50 V – 2.8 3.3 0 – – OSCILLATOR SECTION Frequency (CT = 0.001 mF, RT = 30 kW) Standard Deviation of Frequency* (CT = 0.001 mF, RT = 30 kW) Frequency Change with Voltage (VCC = 7.0 V to 40 V, TA = 25°C) Frequency Change with Temperature (DTA = Tlow to Thigh) (CT = 0.01 mF, RT = 12 kW) fosc – sfosc – Dfosc (DV) – Dfosc (DT) – UNDERVOLTAGE LOCKOUT SECTION Turn–On Threshold (VCC increasing, Iref = 1.0 mA) Vth 5.5 TOTAL DEVICE Standby Supply Current (Pin 6 at Vref, All other inputs and outputs open) ICC (VCC = 15 V) – (VCC = 40 V) – Average Supply Current (CT = 0.01 mF, RT = 12 kW, V(Pin 4) = 2.0 V) – (VCC = 15 V) (See Figure 12) 40 3.0 0.1 – 6.43 5.5 7.0 7.0 – kHz – % – % 12 % 7.0 V mA 10 15 mA – * Standard deviation is a measure of the statistical distribution about the mean as derived from the formula, s N S (Xn – X)2 n=1 N–1 http://onsemi.com 3 TL494, NCV494 6 RT 5 CT 4 Deadtime Control Oscillator 0.12V 0.7V 0.7mA + 1 - Deadtime Comparator + + PWM Comparator + 2 - Output Control 13 D Q FlipFlop Ck Q + 4.9V UV Lockout + 3.5V Reference Regulator 12 Error Amp 1 3 Feedback PWM Comparator Input 15 16 Error Amp 2 14 7 Gnd Ref. Output This device contains 46 active transistors. Figure 1. Representative Block Diagram VCC 8 Q1 9 Q2 11 10 12 VCC Capacitor CT Feedback/PWM Comp. Deadtime Control Flip-Flop Clock Input Flip-Flop Q Flip-Flop Q Output Q1 Emitter Output Q2 Emitter Output Control Figure 2. Timing Diagram http://onsemi.com 4 TL494, NCV494 APPLICATIONS INFORMATION Description The TL494 is a fixed–frequency pulse width modulation control circuit, incorporating the primary building blocks required for the control of a switching power supply. (See Figure 1.) An internal–linear sawtooth oscillator is frequency– programmable by two external components, RT and CT. The approximate oscillator frequency is determined by: fosc ≈ 1.1 RT • CT For more information refer to Figure 3. Output pulse width modulation is accomplished by comparison of the positive sawtooth waveform across capacitor CT to either of two control signals. The NOR gates, which drive output transistors Q1 and Q2, are enabled only when the flip–flop clock–input line is in its low state. This happens only during that portion of time when the sawtooth voltage is greater than the control signals. Therefore, an increase in control–signal amplitude causes a corresponding linear decrease of output pulse width. (Refer to the Timing Diagram shown in Figure 2.) The control signals are external inputs that can be fed into the deadtime control, the error amplifier inputs, or the feedback input. The deadtime control comparator has an effective 120 mV input offset which limits the minimum output deadtime to approximately the first 4% of the sawtooth–cycle time. This would result in a maximum duty cycle on a given output of 96% with the output control grounded, and 48% with it connected to the reference line. Additional deadtime may be imposed on the output by setting the deadtime–control input to a fixed voltage, ranging between 0 V to 3.3 V. common mode input range from –0.3 V to (VCC – 2V), and may be used to sense power–supply output voltage and current. The error–amplifier outputs are active high and are ORed together at the noninverting input of the pulse–width modulator comparator. With this configuration, the amplifier that demands minimum output on time, dominates control of the loop. When capacitor CT is discharged, a positive pulse is generated on the output of the deadtime comparator, which clocks the pulse–steering flip–flop and inhibits the output transistors, Q1 and Q2. With the output–control connected to the reference line, the pulse–steering flip–flop directs the modulated pulses to each of the two output transistors alternately for push–pull operation. The output frequency is equal to half that of the oscillator. Output drive can also be taken from Q1 or Q2, when single–ended operation with a maximum on–time of less than 50% is required. This is desirable when the output transformer has a ringback winding with a catch diode used for snubbing. When higher output–drive currents are required for single–ended operation, Q1 and Q2 may be connected in parallel, and the output–mode pin must be tied to ground to disable the flip–flop. The output frequency will now be equal to that of the oscillator. The TL494 has an internal 5.0 V reference capable of sourcing up to 10 mA of load current for external bias circuits. The reference has an internal accuracy of $5.0% with a typical thermal drift of less than 50 mV over an operating temperature range of 0° to 70°C. 500 k 100 k CT = 0.001 mF VCC = 15 V fosc , OSCILLATOR FREQUENCY (Hz) Input/Output Controls Grounded @ Vref Functional Table Output Function Single–ended PWM @ Q1 and Q2 Push–pull Operation fout fosc = 1.0 0.5 The pulse width modulator comparator provides a means for the error amplifiers to adjust the output pulse width from the maximum percent on–time, established by the deadtime control input, down to zero, as the voltage at the feedback pin varies from 0.5 V to 3.5 V. Both error amplifiers have a 0.01 mF 10 k 0.1 mF 1.0 k 500 1.0 k 2.0 k 5.0 k 10 k 20 k 50 k 100 k 200 k RT, TIMING RESISTANCE (W) 500 k 1.0 M Figure 3. Oscillator Frequency versus Timing Resistance http://onsemi.com 5 AVOL , OPEN LOOP VOLTAGE GAIN (dB) % DC, PERCENT DUTY CYCLE (EACH OUTPUT) TL494, NCV494 φ , EXCESS PHASE (DEGREES) % DT, PERCENT DEADTIME (EACH OUTPUT) 120 110 100 90 80 70 60 50 40 30 20 10 0 1.0 VCC = 15 V DVO = 3.0 V RL = 2.0 kW 0 AVOL 20 40 60 φ 80 100 120 140 160 180 10 100 1.0 k 10 k 100 k 1.0 M f, FREQUENCY (Hz) Figure 4. Open Loop Voltage Gain and Phase versus Frequency 20 18 16 14 CT = 0.001 mF 12 10 8.0 6.0 4.0 0.001 mF 2.0 0 500 k 1.0 k 10 k 100 k 500 k fosc, OSCILLATOR FREQUENCY (Hz) Figure 5. Percent Deadtime versus Oscillator Frequency 50 40 1 2 30 20 VCC = 15 V VOC = Vref ą1.ăCT = 0.01 mF ą2.ăRT = 10 kW ą2.ăCT = 0.001 mF ą2.ăRT = 30 kW 10 0 0 1.0 2.0 3.0 3.5 VDT, DEADTIME CONTROL VOLTAGE (IV) Figure 6. Percent Duty Cycle versus Deadtime Control Voltage 2.0 1.6 1.4 1.2 11..80 0.8 0.6 0.4 0 100 200 300 400 IC, COLLECTOR CURRENT (mA) Figure 8. Common–Emitter Configuration Output Saturation Voltage versus Collector Current I CC , SUPPLY CURRENT (mA) VCE(sat) , SATURATION VOLTAGE (V) 1.9 1.8 1.7 1.6 1.5 1.4 1.3 1.2 1.1 0 100 200 300 400 IE, EMITTER CURRENT (mA) Figure 7. Emitter–Follower Configuration Output Saturation Voltage versus Emitter Current 10 9.0 8.0 7.0 6.0 5.0 4.0 3.0 2.0 1.0 0 0 5.0 10 15 20 25 30 35 40 VCC, SUPPLY VOLTAGE (V) Figure 9. Standby Supply Current versus Supply Voltage VCE(sat), SATURATION VOLTAGE (V) http://onsemi.com 6 Vin Vref TL494, NCV494 Error Amplifier + Under Test - + - Other Error Amplifier Feedback Terminal (Pin 3) Test Inputs 50k VCC = 15V 150 150 2W 2W VCC Deadtime C1 Output 1 E1 Feedback RT C2 Output 2 CT E2 (+) (-) (+) Error (-) Output Control Ref Out Gnd Figure 10. Error–Amplifier Characteristics Each Output Transistor 15V C Q E RL 68 VC CL 15pF Figure 11. Deadtime and Feedback Control Circuit Each Output Transistor 15V C Q E RL 68 VEE CL 15pF 90% VCC 10% tr 90% 10% tf Figure 12. Common–Emitter Configuration Test Circuit and Waveform 90% 10% Gnd tr 90% VEE 10% tf Figure 13. Emitter–Follower Configuration Test Circuit and Waveform http://onsemi.com 7 TL494, NCV494 R1 Vref R2 VO To Output Voltage of System 1 + Error Amp 3 - 2 Positive Output Voltage VO = Vref ą1 + R1 R2 1 + Error Amp 2 Negative Output Voltage VO = Vref R1 R2 Vref R2 R1 VO To Output Voltage of System Figure 14. Error–Amplifier Sensing Techniques Output Control Output Q RT 6 30k Vref R1 4 DT CT R2 5 0.001 Output Q Vref CS 4 DT RS Max. % on Time, each output ≈ 45 - 80 1 + R1 R2 Figure 15. Deadtime Control Circuit Figure 16. Soft–Start Circuit Output Control 0 ≤ VOC ≤ 0.4 V C1 Q1 E1 Single-Ended C2 Q2 E2 QC 1.0 mA to 500 mA QE 2.4 V ≤ VOC ≤ Vref Output Control C1 Q1 E1 Push-Pull C2 Q2 E2 1.0 mA to 250 mA 1.0 mA to 250 mA Figure 17. Output Connections for Single–Ended and Push–Pull Configurations http://onsemi.com 8 TL494, NCV494 Vref 6 RT RT 5 CT CT Master Vref 6 RT 5 CT Slave (Additional Circuits) Figure 18. Slaving Two or More Control Circuits +Vin = 8.0V to 20V RS Vin > 40V VCC 12 1N975A VZ = 39V 5.0V Ref 270 Gnd 7 Figure 19. Operation with Vin > 40 V Using External Zener 1M 33k 0.01 0.01 12 1+ VCC 2- 3 Comp 15 - TL494 16 + OC VREF DT CT RT Gnd E1 E2 13 14 4 5 6 7 9 10 + 4.7k 4.7k 10 10k 0.001 15k C1 8 C2 11 47 T1 Tip 32 + Tip 50 32 25V 47 1N4934 +VO = 28 V IO = 0.2 A L1 1N4934 22 k + 50 35V 4.7k + 50 35V 1.0 240 All capacitors in mF Figure 20. Pulse Width Modulated Push–Pull Converter Test Line Regulation Load Regulation Output Ripple Short Circuit Current Efficiency Conditions Vin = 10 V to 40 V Vin = 28 V, IO = 1.0 mA to 1.0 A Vin = 28 V, IO = 1.0 A Vin = 28 V, RL = 0.1 W Vin = 28 V, IO = 1.0 A Results 14 mV 0.28% 3.0 mV 0.06% 65 mV pp P.A.R.D. 1.6 A 71% L1 - 3.5 mH @ 0.3 A T1 - Primary: 20T C.T. #28 AWG T1 - Secondary: 12OT C.T. #36 AWG T1 - Core: Ferroxcube 1408P-L00-3CB http://onsemi.com 9 +Vin = 10V to 40V TL494, NCV494 Tip 32A 47 150 47k 50 + 50V 12 VCC CT RT 5 6 8 11 C1 C2 TL494 D.T. O.C. Gnd E1 E2 4 13 7 9 10 0.1 Comp 3 -2 +1 Vref 14 - 15 + 16 0.001 47k 1.0M 5.1k 5.1k 150 1.0mH @ 2A +VO = 5.0 V IO = 1.0 A 5.1k MR850 500 + 10V + 50 10V 0.1 Figure 21. Pulse Width Modulated Step–Down Converter Test Line Regulation Load Regulation Output Ripple Short Circuit Current Efficiency Conditions Vin = 8.0 V to 40 V Vin = 12.6 V, IO = 0.2 mA to 200 mA Vin = 12.6 V, IO = 200 mA Vin = 12.6 V, RL = 0.1 W Vin = 12.6 V, IO = 200 mA Results 3.0 mV 0.01% 5.0 mV 0.02% 40 mV pp P.A.R.D. 250 mA 72% http://onsemi.com 10 TL494, NCV494 PACKAGE DIMENSIONS PDIP–16 N SUFFIX CASE 648–08 ISSUE R –A– 16 9 B 1 8 F C L S –T– SEATING PLANE H K J M G D 16 PL 0.25 (0.010) M T A M NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. INCHES MILLIMETERS DIM MIN MAX MIN MAX A 0.740 0.770 18.80 19.55 B 0.250 0.270 6.35 6.85 C 0.145 0.175 3.69 4.44 D 0.015 0.021 0.39 0.53 F 0.040 0.70 1.02 1.77 G 0.100 BSC 2.54 BSC H 0.050 BSC 1.27 BSC J 0.008 0.015 0.21 0.38 K 0.110 0.130 2.80 3.30 L 0.295 0.305 7.50 7.74 M 0_ 10_ 0 _ 10 _ S 0.020 0.040 0.51 1.01 SO–16 D SUFFIX CASE 751B–05 ISSUE J –A– 16 1 9 –B– P 8 PL 8 0.25 (0.010) M B S G –T– SEATING PLANE K C D 16 PL 0.25 (0.010) M T B S A S F R X 45_ M J NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. MILLIMETERS INCHES DIM MIN MAX MIN MAX A 9.80 10.00 0.386 0.393 B 3.80 4.00 0.150 0.157 C 1.35 1.75 0.054 0.068 D 0.35 0.49 0.014 0.019 F 0.40 1.25 0.016 0.049 G 1.27 BSC 0.050 BSC J 0.19 0.25 0.008 0.009 K 0.10 0.25 0.004 0.009 M 0_ 7_ 0_ 7_ P 5.80 6.20 0.229 0.244 R 0.25 0.50 0.010 0.019 http://onsemi.com 11 TL494, NCV494 SWITCHMODE is a trademark of Semiconductor Components Industries, LLC. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. PUBLICATION ORDERING INFORMATION Literature Fulfillment: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303–675–2175 or 800–344–3860 Toll Free USA/Canada Fax: 303–675–2176 or 800–344–3867 Toll Free USA/Canada Email: ONlit@hibbertco.com N. American Technical Support: 800–282–9855 Toll Free USA/Canada JAPAN: ON Semiconductor, Japan Customer Focus Center 4–32–1 Nishi–Gotanda, Shinagawa–ku, Tokyo, Japan 141–0031 Phone: 81–3–5740–2700 Email: r14525@onsemi.com ON Semiconductor Website: http://onsemi.com For additional information, please contact your local Sales Representative. http://onsemi.com 12 TL494/D

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