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BTS716G技术手册

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BTS716G的设计手册和技术资料

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BTS 716G Smart High-Side Power Switch Four Channels: 4 x 140mΩ Status Feedback Product Summary Package Operating Voltage On-state Resistance Nominal load current Current limitation Vbb 5.5 ...40V Active channels one four parallel RON IL(NOM) 140mΩ 2.6A 35mΩ 5.3A IL(SCr) 6.5A 6.5A P-DSO-20 General Description • N channel vertical power MOSFET with charge pump, ground referenced CMOS compatible input and diagnostic feedback, monolithically integrated in Smart SIPMOS technology. • Providing embedded protective functions Applications • µC compatible high-side power switch with diagnostic feedback for 12V and 24V grounded loads • All types of resistive, inductive and capacitve loads • Most suitable for loads with high inrush currents, so as lamps • Replaces electromechanical relays, fuses and discrete circuits Basic Functions • Very low standby current • CMOS compatible input • Improved electromagnetic compatibility (EMC) • Fast demagnetization of inductive loads • Stable behaviour at undervoltage • Wide operating voltage range • Logic ground independent from load ground Protection Functions • Short circuit protection • Overload protection • Current limitation • Thermal shutdown • Overvoltage protection (including load dump) with external resistor • Reverse battery protection with external resistor • Loss of ground and loss of Vbb protection • Electrostatic discharge protection (ESD) Diagnostic Function • Diagnostic feedback with open drain output • Open load detection in OFF-state • Feedback of thermal shutdown in ON-state Block Diagram Vbb IN1 ST1/2 IN2 Logic Channel 1 Channel 2 IN3 ST3/4 IN4 Logic Channel 3 Channel 4 GND Load 1 Load 2 Load 3 Load 4 Infineon Technologies AG 1 of 14 2003-Oct-01 Functional diagram overvoltage protection internal voltage supply logic gate control + charge pump current limit clamp for inductive load IN1 ESD temperature sensor Open load detection reverse battery protection . ST1/2 channel 1 IN2 GND1/2 control and protection circuit of channel 2 IN3 ST3/4 IN4 GND3/4 control and protection circuit of channel 3 control and protection circuit of channel 4 BTS 716G VBB OUT1 LOAD OUT2 OUT3 OUT4 Infineon Technologies AG 2 of 14 2003-Oct-01 BTS 716G Pin Definitions and Functions Pin 1,10, 11,12, 15,16, 19,20 3 5 7 9 18 17 14 13 4 8 2 6 Symbol Vbb IN1 IN2 IN3 IN4 OUT1 OUT2 OUT3 OUT4 ST1/2 ST3/4 GND1/2 GND3/4 Function Positive power supply voltage. Design the wiring for the simultaneous max. short circuit currents from channel 1 to 2 and also for low thermal resistance Input 1,2,3,4 activates channel 1,2,3,4 in case of logic high signal Output 1,2,3,4 protected high-side power output of channel 1,2,3,4. Design the wiring for the max. short circuit current Diagnostic feedback 1/2,3/4 of channel 1,2,3,4 open drain, low on failure Ground of chip 1 (channel 1,2) Ground of chip 2 (channel 3,4) Pin configuration (top view) Vbb GND1/2 IN1 ST1/2 IN2 GND3/4 IN3 ST3/4 IN4 Vbb 1• 2 3 4 5 6 7 8 9 10 20 Vbb 19 Vbb 18 OUT1 17 OUT2 16 Vbb 15 Vbb 14 OUT3 13 OUT4 12 Vbb 11 Vbb Infineon Technologies AG 3 of 14 2003-Oct-01 Maximum Ratings at Tj = 25°C unless otherwise specified Parameter Symbol Supply voltage (overvoltage protection see page 6) Supply voltage for full short circuit protection Tj,start = -40 ...+150°C Load current (Short-circuit current, see page 6) Load dump protection1) VLoadDump = VA + Vs, VA = 13.5 V RI2) = 2 Ω, td = 400 ms; IN = low or high, each channel loaded with RL = 13.5 Ω, Operating temperature range Storage temperature range Power dissipation (DC)4) (all channels active) Ta = 25°C: Ta = 85°C: Maximal switchable inductance, single pulse Vbb = 12V, Tj,start = 150°C4), see diagrams on page 10 IL = 2.3 A, EAS = 76 mJ, 0 Ω one channel: IL = 3.3 A, EAS = 182 mJ, 0 Ω two parallel channels: IL = 4.7 A, EAS = 460 mJ, 0 Ω four parallel channels: Electrostatic discharge capability (ESD) IN: (Human Body Model) ST: out to all other pins shorted: acc. MIL-STD883D, method 3015.7 and ESD assn. std. S5.1-1993 R=1.5kΩ; C=100pF Input voltage (DC) see internal circuit diagram page 9 Current through input pin (DC) Pulsed current through input pin5) Current through status pin (DC) Vbb Vbb IL VLoad dump3) Tj Tstg Ptot ZL VESD VIN IIN IIN IST BTS 716G Values Unit 43 V 36 V self-limited A 60 V -40 ...+150 °C -55 ...+150 3.6 W 1.9 21 mH 25 30 1.0 kV 4.0 8.0 -10 ... +16 V ±0.3 mA ±5.0 ±5.0 1) Supply voltages higher than Vbb(AZ) require an external current limit for the GND and status pins (a 150Ω resistor for the GND connection is recommended. 2) RI = internal resistance of the load dump test pulse generator 3) VLoad dump is setup without the DUT connected to the generator per ISO 7637-1 and DIN 40839 4) Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm2 (one layer, 70µm thick) copper area for Vbb connection. PCB is vertical without blown air. See page 14 5) only for testing Infineon Technologies AG 4 of 14 2003-Oct-01 Thermal Characteristics Parameter and Conditions Symbol Thermal resistance junction - soldering point6)7) junction – ambient6) @ 6 cm2 cooling area each channel: one channel active: all channels active: Rthjs Rthja Electrical Characteristics Parameter and Conditions, each of the four channels at Tj = -40...+150°C, Vbb = 12 V unless otherwise specified Symbol Load Switching Capabilities and Characteristics On-state resistance (Vbb to OUT); IL = 2 A each channel, Tj = 25°C: RON Tj = 150°C: two parallel channels, Tj = 25°C: four parallel channels, Tj = 25°C: see diagram, page 11 Nominal load current one channel active: IL(NOM) two parallel channels active: four parallel channels active: Device on PCB6), Ta = 85°C, Tj ≤ 150°C Output current while GND disconnected or pulled up8); IL(GNDhigh) Vbb = 32 V, VIN = 0, see diagram page 9 Turn-on time9) IN to 90% VOUT: ton Turn-off time IN to 10% VOUT: toff RL = 12 Ω Slew rate on 9) Slew rate off 9) 10 to 30% VOUT, RL = 12 Ω: dV/dton 70 to 40% VOUT, RL = 12 Ω: -dV/dtoff BTS 716G Values Unit min typ max -- -- 17 K/W -- -- -- -- 44 -- -- 35 -- Values Unit min typ max -- 110 140 mΩ -- 210 280 -- 55 70 -- 28 35 2.3 2.6 3.3 3.7 4.7 5.3 -- A --- -- -- 2 mA -- 100 250 µs -- 100 270 0.2 -- 1.0 V/µs 0.2 -- 1.1 V/µs 6) Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm2 (one layer, 70µm thick) copper area for Vbb connection. PCB is vertical without blown air. See page 14 7) Soldering point: upper side of solder edge of device pin 15. See page 14 8) not subject to production test, specified by design 9) See timing diagram on page 12. Infineon Technologies AG 5 of 14 2003-Oct-01 BTS 716G Parameter and Conditions, each of the four channels Symbol at Tj = -40...+150°C, Vbb = 12 V unless otherwise specified Operating Parameters Operating voltage Undervoltage switch off10) Tj =-40...25°C: Overvoltage protection12) I bb = 40 mA Standby current13) VIN = 0; see diagram page 11 Tj =125°C: Tj =-40°C...25°C: Tj =150°C: Tj =125°C: Off-State output current (included in Ibb(off)) VIN = 0; each channel Operating current 14), VIN = 5V, IGND = IGND1 + IGND2, one channel on: all channels on: Vbb(on) Vbb(u so) Vbb(AZ) Ibb(off) IL(off) IGND Protection Functions15) Current limit, Vout = 0V, (see timing diagrams, page 12) Tj =-40°C: Tj =25°C: Tj =+150°C: Repetitive short circuit current limit, Tj = Tjt each channel two,three or four parallel channels (see timing diagrams, page 12) Initial short circuit shutdown time Tj,start =25°C: Vout = 0V (see timing diagrams on page 12) Output clamp (inductive load switch off)16) at VON(CL) = Vbb - VOUT, IL= 40 mA Thermal overload trip temperature Thermal hysteresis IL(lim) IL(SCr) toff(SC) VON(CL) Tjt ∆Tjt Values Unit min typ max 5.5 -- 40 V -- -- 4.5 V -- -- 4.511) 41 47 52 V -- 9 16 µA -- -- 24 -- -- 1611) -- 1 5 µA -- 0.5 0.9 mA -- 1.9 3.3 -- -- -- 9 5 -- -- 6.5 -- 6.5 -- 2 41 47 150 -- -- 10 14 A --- -- A -- -- ms 52 V -- °C -- K 10) is the voltage, where the device doesn´t change it´s switching condition for 15ms after the supply voltage falling below the lower limit of Vbb(on) 11) not subject to production test, specified by design 12) Supply voltages higher than Vbb(AZ) require an external current limit for the GND and status pins (a 150Ω resistor for the GND connection is recommended). See also VON(CL) in table of protection functions and circuit diagram on page 9. 13) Measured with load; for the whole device; all channels off 14) Add IST, if IST > 0 15) Integrated protection functions are designed to prevent IC destruction under fault conditions described in the data sheet. Fault conditions are considered as "outside" normal operating range. Protection functions are not designed for continuous repetitive operation. 16) If channels are connected in parallel, output clamp is usually accomplished by the channel with the lowest VON(CL) Infineon Technologies AG 6 of 14 2003-Oct-01 BTS 716G Parameter and Conditions, each of the four channels Symbol at Tj = -40...+150°C, Vbb = 12 V unless otherwise specified Reverse Battery Reverse battery voltage 17) Drain-source diode voltage (Vout > Vbb) IL = - 2.0 A, Tj = +150°C -Vbb -VON Diagnostic Characteristics Open load detection voltage V OUT(OL)1 Values Unit min typ max -- -- -- 600 32 V -- mV 1.7 2.8 4.0 V Input and Status Feedback18) Input resistance (see circuit page 9) Input turn-on threshold voltage Input turn-off threshold voltage Input threshold hysteresis Status change after positive input slope19) with open load Status change after positive input slope19) with overload Status change after negative input slope with open load Status change after negative input slope19) with overtemperature Off state input current On state input current Status output (open drain) VIN = 0.4 V: VIN = 5 V: Zener limit voltage ST low voltage IST = +1.6 mA: IST = +1.6 mA: RI VIN(T+) VIN(T-) ∆ VIN(T) td(STon) td(STon) td(SToff) td(SToff) IIN(off) IIN(on) VST(high) VST(low) 2.5 4.0 6.0 kΩ -- -- 2.5 V 1.0 -- -- V -- 0.2 -- V -- 10 20 µs 30 -- -- µs -- -- 500 µs -- -- 20 µs 5 -- 20 µA 10 35 60 µA 5.4 -- -- V -- -- 0.6 17) Requires a 150 Ω resistor in GND connection. The reverse load current through the intrinsic drain-source diode has to be limited by the connected load. Power dissipation is higher compared to normal operating conditions due to the voltage drop across the drain-source diode. The temperature protection is not active during reverse current operation! Input and Status currents have to be limited (see max. ratings page 4 and circuit page 9). 18) If ground resistors RGND are used, add the voltage drop across these resistors. 19) not subject to production test, specified by design Infineon Technologies AG 7 of 14 2003-Oct-01 BTS 716G Truth Table Channel 1 and 2 Chip 1 IN1 IN2 OUT1 OUT2 Channel 3 and 4 Chip 2 IN3 IN4 OUT3 OUT4 (equivalent to channel 1 and 2) Normal operation L L L L L H L H H L H L H H H H Open load Channel 1 (3) L X Z X H X H X Channel 2 (4) X L X Z X H X H Overtemperature both channel L L L L X H L L H X L L Channel 1 (3) L X L X H X L X Channel 2 (4) X L X L X H X L ST1/2 ST3/4 H H H H L20) H L15) H H L L H L H L L = "Low" Level H = "High" Level X = don't care Z = high impedance, potential depends on external circuit Status signal valid after the time delay shown in the timing diagrams Parallel switching of channel 1 and 2 (also channel 3 and 4) is easily possible by connecting the inputs and outputs in parallel (see truth table). If switching channel 1 to 4 in parallel, the status outputs ST1/2 and ST3/4 have to be configured as a 'Wired OR' function with a single pull-up resistor. Terms Ibb Vbb I IN1 I IN2 I ST1/2 VIN1 VIN2 VST1/2 Leadframe 3 Vbb IN1 5 IN2 PROFET Chip 1 4 ST1/2 GND1/2 2 R GND1/2 OUT1 OUT2 IGND1/2 VON1 VON2 18 I L1 17 I L2 VOUT1 VOUT2 I IN3 I IN4 I ST3/4 VIN3 VIN4 VST3/4 Leadframe 7 Vbb IN3 9 IN4 PROFET Chip 2 8 ST3/4 GND3/4 6 R GND3/4 OUT3 OUT4 IGND3/4 VON3 VON4 14 I L3 13 I L4 VOUT3 V OUT4 Leadframe (Vbb) is connected to pin 1,10,11,12,15,16,19,20 External RGND optional; two resistors RGND1, RGND2 = 150 Ω or a single resistor RGND = 75 Ω for reverse battery protection up to the max. operating voltage. 20) L, if potential at the Output exceeds the OpenLoad detection voltage Infineon Technologies AG 8 of 14 2003-Oct-01 BTS 716G Input circuit (ESD protection), IN1 to IN4 IN RI ESD-ZD I II GND The use of ESD zener diodes as voltage clamp at DC conditions is not recommended. Status output, ST1/2 or ST3/4 +5V R ST(ON) ST Overvolt. and reverse batt. protection + 5V + Vbb R ST VZ2 IN R I Logic R ST ST VZ1 OUT R GND Signal GND GND R Load Load GND VZ1 = 6.1 V typ., VZ2 = 47 V typ., RGND = 150 Ω, RST= 15 kΩ, RI= 3.5 kΩ typ. In case of reverse battery the load current has to be limited by the load. Temperature protection is not active GND ESDZD Open-load detection, OUT1...4 OFF-state diagnostic condition: Open Load, if VOUT > 3 V typ.; IN low ESD-Zener diode: 6.1 V typ., max 0.3 mA; RST(ON) < 375 Ω at 1.6 mA. The use of ESD zener diodes as voltage clamp at DC conditions is not recommended. Vbb Inductive and overvoltage output clamp, OUT1...4 +Vbb VZ V ON OUT OFF Logic unit Open load detection Signal GND REXT VOUT GND disconnect Power GND VON clamped to VON(CL) = 47 V typ. Vbb VIN VST IN Vbb PROFET OUT ST GND VGND Infineon Technologies AG Any kind of load. In case of IN = high is VOUT ≈ VIN - VIN(T+). Due to VGND > 0, no VST = low signal available. 9 of 14 2003-Oct-01 BTS 716G GND disconnect with GND pull up IN Vbb PROFET OUT ST GND Vbb VIN VST VGND Any kind of load. If VGND > VIN - VIN(T+) device stays off Due to VGND > 0, no VST = low signal available. Vbb disconnect with energized inductive load Inductive load switch-off energy dissipation E bb E AS IN Vbb ELoad PROFET OUT = ST GND {L ZL EL ER RL Energy stored in load inductance: EL = 1/2·L·I2L While demagnetizing load inductance, the energy dissipated in PROFET is high IN Vbb PROFET OUT ST GND Vbb EAS= Ebb + EL - ER= VON(CL)·iL(t) dt, with an approximate solution for RL > 0 Ω: EAS= 2IL·R· LL(Vbb + |VOUT(CL)|) ln (1+ IL·RL |VOUT(CL)| ) Maximum allowable load inductance for a single switch off (one channel)4) L = f (IL ); Tj,start = 150°C, Vbb = 12 V, RL = 0 Ω For inductive load currents up to the limits defined by ZL (max. ratings and diagram on page 10) each switch is protected against loss of Vbb. Consider at your PCB layout that in the case of Vbb disconnection with energized inductive load all the load current flows through the GND connection. ZL [mH] 1000 100 10 Infineon Technologies AG 1 1 2 3 4 5 6 IL [A] 10 of 14 2003-Oct-01 Typ. on-state resistance RON = f (Vbb,Tj ); IL = 2 A, IN = high RON [mOhm] 240 Tj = 150°C 180 120 25°C -40°C 60 0 5 7 9 11 30 40 Vbb [V] Typ. standby current Ibb(off) = f (Tj ); Vbb = 9...34 V, IN1,2,3,4 = low Ibb(off) [µA] 45 40 35 30 25 20 15 10 5 0 -50 0 50 100 Infineon Technologies AG 150 200 Tj [°C] 11 of 14 BTS 716G 2003-Oct-01 BTS 716G Timing diagrams All channels are symmetric and consequently the diagrams are valid for channel 1 to channel 4 Figure 1a: Vbb turn on: IN1 IN2 Figure 2b: Switching a lamp: IN V bb V OUT1 V OUT2 ST V OUT ST1 open drain I L ST2 open drain t t Figure 2a: Switching a resistive load, turn-on/off time and slew rate definition: IN Figure 3a: Turn on into short circuit: shut down by overtemperature, restart by cooling IN1 other channel: normal operation VOUT 90% t on dV/dton 10% IL dV/dtoff toff I L1 I L(lim) I L(SCr) t off(SC) ST t t Heating up of the chip may require several milliseconds, depending on external conditions Infineon Technologies AG 12 of 14 2003-Oct-01 Figure 3b: Turn on into short circuit: shut down by overtemperature, restart by cooling (two parallel switched channels 1 and 2) IN1/2 IL1 + IL2 2xIL(lim) BTS 716G Figure 5a: Open load: detection in OFF-state, turn on/off to open load Open load of channel 1; other channels normal operation IN1 VOUT1 I L1 I L(SCr) toff(SC) ST1/2 t ST1 and ST2 have to be configured as a 'Wired OR' function ST1/2 with a single pull-up resistor. Figure 4a: Overtemperature: Reset if Tj

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