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DB120 参考板 AR9344 原理图

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    DB120 参考板 AR9344 原理图

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    5 4 3 2 1 DATE REVISION NUMBER INITIALS DESCRIPTION 6/8/2010 245-02042-010 SC INITIAL VERSION 1. 25MHz Xtal, 22pF Xtal caps 2. Updt GPIOx cfg strap changes 8/9/2010 245-02042-011 3. Rst cap = 0.01uF JaiW 4. RF changes: 2G C94,C64 NO Load C98,C61 = 1.2pF;C97,C60= 1.5pF;C99,C57=1.8pF,C100,C58=2.2nH, C101,C54=1.8pF; 5G: C59 is 1.8nH C106 is 1.8nH D C66, C67, C103, C104 =3.9pF D C68, C109 = 2.2pF L10,L19 = 1.8nH 8/9/2010 245-02042-012 Updt RF reworks for 5G: - 6 components noLOAD (3 per chain) C68, C59, L10 = noLOAD C109, C106,L19 =noLOAD JaiW - 8 components change (4 per chain) C67= 0ohms L11 =0.9nH C66=2.2pF C62=0.5pF C104=0 ohms L20 =0.8nH C103= 2.2pF C105=0.5pF 8/9/2010 9/17/2010 245-02042-013 245-02042-020 JaiW Jai,JK,SC Changed Sw Inductor L23 for lower DCR, higher rating Changed Ethernet switch to AR8327N - page 09,10 Changed VR2 reg for AR8316 to 3.3V optional for AR8327 Added separation for BB, SYNTH pins from main 1.2_RF and 3.3V_RF Added separation for 1.2V_USB from 1.2_PU and VDD33_USB from VDD33_AR9344 Added separation for VDD33_SWREG from VDD33_AR9344 Changed GPIO allocation Corrected cfg strap connections Added Page 13 - T/R Switch, Ant; Changed the RX2G match topology; C367,C406 = 8.2pF C C R295 = NL R397 = 10K R532 = 10K DS2, DS5 = load 10/27/2010 245-02042-021 Jai,JK,SC 2G TX: C101, C1xx = 1.2pF (was 1.8pF) 5G TX: Ch0: C67 = 0.6nH C68=0.2pF L11=0 5G TX: Ch1: AR9344 Pwr supply: Replaced all 22nH with 0 ohms. L11 - 0 Ohms C703 = 0.1uF DB120 11/12/2010 802.11 a/b/g/n DBDC (Dual Band Dual Concurrent) Dev Board BAR9344 + AR9380+ AR8327 4 LAN+1 WAN 10/100/1000 router 12/10/2010 12/19/2010 1/21/2011 A 5 2/10/2011 2/17/2011 4/05/2011 4/28/2011 ATHEROS CONFIDENTIAL PRELIMINARY 4 3 245-02042-022 Jai,JK,SC 2G: L51 NL AR8327: MDC R583 = 330E MDIO R565 =1K Pwr: C706 C704 C703 C707 C344 C376 C708 C705 C379 C380 = 0.1uF 5G: Ch-0 C62 - 1.8pF C66 - 1.2pF C67 - 0.6nH C68 - 0.2pF C721 - 2.2pF Ch-1 C103 - 1.2pF C105 - 1.5pF C104 - 1.2nH C109 - 0.2pF C734 - 2.2pF 1. Changed mem part to 64M for 128M total 2. LNA chain 0 changes C724 = 1.2pF R567 = 49.9ohm R605 = NL 245-02042-023 Jai/SC R609,R606 = 0 ohm; B 245-02042-030 Jai/SC 1. Added xPAs for 5G AR9344 2. Added PAs, LNAs for AR9380 3. Moved optional reg to 1.15V rail for AR8327 4. GPIO connections for boot_MDIO, MDC corrected 5. bufr option on MDC pullup opt to 3.3V on MDIO 245-02042-031 1. 40Mhz xtal sel R396 = 10K 2. MDC pullup R583 = 560E 3. 2G Tx match changed: Jai C94, C64= 0.3pF; C95,C96, C63, C65 = 6.8pF; C101, C54=1.5pF; 4. SWrst option R499 = NC For 2G Tx match: C97,C98,C60,C61 = 1.3pF SC C101,C54 = 1.0pF 245-02042-032 C99, C57 = 1.8pF VDD33_RF (for 5G flatness issue) R676 = 1.0nH VDD12_BB decoupling: C706=1000pF 245-02042-033 245-02042-040 245-02042-041 1. (spectral flatness) L11 = 1.5nH 0201 A Jai 2. (ch0 revert LNA to rec. values) R567 = 27E, C724 = 6.8pF 3. (DDR ck term change): R355,R356, R88, R89 = 0E R357, R87 = 100E Jai Correcting error for Ops. U5 VSSDL connected to GND. some silk text updt. Jai DDR2 Memory part updated for more effective BOM Atheros Communications, Inc 1700 Technology Drive San Jose, CA 95110 Date Thursday, July 07, 2011 Size C Rev ? 2 Title Title And Revision Sheet 1 of 15 DWG NO 245-02042-041 1 D C B +5V A 10/100/1000 WAN PORT 4 10/100/1000 ETHERNET PORTS 5 4 3 2 1 xMII Connector I2S USB dev USB host NAND FLASH UART EJTAG NOR FLASH 25MHz/ 40MHz XTAL RGMII AR8327 32bit DDR2 1.8V PNP 10/100 WAN PORT 4 10/100 ETHERNET PORTS AR9344 Option C PCIe RC PCIe EP Switch Control 5G_TX_0 Match PA 5G_RX_0 Match 2G_RX_0 Match DIPLEXER WBAND LNA 2G_TX_0 Match 5G_TX_1 Match PA 5G_RX_1 Match 2G_RX_1 Match DIPLEXER WBAND LNA 2G_TX_1 Match PCIe Connector PCIe CONNECTOR SP3T SWITCH SP3T SWITCH D Ant-0 C Ant-1 B LX 1.1V IND 1.1V VR3 VR1 3.3V VR 2.5V VR 1.2V AR9380 5G_TX_0 Match PA VR 1.2V 5G_RX_0 Match LNA 5G_TX_1 Match PA 5G_RX_1 Match LNA 5G Ant-0 5G Ant-1 5G_TX_2 Match PA 5G Ant-2 A 5G_RX_2 Match LNA SP2T SWITCH SP2T SWITCH SP2T SWITCH ATHEROS CONFIDENTIAL Atheros Communications, Inc 1700 Technology Drive San Jose, CA 95110 Date Saturday, April 30, 2011 Size C Rev ? Title Block Diagram Sheet 2 of 15 DWG NO 245-02042-041 5 4 3 2 1 5 4 3 2 1 VDD3p3 U4A 0 R587 R676 VDD33_RF U4J AR9344-W ASP-TEST VDD12_AR9344 AD26 AE19 AVDD12_SC Y25 VDD3p3V AD3 VDD33_AR9344 C752 0.1uF C751 0.01uF C380 C376 C819 1.0nH C111 B9 VDD25_AR9344 AE21 AVDD12_SC AVDD12_SC VDD33_LDO W26 VDD33_USB VDD33_USB +/-10% 6.3V +/-10% 10V 0.1uF +/-10% 0.1uF +/-10% 1uF +/-0.1NH +/-10% 10pF +/-5% {7} NAND_CE {7} NAND_READ_BUSY C10 NAND_CS_0 A9 NAND_RB_L_0 AD27 txn0 AE27 P0_TXP0_TX+ P0_TX- {11} AE22 B25 VDD33_RF_ 6.3V 6.3V 6.3V 50V {7} NAND_WE B10 NAND_WE_L txp0 P0_TX+ {11} AE24 AVDD25_SC VDD33_RF_PAD[0] G26 3.3V {7} NAND_RE C11 NAND_RE_L AF27 P0_RX- AC25 AVDD25_SC VDD33_RF_PAD[1] K25 VDD33_XTAL {7} NAND_ALE R92 A10 NAND_ALE rxn0 AG27 P0_RX+ P0_RX- {11} VDD12_RF 0 R354 C409 +/-10% 0.1uF 6.3V AVDDVCO C393 10uF 6.3V +/-20% D AD25 AA26 AB25 AE6 B8 C14 Y26 L25 U25 H2 AVDD25_SC AVDD25_SC DVDDVCO AVDD_VCO VDD25_bottom VDD25_top VDD25_top VDD25_reg VDD25_right VDD25_right VDD33_XTAL H25 VDD33_PLL C20 VDD33_SYNTH B21 VDD12_RF_PAD[0] C26 VDD12_RF_PAD[1] B18 VDD12_BB_PAD[0] F25 VDD12_BB_PAD[1] C18 VDD12_SYNTH C19 VDD12D_SYNTH VDD33_PLL VDD33_SYNTH VDD12_RF_ VDD12_BB VDD12_SYNTH C703 0.1uF C704 R679 R680 R681 VDD12_RF 0R +/-5%1/20W 0R +/-5%1/20W R677 R678 C379 0.1uF +/-10% 6.3V C344 0.1uF +/-10% 6.3V 0R +/-5%1/20W 0R +/-5%1/20W VDD33_RF C820 1uF 6.3V +/-10% C108 0 0.1uF +/-10% 6.3V 0R +/-5%1/20W VDD12_BB VDD12_RF_ {7} NAND_CLE {7} NAND_WP {7} NAND_IO7 {7} NAND_IO6 {7} NAND_IO5 {7} NAND_IO4 {7} NAND_IO3 {7} NAND_IO2 {7} NAND_IO1 {7} NAND_IO0 0 R475 B11 NAND_CLE NAND_WP_L C12 A11 NAND_DATA_IO_7 B12 NAND_DATA_IO_6 C13 NAND_DATA_IO_5 A12 NAND_DATA_IO_4 A13 NAND_DATA_IO_3 B13 NAND_DATA_IO_2 A14 NAND_DATA_IO_1 NAND_DATA_IO_0 rxp0 txn1 txp1 rxn1 rxp1 txn2 txp2 rxn2 AF25 AG25 AG26 AF26 AF24 AG24 AG23 AF23 P1_TXP1_TX+ P1_RXP1_RX+ P2_TXP2_TX+ P2_RXP2_RX+ P0_RX+ {11} P1_TX- {11} P1_TX+ {11} P1_RX- {11} P1_RX+ {11} P2_TX- {11} P2_TX+ {11} P2_RX- {11} D T2 VDD12CD_left P3 +/-10% 0.1uF C705 C706 C707 C708 ? +/-5% rxp2 P2_RX+ {11} VDD12_AR9344 C8 VDD12CD_left AE8 VDD12CD_top AE12 VDD12CD_bottom VDD_DDR F2 VDD_DDR K2 VDD_DDR V2 6.3V +/-10% 6.3V 0.1uF +/-10% 6.3V 1000pF +/-10% 25V 0.1uF +/-10% 6.3V 0.1uF 6.3V +/-10% {8} PCIE_EP_RST_L PCIE_REFCLK- AF12 PCIE_RST_L_IN AF18 AG22 rxn3 AF22 rxp3 P3_RXP3_RX+ P3_RX- {11} P3_RX+ {11} VDD12_AR9344 0 R385 VDD12_PCIe R25 VDD12CD_bottom P26 VDD12CD_right VDD12CD_right VDD_DDR AB2 VDD_DDR C6 VDD_DDR C4 VDD_DDR_AR9344 VDD33_AR9344 R588 0 1/8W PCIE_REFCLK+ PETN0 AG18 AF16 PCIE_CLKOUT_N PCIE_CLKOUT_P AG21 txn3 AF21 txp3 P3_TXP3_TX+ P3_TX- {11} P3_TX+ {11} VDD12_AR9344 VDD12_RF 0 0 C747 0.1uF +/-10% 6.3V R589 VDD12_U VDD12_PU R353 R138 0 1/8W +/-5% AVDD20 CTRL2P0 AE15 AE17 V26 G25 AD2 AA25 W25 VDD_DDR VDD12_PCIe VDD12_PCIe VDD33_SWREG_0 VDD12_PLL_USB VDD33_SWREG_1 VDD12_PLL SWREG_L_PAD CTRL_DDR_XPNP_PASDWREG_L_PAD VDD2p0 VREG_SWREG_FB AG1 AG2 VDD33_SW REG AF2 SW REG_L L23 AF3 AG3 SW REG_B22 SW REG_B22 2.2uH20% +/-5% C424 6.3V 10uF +/-10% R399 1 1/10W +/-5% R412 1 1/10W C423 10uF +/-10% 6.3V C601 0.01uF +/-10% 10V VDD12_U C753 0.1uF +/-10% 6.3V C754 0.01uF +/-10% 10V PETP0 PERN0 PERP0 AG16 AF17 AG17 PCIE_TX_N PCIE_TX_P PCIE_RX_N PCIE_RX_P txn4 txp4 rxn4 rxp4 AG20 AF20 AG19 AF19 E26 P4_TXP4_TX+ P4_RXP4_RX+ P4_TX- {11} P4_TX+ {11} P4_RX- {11} P4_RX+ {11} U4I C392 CTRL20 +/-5% B20 GND F26 W19 +/-10% 0.1uF AE20 GND GND H26 N1 GND V19 6.3V AR9344-W ASP-TEST C127 22uF AE23 GND GND J26 AF1 GND GND U19 VDD_DDR_CTRL_XPNP 6.3V +/-20% 10V C129 0.01uF U4B C25 GND E25 GND J25 GND GND AB26 GND AC26 C2 GND G2 GND U2 GND GND T19 GND R19 GND P19 P25 GND GND W2 GND GND N19 +/-10% C130 0.1uF W27 USB_DM USB_DM {7} V25 GND AE25 GND AE26 GND J27 AE2 GND G3 GND GND M19 GND L19 U4H R386 0 VDD12_INT +/-10% Y27 USB_DP USB_DP {7} B26 GND D26 GND GND L27 GND P27 J3 GND L3 GND GND K19 GND J19 +/-5% ? AB27 GND GND V27 AC3 GND GND B19 AF15 PCIE_RST_L_OUT PCIE_RST_L {5,8} rbias_pad R154 2.37K GND AA27 GND AC27 GND AE3 GND AG4 GND C5 GND GND AE18 GND W18 GND V18 R173 ? C7 GND GND U18 AG12 PCIE_EP_REFCLK_N 100K +/-1% PCIE_REFCLK-_PCIe_EP_CONN {8} L26 SYS_RST_L_OUT SYSRST SYS_RST_L {8,9,14} AE7 GND C9 GND GND T18 GND R18 AF13 PCIE_EP_REFCLK_P PCIE_REFCLK+_PCIe_EP_CONN {8} R29 W9 GND GND P18 0 V9 GND GND N18 AF14 PCIE_EP_RX_N PERN0_PCIE_EP_CONN {8} U4E AR9344-WASP-TEST U9 GND T9 GND GND M18 GND L18 AG15 PCIE_EP_RX_P PERP0_PCIE_EP_CONN {8} C AG14 PCIE_EP_TX_P PETP0_PCIE_EP_CONN {8} AG13 PCIE_EP_TX_N PETN0_PCIE_EP_CONN {8} Y1 DDR_BA_0 AA1 DDR_BA_1 A3 DDR_DQM_0 DDR_BA_0 {6} DDR_BA_1 {6} DDR_DQM_0 {6} ERX_EN ERX_CLK ERXD0 ERXD1 ERXD2 ERXD3 AG11 AF11 AG10 AF10 AG9 AF9 ERX_EN ERX_CLK ERXD0 ERXD1 ERXD2 ERXD3 {9,14} {9,14} {9,14} {9,14} {9,14} {9,14} C215 No Load DDR_DQM_1 DDR_DQM_2 DDR_DQM_3 DDR_DQS_0 DDR_DQS_1 DDR_DQS_2 DDR_DQS_3 G1 P2 AC2 B4 E1 N3 AB3 DDR_DQM_1 {6} DDR_DQM_2 {6} DDR_DQM_3 {6} DDR_DQS_0 {6} DDR_DQS_1 {6} DDR_DQS_2 {6} DDR_DQS_3 {6} AG8 E_TXEN R151 22 ETXEN ETX_EN {9,14} T1 DDR_WE_L DDR_WE_L {6} AF8 E_TXC R144 49.9 ETXCLK ETX_CLK ETX_CLK {9,14} U1 DDR_CAS_L DDR_CAS_L {6} AG7 E_TXD0 R150 22 ETXD0 ETXD0 {9,14} V1 DDR_RAS_L DDR_RAS_L {6} AF7 E_TXD1 R143 22 ETXD1 ETXD1 {9,14} W1 DDR_CS_L DDR_CS_L {6} AG6 E_TXD2 R149 22 ETXD2 ETXD2 {9,14} H1 DDR_CK_N DDR_CK_N {6} AF6 E_TXD3 R142 22 ETXD3 ETXD3 {9,14} J1 DDR_CK_P DDR_CK_P {6} EMDC EMDIO AE10 AE11 AR9344-WASP-TEST EMDC EMDIO R5{893,14} R688 {9,14} 560 +/-1% 1/16W 1K +/-5% 1/16W 3.3V 3.3V J2 DDR_CKE_L F1 DDR_VREF AR9344-WASP-TEST DDR_CKE {6} VDD_DDR_VREF U4C DDR_A_0 DDR_A_1 DDR_A_2 DDR_A_3 DDR_A_4 DDR_A_5 DDR_A_6 DDR_A_7 DDR_A_8 DDR_A_9 DDR_A_10 DDR_A_11 DDR_A_12 AB1 AC1 AD1 K1 R1 R2 P1 N2 M1 M2 AA2 L1 L2 AR9344-WASP-TEST DDR_ADDR_0 {6} DDR_ADDR_1 {6} DDR_ADDR_2 {6} DDR_ADDR_3 {6,7} DDR_ADDR_4 {6} DDR_ADDR_5 {6} DDR_ADDR_6 {6} DDR_ADDR_7 {6} DDR_ADDR_8 {6,7} DDR_ADDR_9 {6,7} DDR_ADDR_10 {6} DDR_ADDR_11 {6} DDR_ADDR_12 {6} U4D R9 GND P9 GND GND K18 GND J18 N9 GND GND W17 C A8 DDR_DATA_0 A7 DDR_DATA_1 A6 DDR_DATA_2 B7 DDR_DATA_3 B6 DDR_DATA_4 A5 DDR_DATA_5 A4 DDR_DATA_6 B5 DDR_DATA_7 A2 DDR_DATA_8 D1 DDR_DATA_9 D2 DDR_DATA_10 C1 DDR_DATA_11 B2 DDR_DATA_12 A1 DDR_DATA_13 B3 DDR_DATA_14 B1 DDR_DATA_15 M3 DDR_DATA_0 {6} DDR_DATA_1 {6} DDR_DATA_2 {6} DDR_DATA_3 {6} DDR_DATA_4 {6} DDR_DATA_5 {6} DDR_DATA_6 {6} DDR_DATA_7 {6} DDR_DATA_8 {6} DDR_DATA_9 {6} DDR_DATA_10 {6} DDR_DATA_11 {6} DDR_DATA_12 {6} DDR_DATA_13 {6} DDR_DATA_14 {6} DDR_DATA_15 {6} M9 L9 K9 J9 AE9 W10 V10 U10 T10 R10 P10 N10 M10 L10 K10 J10 W11 GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND V17 U17 T17 R17 P17 N17 M17 L17 K17 J17 C17 B17 A17 AE16 W16 V16 U16 DDR_DATA_16 E2 DDR_DATA_16 {6} V11 GND GND T16 DDR_DATA_17 K3 DDR_DATA_17 {6} U11 GND GND R16 DDR_DATA_18 H3 DDR_DATA_18 {6} T11 GND GND P16 DDR_DATA_19 F3 DDR_DATA_19 {6} R11 GND GND N16 DDR_DATA_20 E3 DDR_DATA_20 {6} P11 GND GND M16 DDR_DATA_21 D3 DDR_DATA_21 {6} N11 GND GND L16 DDR_DATA_22 C3 DDR_DATA_22 {6} M11 GND GND K16 DDR_DATA_23 Y2 DDR_DATA_23 {6} L11 GND GND J16 DDR_DATA_24 AA3 DDR_DATA_24 {6} K11 GND GND C16 DDR_DATA_25 Y3 DDR_DATA_25 {6} J11 GND GND W15 DDR_DATA_26 W3 DDR_DATA_26 {6} W12 GND GND V15 DDR_DATA_27 V3 DDR_DATA_27 {6} V12 GND GND U15 DDR_DATA_28 U3 DDR_DATA_28 {6} U12 GND GND T15 DDR_DATA_29 T3 DDR_DATA_29 {6} T12 GND GND R15 DDR_DATA_30 R3 DDR_DATA_30 {6} R12 GND GND P15 DDR_DATA_31 DDR_DATA_31 {6} P12 GND GND N15 N12 GND GND M15 AR9344-WASP-TEST M12 GND L12 GND GND L15 GND K15 K12 GND GND J15 J12 GND GND AE14 U4F AE13 GND W13 GND GND W14 GND V14 V13 GND GND U14 B AE4 GPIO0 GPIO_0 TCK {7} U13 GND GND T14 B T13 GND GND R14 AF4 GPIO_1 GPIO1 TDI {7} SILK TEXT: AR9380 PCIe R13 GND P13 GND GND P14 GND N14 GPIO_2 GPIO_3 GPIO_4 AE5 AF5 AG5 GPIO2 GPIO3 GPIO4 TDO TMS S17_INTn {7} {7} {8,9} place close to AR9344 PCIE_REFCLK- R141 +/-5% 0 1/16W PE_REFCLK- R148 0 R389 0 R147 PCIE_REFCLK-_AR9380 {5} PCIE_REFCLK-_PCIe_CONN {8} PNP TO GENERATE VDD_DDR N13 M13 L13 K13 J13 GND GND GND GND GND GND GND GND GND GND GND GND M14 L14 K14 J14 B14 U26 GPIO_5 GPIO5 SPI_CS_L {7} PCIE_REFCLK+ R140 +/-5% 0 1/16W PE_REFCLK+ 0 PCIE_REFCLK+_AR9380 {5} 3.3V AR9344-W ASP-TEST U27 GPIO_6 T27 GPIO_7 GPIO6 GPIO7 SPI_MO_SI {7,8} R388 R387 R390 0 PCIE_REFCLK+_PCIe_CONN {8} VDD_DDR VDD_DDR_PNP T26 GPIO_8 T25 GPIO_9 R27 GPIO_10 R26 GPIO_11 GPIO8 GPIO9 GPIO10 GPIO11 UART_SIN {7} UART_SOUT {7} USB_LED {8} No Load No Load PERN0 R153 0 PERN0_AR9380 PERN0_AR9380 {5} R393 0 PERN0_PCIe_Conn PERN0_PCIE_CONN {8} R152 0 PERP0_AR9380 PERP0_AR9380 {5} R394 R170 0 +/-5% 1/8W C126 0.1uF 10V +/-10% R139 No Load VDD_DDR_CTRL_XPNP PNP TO GENERATE AVDD_2.0V 3.3V 2 N27 GPIO_12 GPIO12 AR9344_5G_WLAN_LED {8} PERP0 0 PERP0_PCIe_Conn PERP0_PCIE_CONN {8} 2 N26 GPIO_13 N25 GPIO_14 M27 GPIO_15 M26 GPIO_16 M25 GPIO_17 B16 GPIO_18 C15 GPIO_19 A16 GPIO_20 A B15 GPIO_21 A15 GPIO_22 AR9344-WASP-TEST GPIO13 GPIO14 GPIO15 GPIO16 GPIO17 R607 No Load R608 GPIO18 ? GPIO19 GPIO20 GPIO21 GPIO22 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8 GPIO11 GPIO12 GPIO13 GPIO14 GPIO15 GPIO18 GPIO19 GPIO20 GPIO21 GPIO22 AR9344_2G_WLAN_LED {8} RDY_STATUS_LED {8} JUMP_START_LED {8} PETN0 JUMP_ST_SW {8} 0 SW RST {4,7,8,14} ? W AKE_EP {4,7,8,14} INTERNET_LED {7,8} PETP0 LED_LINK_1 {8} LED_LINK_2 {7,8} LED_LINK_3 W AKE_RC LED_LINK_4 {7,8} {7,8} {7,8} GPIO4 GPIO5 GPIO6 GPIO7 GPIO8 GPIO11 GPIO12 GPIO13 GPIO14 GPIO15 {8,9} {8,9} {7,8} {7,8} {7,8} {8} {8} {8} {8} {8} TO I2S/ SLIC GPIO18 GPIO19 GPIO20 GPIO21 GPIO22 {7,8} {8} {7,8} {7,8} {7,8} TO CFG STRAPs C131 0.1uF+/-10% 10V C132 0.1uF+/-10% 10V R145 0 PETN0_AR9380 PETN0_AR9380 {5} R392 0 R146 0 PETN0_PCIe_Conn PETP0_AR9380 R391 0 PETP0_PCIe_Conn PETN0_PCIE_CONN {8} PETP0_AR9380 {5} PETP0_PCIE_CONN {8} SILK TEXT: mPCIe conn GPIO4 No Load R669 ? ? GPIO17 No Load R670 ? ? GPIO7 No Load R559 ? ? GPIO6 No Load R560 ? ? GPIO6 R577 0 GPIO8 R578 0 GPIO4_DC {14} GPIO17_DIO {14} GPIO7_DC GPIO6_DIO SPI_CLK SPI_MI_SO {14} {14} {7,8} {7,8} MMBT2907A 1 MMBT2907A 1 Q2 VDD_DDR_AR9344 VDD_DDR_PNP Q3 3 3 R496 0 +/-5% 1/10W VDD_DDR_PNP C150 10uF +/-10% 6.3V C128 1uF 6.3V +/-10% ATHEROS CONFIDENTIAL PRELIMINARY AVDD20_T R410 0 +/-5% AVDD20 1/8W R411 MMBT2907A Q5 3 2 C452 0.1uF 10V +/-10% MMBT2907A 1 3 2 1 Q4 R174 10K CTRL2P0 R175 No Load 0 A +/-5% 1/8W C453 10uF +/-10% 6.3V C454 1uF 6.3V +/-10% Atheros Communications, Inc 1700 Technology Drive San Jose, CA 95110 Date Saturday, April 30, 2011 Size Custom Rev ? Title Sheet 3 AR9344 Digital Interface of 15 DWG NO 245-02042-041 5 4 3 2 1 5 4 3 2 1 TP8 1 TP9 1 TP6 1R687 510 1/20W +/-5% D TP7 1R686 510 1/20W +/-5% XPABIAS5_0 XPABIAS5_1 {13} AR9344_COM_A {13} AR9344_COM_B {13} AR9344_COM_C {13} AR9344_COM_D U4G A19 B22 RFIN2GP_0 XPABIAS2_0 A20 B23 RFIN2GN_0 XPABIAS2_1 A22 RFIN5GP_0 C21 A21 XPABIAS5_0 RFIN5GN_0 C22 XPABIAS5_1 A27 RFIN2GP_1 B27 RFIN2GN_1 D27 RFIN5GP_1 C27 RFIN5GN_1 D25 ANTA_PAD C24 A24 ANTB_PAD RFOUT2GP_0 B24 A23 ANTC_PAD RFOUT2GN_0 C23 A26 ANTD_PAD RFOUT5GP_0 A25 RFOUT5GN_0 RF5INP_0 RF5INN_0 RF5INP_1 RF5INN_1 RF5OUTP_0 RF5OUTN_0 RF2INP_0 RF2INN_0 RF2INP_1 RF2INN_1 RF2OUTP_0 RF2OUTN_0 F27 RFOUT2GP_1 RF2OUTP_1 {3,7,8,14} RST_B E27 RFOUT2GN_1 H27 RFOUT5GP_1 RF5OUTP_1 RF2OUTN_1 G27 RF5OUTN_1 RFOUT5GN_1 AE1 RESET_B A18 BIASREF R64 6.19K C Y1 +/-1% K27 40MHz-7M40000005 XTALO 1 3 K26 XTALI C748 VDD33_RF 0.1uF +/-10% 10V C338 10pF+/-5% 50V C336 10pF 50V +/-5% R340 0 +/-5% 1/16W R341 0 +/-5% 1/16W RF2OUTP_1 RF2OUTN_1 C95 6.8pF 50V +/-0.25PF C94 0.3pF +/-0.1PF 50V C96 6.8pF 50V +/-0.25PF L21 3.9nH C98 1.3pF +/-0.1NH 25V +/-0.1pF +/-0.1NH 3.9nH L18 C97 1.3pF 25V +/-0.1pF C100 2G_TX_1 2.2nH +/-0.1NH 2G_TX_1 C99 1.8pF 50V +/-0.25PF C101 1.0pF 50V +/-0.25PF VDD33_RF C749 0.1uF +/-10% 10V C315 +/-5% 50V 10pF C316 10pF 50V +/-5% {13} R333 0 +/-5% 1/16W R332 0 +/-5% 1/16W RF2OUTP_0 RF2OUTN_0 C65 6.8pF D 50V L9 +/-0.25PF 3.9nH C61 1.3pF +/-0.1NH 25V +/-0.1pF C64 0.3pF +/-0.1PF 50V C63 6.8pF 50V +/-0.25PF +/-0.1NH 3.9nH L8 C60 1.3pF 25V +/-0.1pF C58 2G_TX_0 2G_TX_0 {13} C57 1.8pF 50V +/-0.25PF 2.2nH +/-0.1NH C54 1.0pF 50V +/-0.25PF RF2INN_1 RF2INP_1 L12 No Load C35 8.2pF +/-0.25PF L52 1.0pF +/-0.25PF C79 50V No Load ? ? L51 No Load C36 8.2pF +/-0.25PF C75 2.0nH +/-01nH 2G_RX_1 2G_RX_1 {13} C69 No Load ? ? C51 8.2pF +/-0.25PF L54 RF2INN_0 1.0pF +/-0.25PF C80 50V L6 No Load No Load ? ? 2G_RX_0 2G_RX_0 {13} L53 No Load C46 RF2INP_0 No Load ? C48 C76 ? 8.2pF 2.0nH +/-0.25PF +/-01nH C 25MHz 1 2 Y2 AR9344-WASP-TEST C367 8.2pF 50V +/-0.25PF C406 8.2pF 50V +/-0.25PF VDD33_RF VDD33_RF Place on Place on BOT layer BOT layer C341 C340 C339 C337 2.2uF 2.2pF Traces 1 & 2 2.2uF 2.2pF Traces 1 & 2 6.3V 50V +/-0.25PF 1/4 Wavelength 6.3V 50V +/-0.25PF 1/4 Wavelength L20 +/-5% L11 RF5OUTP_1 C104 0R 1/20W RF5OUTP_0 C67 C109 C68 1.2nH 0.2pF 50V C106 R342 0 1 0.6nH 0.2pF 50V 1.5nH +/-0.1NH +/-0.1PF +/-0.1NH C59 No Load R345 0 1 +/-0.1NH +/-0.1PF No Load ? 5G_TXOUT_1 B ? 5G_TXOUT_0 ? ? 2 L10 R343 0 No Load C62 C66 1.2pF RF5OUTN_1 R344 0 2 L19 No Load C103 1.2pF 50V +/-0.25pF C105 RF5OUTN_0 50V +/-0.25pF RF5INP_0 RF5INN_0 C53 2.2pF 50V +/-0.25PF L5 1.8nH +/-0.1NH L7 No Load C50 0.5pF 25V +/-0.25pF C49 0.5pF 25V +/-0.25pF C52 2.2pF 50V +/-0.25PF L4 1.8nH +/-0.1NH 1.8pF 50V +/-0.25PF 5G_RX_0 C47 No Load ? ? 5G_RX_0 {13} RF5INP_1 RF5INN_1 C90 2.2pF 50V +/-0.25PF L17 1.8nH +/-0.1NH L16 No Load C91 0.5pF 25V +/-0.25pF C72 0.5pF 25V +/-0.25pF C70 2.2pF 50V +/-0.25PF L13 1.8nH +/-0.1NH 1.5pF 25V +/-.25pF 5G_RX_1 5G_RX_1 {13} C92 No Load ? ? A C773 10uF +/-20% 6.3V VDD33_RF R616 0 VDD33_RF C756 0.1uF +/-10% 6.3V R613 0 C757 +/-10% 1000pF 25V VDD33_RF R615 R614 0 No Load ? C758 0.1uF +/-10% C760 1000pF +/-10% 25V 6.3V U13 17 GND 16 VCC1 15 H/Lin 14 VPD 13 GND XPABIAS5_0 R617 22R +/-5% ? 2.2pF R618 +/-0.25PF 50V 5G_TXOUT_0 C759 10pF 50V +/-5% 1 VCC2 2 PAon 3 GND 4 TXin 12 HB 11 GND 10 GND 9 GND 2.2pF C761 +/-0.25PF 50V 5G_TX_0 C821 No Load ? ? 5G_TX_0 5 GND 6 GND 7 GND 8 GND R619 R620 No Load No Load B ?? ?? PA-SE5005L C774 10uF +/-20% 6.3V VDD33_RF R624 0 VDD33_RF C762 0.1uF +/-10% 6.3V R621 0 C763 +/-10% 1000pF 25V VDD33_RF R623 R622 0 No Load ? C764 0.1uF +/-10% C765 1000pF +/-10% 25V 6.3V U14 17 GND 16 VCC1 15 H/Lin 14 VPD 13 GND XPABIAS5_1 R625 22R +/-5% ? 2.2pF R626 +/-0.25PF 50V 5G_TXOUT_1 R627 No Load ?? C766 10pF 50V +/-5% R628 No Load ?? 1 VCC2 12 HB 2.2pF C767 +/-0.25PF 50V 5G_TX_1 5G_TX_1 2 PAon 11 GND C822 3 GND 10 GND No Load ? 4 9 ? TXin GND A 5 GND 6 GND 7 GND 8 GND PA-SE5005L ATHEROS CONFIDENTIAL PRELIMINARY Atheros Communications, Inc 1700 Technology Drive San Jose, CA 95110 Date Saturday, April 30, 2011 Size Custom Rev ? Title Sheet 4 Atheros RF Interface of 15 DWG NO 245-02042-041 5 4 3 2 1 5 4 U9D 39 EPRM_SDA 40 EPRM_SCLK CMODE0 26 CMODE0 CMODE1 25 CMODE1 PCIE_RST_L 81 RESET_B R247 58 GPIO12 No Load 59 GPIO13 D 61 GPIO14 62 GPIO15 63 GPIO16 R261 0R +/-5% ? 109 GNDPAD AR9380 41 GPIO0 42 GPIO1 43 GPIO2 44 GPIO3 45 GPIO4 46 GPIO5 47 GPIO6 48 GPIO7 49 GPIO8 50 GPIO9 56 GPIO10 57 GPIO11 AR9380_5G_WLAN_LED {8} TP10 1 TP13 1 TP14 1 1 TP11 1 TP12 1 TP15 ? +/-5% 0R R252 C226 No Load OGPIO11 R459 VDD33_AR9380 R458 No Load 10K +/-5% 1/20W Y3 1 3 C230 No Load C255 No Load U9A 78 XTALI 80 BIASREF 73 BT_CLKOUT 77 XTALO 64 CLKOBS 72 BT_CLK_EN AR9380 R281 6.19K +/-1% 1/20W VDD33_AR9380 C202 0.1uF PERP0 {3} PERP0_AR9380 6.3V +/-10% CMODE0 CMODE1 R253 No Load R254 No Load R433 No Load R432 No Load PERN0 {3} PERN0_AR9380 C203 0.1uF 6.3V +/-10% C200 No Load C {3} PETP0_AR9380 {3} PETN0_AR9380 PETP0 PETN0 R250 {3} PCIE_REFCLK+_AR9380 100K +/-1% {3} PCIE_REFCLK-_AR9380 ? REFCLK+ REFCLK- 1/20W 0R 0R 1/20W +/-5% R249 R251 +/-5% C201 No Load {3,8} PCIE_RST_L PCIE_RST_L VDD33_AR9380 R248 10K +/-5% 1.2V_A U9B 32 PCIE_TX_P 31 PCIE_TX_N 33 PCIE_RX_P 34 PCIE_RX_N 30 PCIE_REFCLK_P 29 PCIE_REFCLK_N 23 ~PCIE_W AKE_L 24 ~PCIE_CLKREQ_L 36 ~PCI_RST_L AR9380 C562 0.1uF +/-10% 6.3V C566 0.01uF +/-10% 10V C543 0.01uF +/-10% 10V C553 0.01uF +/-10% 10V +/-5% 50V 10pF C542 +/-5% 50V 10pF C548 +/-5% 50V 10pF C570 +/-5% 50V 10pF C561 1.2V_A U9E B R457 +/-5% N17224055 C552 0R ? 2 AVDD12 12 AVDD12 16 DVDD12 22 DVDD12 0.01uF 10V +/-10% N17379853 R461 0R 75 +/-5% ? 76 AVDD12 AVDD12 27 DVDD12 37 DVDD12 3.3V_A R460 +/-5% 91 AVDD12 54 DVDD12 C559 0R ? 0.01uF 95 AVDD12 55 DVDD12 C196 10V +/-10% C565 106 0.22uF 6.3V +/-20% 6 AVDD12 AVDD33 65 DVDD12 28 VDDP12 1uF 6.3V 74 AVDD33 35 VDDP12 +/-10% C197 2.2uF 6.3V C75022uF+/-20% 6.3V L24 4.7uH 79 AVDD33 85 AVDD33 96 AVDD33 100 AVDD33 21 DVDD33 38 DVDD33 51 DVDD33 60 DVDD33 1.2V_INT_AR9380 R246 SWREG_L/ 53 ~SW REG_L VDD33_AR9380 52 SW REG_VDD33 0R C199 2.2uF C198 2.2uF AR9380 +/-20% 6.3V 6.3V +/-20% VDD12_AR9380 VDD33_AR9380 VDD12_AR9380 C514 0.1uF +/-10% 6.3V C538 0.1uF +/-10% 6.3V C556 0.1uF +/-10% 6.3V C516 0.1uF +/-10% 6.3V C515 0.1uF +/-10% 6.3V C539 0.1uF +/-10% 6.3V A 3.3V_A +/-5% 50V 10pF C560 +/-5% 50V 10pF C573 +/-5% 50V 10pF C572 +/-5% 50V 10pF C569 +/-5% 50V 10pF C550 +/-5% 50V C545 10pF 0.1uF C544 +/-10% 6.3V C551 0.1uF +/-10% 6.3V C564 0.1uF +/-10% 6.3V C567 0.1uF +/-10% 6.3V C568 0.1uF +/-10% 6.3V C558 0.1uF +/-10% 6.3V 5 4 3 2 1 AR9380_RF5INP_0 AR9380_RF5INN_0 14 RF2INP_0 13 RF2INN_0 11 RF5INP_0 10 RF5INN_0 108 RF2INP_1 107 RF2INN_1 AR9380_RF5INP_1 105 RF5INP_1 AR9380_RF5INN_1 104 RF5INN_1 AR9380_RF5INP_2 AR9380_RF5INN_2 93 RF2INP_2 92 RF2INN_2 90 RF5INP_2 89 RF5INN_2 8 RF2OUTP_0 7 RF2OUTN_0 AR9380_RF5OUTP_0 5 RF5OUTP_0 AR9380_RF5OUTN_0 4 RF5OUTN_0 102 101 AR9380_RF5OUTN_1 99 AR9380_RF5OUTP_1 98 RF2OUTP_1 RF2OUTN_1 RF5OUTP_1 RF5OUTN_1 U9C 71 XPABIAS2_0 70 XPABIAS5_0 69 XPABIAS2_1 68 XPABIAS5_1 67 XPABIAS2_2 66 XPABIAS5_2 9 PABIASP_0 3 PABIASN_0 103 PABIASP_1 97 PABIASN_1 88 PABIASP_2 82 PABIASN_2 15 XLNABIAS_0 1 XLNABIAS_1 94 XLNABIAS_2 AR9380_XPABIAS5_0 AR9380_XPABIAS5_1 AR9380_XPABIAS5_2 3.3V_A AR9380_XLNABIAS5_0 AR9380_XLNABIAS5_1 AR9380_XLNABIAS5_2 C547 0.1uF +/-10% 6.3V C546 10pF +/-5% 50V C579 0.1uF +/-10% 6.3V C571 10pF +/-5% 50V C563 C549 0.1uF 10pF +/-10% +/-5% 6.3V 50V AR9380_RF5OUTP_0 C234 1.0pF 50V +/-0.25PF AR9380 Chain-0 5G C236 0.3pF 50V +/-0.1PF L31 2.0nH +/-01nH C246 0.3pF 50V +/-0.1PF AR9380_5G_TX_0 AR9380_RF5OUTN_0 L33 2.7nH D C233 1.0pF 50V +/-0.25PF C235 0.3pF 50V +/-0.1PF L32 +/-01nH 2.0nH C245 0.3pF 50V +/-0.1PF +/-0.1NH C248 0.5pF +/-0.1pF 50V AR9380_RF5INP_0 AR9380_RF5INN_0 C232 2.2pF 50V +/-0.25PF L29 1.8nH +/-0.1NH L26 No Load C241 0.5pF 25V +/-0.25pF C240 0.5pF 25V +/-0.25pF C231 2.2pF 50V +/-0.25PF L30 1.8nH +/-0.1NH C242 No Load ? ? AR9380_5G_RX_0 87 86 AR9380_RF5OUTP_2 84 AR9380_RF5OUTN_2 83 RF2OUTP_2 RF2OUTN_2 RF5OUTP_2 RF5OUTN_2 17 SW COM0 18 SW COM1 19 SW COM2 20 SW COM3 AR9380 AR9380_COM_A AR9380_COM_B AR9380_RF5OUTP_1 C266 1.0pF 50V +/-0.25PF C265 0.2pF 50V +/-0.1PF AR9380 Chain-1 5G L41 2.0nH +/-01nH C278 0.2pF 50V +/-0.1PF AR9380_5G_TX_1 C +/-5% 1/16W R268 J11 AR9380_RF5OUTN_1 L45 2.7nH AR9380_5G_TX_0_OUT AR9380_5G_RX_0_IN R262 No Load C243 2.2pF +/-0.25PF 50V R263 No Load S3 4 3 OUT1/TX OUT2/RX 6 IN 1 5 7 GND VCONT1 2 T-GND VCONT2 C247 3.3pF uPG2163T5N-TSON C244 3.3pF +/-0.25PF 50V 0 No Load L34 R267 CON RF 3PIN C249 3.3pF +/-0.25PF 50V No Load ? ? L48 1.5nH C288 0.5pF C289 No Load ANT3 1 IN 2 NC ANT-5GHz +/-5%R265 1/20W R264 0R TO 5G STAMPED ANTENNA AR9380_COM_A C268 1.0pF 50V +/-0.25PF C267 50V 0.2pF +/-0.1PF L42 2.0nH +/-01nH C279 0.2pF 50V +/-0.1PF AR9380_RF5INP_1 AR9380_RF5INN_1 C270 2.2pF 50V +/-0.25PF L44 1.8nH +/-0.1NH L28 No Load C274 0.5pF 25V +/-0.25pF C273 0.5pF 25V +/-0.25pF C280 No Load ? ? +/-0.1NH C277 0.5pF +/-0.1pF 50V AR9380_5G_RX_1 0R +/-5% 1/20W AR9380_COM_B C269 2.2pF 50V +/-0.25PF L43 1.8nH +/-0.1NH +/-5% 1/16W R300 J16 AR9380_5G_TX_1_OUT AR9380_5G_RX_1_IN R284 No Load C284 2.2pF +/-0.25PF 50V R288 No Load S5 4 3 OUT1/TX OUT2/RX 6 IN 1 5 7 GND VCONT1 2 T-GND VCONT2 C287 3.3pF uPG2163T5N-TSON C285 3.3pF +/-0.25PF 50V 0 No Load L47 R301 CON RF 3PIN C283 3.3pF +/-0.25PF 50V No Load ? ? L50 1.5nH C296 0.5pF C297 No Load ANT4 1 IN 2 NC ANT-5GHz +/-5%R287 1/20W R289 0R 0R +/-5% 1/20W +/-5% 1/16W R299 TO 5G STAMPED ANTENNA AR9380_COM_A AR9380_COM_B C295 J15 AR9380_RF5OUTP_2 C262 1.0pF 50V +/-0.25PF C261 0.2pF 50V +/-0.1PF AR9380 Chain-2 5G L38 2.0nH +/-01nH C275 0.2pF 50V +/-0.1PF B AR9380_5G_TX_2 AR9380_RF5OUTN_2 C257 1.0pF 50V +/-0.25PF C256 0.2pF 50V +/-0.1PF L36 C259 0.2pF 2.0nH 50V +/-0.1PF +/-01nH L37 2.7nH +/-0.1NH C258 0.5pF +/-0.1pF 50V AR9380_RF5INP_2 C264 2.2pF 50V +/-0.25PF AR9380_5G_TX_2_OUT AR9380_5G_RX_2_IN R283 No Load C281 2.2pF +/-0.25PF 50V R285 No Load 0 No Load 4 3 OUT1/TX OUT2/RX S4 6 IN C286 L46 3.3pF 1 5 7 GND VCONT1 2 T-GND VCONT2 uPG2163T5N-TSON C282 3.3pF +/-0.25PF 50V C260 3.3pF +/-0.25PF 50V 10pF R298 No Load ? ? L49 1.5nH CON RF 3PIN C293 0.5pF C294 No Load ANT5 1 IN 2 NC ANT-5GHz AR9380_RF5INN_2 L40 1.8nH +/-0.1NH L27 No Load C272 0.5pF 25V +/-0.25pF C271 0.5pF 25V +/-0.25pF C263 2.2pF 50V +/-0.25PF L39 1.8nH +/-0.1NH C276 No Load ? ? AR9380_5G_RX_2 A +/-5%R282 1/20W R286 0R 0R +/-5% 1/20W TO 5G STAMPED ANTENNA AR9380_COM_A AR9380_COM_B ATHEROS CONFIDENTIAL PRELIMINARY Atheros Communications, Inc 1700 Technology Drive San Jose, CA 95110 Date Saturday, April 30, 2011 Size Custom Rev ? Title AR9380 Interface Sheet 5 of 15 DWG NO 245-02042-041 3 2 1 5 D C B A 5 4 3 C777 No Load R635 10K R636 6.8 R639 56K R640 33R AR9380_XLNABIAS5_0 8 C781 100pF +/-10% 25V AR9380_5G_RX_0_IN C782 1.5pF C787 L83 C788 1.2pF 0.3pF +/-0.1PF 50V 0.6nH +/-0.1NH L81 6.8nH +/-3% 1 3 2 L80 1.6nH +/-0.1NH C784 1.5pF C786 L82 0.2pF 2.7nH +/-0.1NH Q9 TRA-BFR740L3RH AR9380_5G_RX_0 C791 No Load R648 10K R649 6.8 R651 56K R652 33R AR9380_XLNABIAS5_1 8 C795 100pF +/-10% 25V AR9380_5G_RX_1_IN C798 1.5pF C801 L87 C802 1.2pF 0.3pF +/-0.1PF 50V 0.6nH +/-0.1NH L84 6.8nH +/-3% 1 3 2 L85 1.6nH +/-0.1NH C799 1.5pF C800 L86 0.2pF 2.7nH +/-0.1NH Q10 TRA-BFR740L3RH AR9380_5G_RX_1 C805 No Load R660 10K R661 6.8 R663 56K R664 33R AR9380_XLNABIAS5_2 8 C809 100pF +/-10% 25V AR9380_5G_RX_2_IN C812 1.5pF C815 L91 C816 1.2pF 0.3pF +/-0.1PF 50V 0.6nH +/-0.1NH L88 6.8nH +/-3% 1 3 2 L89 1.6nH +/-0.1NH C813 1.5pF C814 L90 0.2pF 2.7nH +/-0.1NH Q11 TRA-BFR740L3RH AR9380_5G_RX_2 4 3 2 1 3.3V_A 3.3V_A 3.3V_A C776 0.1uF +/-10% 6.3V R633 0 R634 C775 0 10uF R637 R638 +/-20% 0 No Load 6.3V D C779 0.1uF +/-10% 6.3V C780 1000pF +/-10% 25V C778 +/-10% 1000pF 25V 17 GND 16 VCC1 15 H/Lin 14 VPD 13 GND AR9380_XPABIAS5_0 R64122R +/-5% ? C783 10pF 50V +/-5% AR9380_5G_TX_0 2.2pF R642 +/-0.25PF 50V R643 No Load ?? R644 No Load ?? U15 1 VCC2 2 PAon 3 GND 4 TXin 5 GND 6 GND 7 GND 8 GND 12 HB 11 GND 10 GND 9 GND PA-SE5005L C823 C7852.2pF +/-0.25PF 50V No Load ? ? AR9380_5G_TX_0_OUT 3.3V_A 3.3V_A 3.3V_A C790 0.1uF +/-10% 6.3V R645 0 R647 C789 0 10uF R646 R650 +/-20% 0 No Load C 6.3V C793 0.1uF +/-10% 6.3V C794 1000pF +/-10% 25V C792 +/-10% 1000pF 25V 17 GND 16 VCC1 15 H/Lin 14 VPD 13 GND AR9380_XPABIAS5_1 R65322R +/-5% ? C796 10pF 50V +/-5% AR9380_5G_TX_1 2.2pF R654 +/-0.25PF 50V R655 No Load ?? R656 No Load ?? U16 1 VCC2 2 PAon 3 GND 4 TXin 5 GND 6 GND 7 GND 8 GND 12 HB 11 GND 10 GND 9 GND PA-SE5005L C824 C7972.2pF +/-0.25PF 50V No Load ? ? AR9380_5G_TX_1_OUT 3.3V_A 3.3V_A 3.3V_A C804 0.1uF +/-10% 6.3V R657 0 R659 C803 0 10uF R658 R662 B +/-20% 0 No Load 6.3V C807 0.1uF +/-10% 6.3V C808 1000pF +/-10% 25V C806 +/-10% 1000pF 25V 17 GND 16 VCC1 15 H/Lin 14 VPD 13 GND AR9380_XPABIAS5_2 R66522R +/-5% ? C810 10pF 50V +/-5% AR9380_5G_TX_2 2.2pF R666 +/-0.25PF 50V R667 No Load ?? R668 No Load ?? U17 1 VCC2 2 PAon 3 GND 4 TXin 5 GND 6 GND 7 GND 8 GND 12 HB 11 GND 10 GND 9 GND PA-SE5005L C825 C8112.2pF +/-0.25PF 50V No Load ? ? AR9380_5G_TX_2_OUT A ATHEROS CONFIDENTIAL PRELIMINARY Atheros Communications, Inc 1700 Technology Drive San Jose, CA 95110 Date Saturday, April 30, 2011 Size C Rev ? 2 Title AR9380 RF Front end Sheet 6 of 15 DWG NO 245-02042-041 1 5 4 3 2 1 ADDR_0_16 ADDR_1_16 ADDR_2_16 ADDR_3_16 D ADDR_4_16 ADDR_5_16 ADDR_6_16 ADDR_7_16 ADDR_8_16 ADDR_9_16 ADDR_10_16 ADDR_11_16 ADDR_12_16 BA_0_16 BA_1_16 {3} DDR_CK_N {3} DDR_CK_P RAS_L_16 CAS_L_16 CS_L_16 {3} DDR_CKE WE_L_16 DQS_1 DQS_0 DQM_1 DQM_0 CK_N CK_P CKE_L R89 R88 R71 0 +/-5% 1/16W 0 +/-5% 1/16W CK_N_RES_16 CK_P_RES_16 optional term ? 22 CKE_L_RES_16 R87 100 +/-5% 1/16W C VDD_DDR DDR VREF R69 1K +/-1% VDD_DDR_VREF VDD_DDR_VREF ? R68 1K +/-1% ? C89 10uF +/-10% 6.3V R50 49.9 1/16W DQS_0 DQS_1 {3} DDR_DQM_1 +/-1% DQM_1 R51 49.9 1/16W {3} DDR_DQM_0 +/-1% R58 49.9 DQM_0 R346 No Load R347 No Load {3} DDR_DQS_0 {3} DDR_DQS_1 +/-1% R54 419/1.96W +/-1% 1/16W R44 49.9 DQS_0 DQS_1 {3} DDR_DATA_12 +/-1% DATA_12 R46 419/1.96W {3} DDR_DATA_13 +/-1% DATA_13 R45 14/91.96W {3} DDR_DATA_14 +/-1% DATA_14 R55 419/1.96W {3} DDR_DATA_15 +/-1% DATA_15 R53 14/91.96W {3} DDR_DATA_8 +/-1% R63 419/1.96W DATA_8 B {3} DDR_DATA_9 +/-1% DATA_9 R62 14/91.96W {3} DDR_DATA_10 +/-1% DATA_10 R60 14/91.96W {3} DDR_DATA_11 +/-1% DATA_11 R56 14/91.96W {3} DDR_DATA_4 +/-1% DATA_4 R61 14/91.96W {3} DDR_DATA_5 +/-1% R57 419/1.96W DATA_5 {3} DDR_DATA_6 +/-1% DATA_6 R59 14/91.96W {3} DDR_DATA_7 +/-1% DATA_7 R52 14/91.96W {3} DDR_DATA_0 +/-1% DATA_0 R49 419/1.96W {3} DDR_DATA_1 +/-1% DATA_1 R47 14/91.96W {3} DDR_DATA_2 +/-1% R48 419/1.96W DATA_2 {3} DDR_DATA_3 +/-1% DATA_3 1/16W U3 M8 M3 A0 M7 A1 N2 A2 N8 A3 N3 A4 N7 A5 P2 A6 P8 A7 P3 A8 M2 A9 P7 A10/AP R2 A11 A12 L2 L3 BA0 BA1 E8 A8 LDQS F7 UDQS B7 LDQS F3 UDQS B3 LDM K8 UDM J8 CK CK K7 L7 RAS CAS L8 K2 CS K3 CKE WE B2 H8 VSSQ H2 VSSQ A7 VSSQ B8 VSSQ D2 VSSQ D8 VSSQ E7 VSSQ F2 VSSQ F8 VSSQ VSSQ P9 N1 VSS J3 VSS E3 VSS A3 VSS VSS G8 DQ0 G2 DQ1 H7 DQ2 H3 DQ3 H1 DQ4 H9 DQ5 F1 DQ6 F9 DQ7 C8 DQ8 C2 DQ9 D7 DQ10 D3 DQ11 D1 DQ12 D9 DQ13 B1 DQ14 B9 DQ15 J2 VREF K9 ODT A9 VDDQ E9 VDDQ G1 VDDQ G9 VDDQ C9 VDDQ G7 VDDQ G3 VDDQ C7 VDDQ C3 VDDQ C1 VDDQ A1 VDD E1 VDD J9 VDD M9 VDD R1 VDD A2 NC E2 NC L1 NC R3 NC R7 NC R8 NC J1 VDDL J7 VSSDL SDRAM-DDR2-512MB ATHEROS CONFIDENTIAL A PRELIMINARY VDD_DDR DATA_5 DATA_2 DATA_6 DATA_0 DATA_1 DATA_7 DATA_3 DATA_4 VDD_DDR VDD_DDR DATA_10 DATA_13 DATA_8 DATA_15 DATA_14 DATA_9 DATA_12 DATA_11 VDD_DDR_VREF C172 1000pF +/-10% 50V C171 0.1uF +/-10% 10V C170 1uF 6.3V +/-10% {3} DDR_ADDR_0 {3} DDR_ADDR_1 {3} DDR_ADDR_2 {3,7} DDR_ADDR_3 {3} DDR_ADDR_4 {3} DDR_ADDR_5 {3} DDR_ADDR_6 {3} DDR_ADDR_7 {3,7} DDR_ADDR_8 {3,7} DDR_ADDR_9 {3} DDR_ADDR_10 {3} DDR_ADDR_11 {3} DDR_ADDR_12 R401 22 ADDR_0_32 R120 22 ADDR_0_16 ? ?R402 R118 22 ADDR_1_32 ? 22 ADDR_1_16 ? R400 22 ADDR_2_32 R119 22 ADDR_2_16 ? R3?59 22 ADDR_3_32 R70 22 ADDR_3_16 ? R369 22 ? ADDR_4_32 R79 22 ADDR_4_16 ? R367 22 ADDR_5_32 ? R80 22 ADDR_5_16 ? R364 22 ? ADDR_6_32 R76 22 ADDR_6_16 ? R366 22 ? ADDR_7_32 R75 22 ADDR_7_16 ? R362 22 ? ADDR_8_32 R72 22 ADDR_8_16 ? R365 22 ADDR_9_32 ? R77 22 ADDR_9_16 ? R374 22 ADDR_10_32 ? R84 22 ADDR_10_16 ? R363 22 ADDR_11_32 ? R73 22 ADDR_11_16 ? R361 22 ? ADDR_12_32 R74 22 ADDR_12_16 ? ? ADDR_0_32 ADDR_1_32 ADDR_2_32 ADDR_3_32 ADDR_4_32 ADDR_5_32 ADDR_6_32 ADDR_7_32 ADDR_8_32 ADDR_9_32 ADDR_10_32 ADDR_11_32 ADDR_12_32 BA_0_32 BA_1_32 {3} DDR_CK_N {3} DDR_CK_P {3} DDR_CKE CK_N CK_P RAS_L_32 CAS_L_32 CS_L_32 CKE_L WE_L_32 R356 R355 DQS_3 DQS_2 DQM_3 DQM_2 0 +/-5% 1/16W 0 +/-5% 1/16W CK_N_RES_32 CK_P_RES_32 optional term R360 22 ? CKE_L_RES_32 R357 100 +/-5% 1/16W DATA_21 DATA_18 DATA_22 DATA_16 DATA_17 DATA_23 DATA_19 DATA_20 U5 M8 M3 A0 M7 A1 N2 A2 N8 A3 N3 A4 N7 A5 P2 A6 P8 A7 P3 A8 M2 A9 P7 A10/AP R2 A11 A12 L2 L3 BA0 BA1 G8 DQ0 G2 DQ1 H7 DQ2 H3 DQ3 H1 DQ4 H9 DQ5 F1 DQ6 F9 DQ7 C8 DQ8 C2 DQ9 D7 DQ10 D3 DQ11 D1 DQ12 D9 DQ13 B1 DQ14 B9 DQ15 D VDD_DDR_VREF DATA_26 DATA_29 DATA_24 DATA_31 DATA_30 DATA_25 DATA_28 DATA_27 E8 A8 LDQS F7 UDQS B7 LDQS F3 UDQS B3 LDM K8 UDM J8 CK CK K7 L7 RAS CAS L8 K2 CS K3 CKE WE B2 H8 VSSQ H2 VSSQ A7 VSSQ B8 VSSQ D2 VSSQ D8 VSSQ E7 VSSQ F2 VSSQ F8 VSSQ VSSQ J2 VREF K9 ODT A9 VDDQ E9 VDDQ G1 VDDQ G9 VDDQ C9 VDDQ G7 VDDQ G3 VDDQ C7 VDDQ C3 VDDQ C1 VDDQ A1 VDD E1 VDD J9 VDD M9 VDD R1 VDD A2 NC E2 NC L1 NC R3 NC R7 NC R8 NC VDD_DDR C426 1000pF 50V +/-10% C175 0.1uF 10V +/-10% C174 1uF 6.3V +/-10% VDD_DDR P9 J1 C N1 VSS VDDL J7 J3 VSS VSSDL E3 VSS A3 VSS VSS SDRAM-DDR2-512MB {3} DDR_BA_0 {3} DDR_BA_1 {3} DDR_CS_L {3} DDR_RAS_L {3} DDR_CAS_L {3} DDR_WE_L R375 22 BA_0_32 R85 22 BA_0_16 ? R? 373 22 BA_1_32 R86 22 BA_1_16 ? R370 22 ? CS_L_32 R82 22 CS_L_16 ? R372 22 ? RAS_L_32 R81 22 RAS_L_16 ? R371 22 ? CAS_L_32 R83 22 CAS_L_16 ? R368 22 ? WE_L_32 R78 22 WE_L_16 ? ? DQS_2 DQS_3 R403 No Load R404 No Load R127 49.9 1/16W {3} DDR_DQM_3 +/-1% DQM_3 R128 49.9 1/16W {3} DDR_DQM_2 +/-1% R135 49.9 DQM_2 {3} DDR_DQS_2 {3} DDR_DQS_3 +/-1% R131 14/91.96W +/-1% DQS_2 DQS_3 1/16W R132 49.9 {3} DDR_DATA_31 +/-1% DATA_31 R122 419/1.96W {3} DDR_DATA_30 +/-1% DATA_30 R123 419/1.96W {3} DDR_DATA_29 +/-1% DATA_29 R121 14/91.96W {3} DDR_DATA_28 +/-1% DATA_28 R169 419/1.96W {3} DDR_DATA_27 +/-1% R167 14/91.96W DATA_27 {3} DDR_DATA_26 +/-1% DATA_26 R168 14/91.96W {3} DDR_DATA_25 +/-1% DATA_25 R130 419/1.96W {3} DDR_DATA_24 +/-1% DATA_24 R136 14/91.96W B {3} DDR_DATA_23 +/-1% DATA_23 R134 419/1.96W {3} DDR_DATA_22 +/-1% R137 14/91.96W DATA_22 {3} DDR_DATA_21 +/-1% DATA_21 R133 14/91.96W {3} DDR_DATA_20 +/-1% DATA_20 R125 419/1.96W {3} DDR_DATA_19 +/-1% DATA_19 R124 419/1.96W {3} DDR_DATA_18 +/-1% DATA_18 R126 419/1.96W {3} DDR_DATA_17 +/-1% R129 14/91.96W DATA_17 {3} DDR_DATA_16 +/-1% DATA_16 1/16W A C462 0.1uF +/-10% 10V C461 10pF ? ? C433 C427 0.1uF 0.1uF +/-10% +/-10% 10V 10V C428 C429 0.1uF 0.1uF +/-10% +/-10% 10V 10V C430 0.1uF +/-10% 10V C432 0.1uF +/-10% 10V C474 0.1uF C354 +/-10% 0.1uF 10V +/-10% 10V C355 0.1uF +/-10% 10V C473 0.1uF +/-10% 10V C472 0.1uF +/-10% 10V C471 0.1uF +/-10% 10V C470 0.1uF +/-10% 10V C438 0.1uF +/-10% 10V C436 0.1uF +/-10% 10V C437 0.1uF +/-10% 10V C464 0.1uF +/-10% 10V C463 10pF C460 1000pF 50V +/-10% C356 C434 C435 C358 C357 C359 C360 C361 C362 C363 C364 C352 C351 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF +/-10% +/-10% +/-10% +/-10% +/-10% +/-10% +/-10% +/-10% +/-10% +/-10% +/-10% +/-10% +/-10% 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V 10V C350 0.1uF +/-10% 10V 5 4 3 Atheros Communications, Inc 1700 Technology Drive San Jose, CA 95110 Date Saturday, April 30, 2011 Size Custom Rev ? 2 Title DDR2 Sheet 7 of 15 DWG NO 245-02042-041 1 5 4 3 2 1 CON-TH-M-V-2X7-100X100 J10 VDD25_AR9344_ R203 2 1 4 3 6 5 8 7 10 9 12 11 14 13 0 2X7 .1x.1" CENTERS C?176 0?.1uF EJTAG 10V D +/-10% HEADER TDI TDO TMS TCK R206 No Load ? ? TDI TDO TMS TCK RST_B {3} {3} R{230} 0 1{K3} {3,4,8,14} +/-5% 1/16W R201 R202 R204 10K +/-5% 1/16W 10K +/-5% 1/16W +/-5% 10K 1/16W TDI TMS TCK {3} UART_SIN R309 No Load ? ? R310 UART_SIN_HEADER 0 +/-5% 1/16W UART HEADER UART_SIN_HEADER {3} UART_SOUT 3.3V 3.3V 3.3V JP6 1 2 3 4 5 6 7 8 9 10 11 12 2X6 .1x.1" CENTERS CON-TH-M-V-2X6-100X100 C298 0.1uF 10V +/-10% C299 0.1uF 10V +/-10% SPI Flash -NOR VDD33 R674 1/16W 10K +/-5% {3} SPI_CS_L SPI_CS_L SPI_MI_SO_DEV U6 1 CE 2 SO 3 WP 4 GND 8 VCC 7 HOLD 6 SCLK 5 SI C113 0.1uF 10V +/-10% SPI_CLK SPI_CLK {3,8} SPI_MO_SI {3,8} D SST25VF032B-66 MHz {3,8} SPI_MI_SO R93 SPI_MI_SO_DEV 0 +/-5%1/16W R94 No Load ? ? VDD33 VDD33 USB C VDD5_USB J5 7 SHD 5 SHD 1 VCC 2 DATA- 3 DATA+ 4 GND 6 SHD 8 SHD KS-001V-ANW-L USB_M USB_P R40 No Load VDD5_USB R65 0 R66 0 R39 No Load C335 0.1uF 10V +/-10% C333 No Load C334 No Load USB_DM {3} USB_DP {3} VDD33 NAND Flash C10 0.1uF 10V +/-10% U2 12 VCC 37 VCC {3} NAND_CE {3} NAND_WE {3} NAND_RE {3} NAND_ALE {3} NAND_CLE {3} NAND_WP 9 CE 18 WE 8 RE 17 ALE 16 CLE 19 WP 1 2 NC 3 NC 4 NC 5 NC 6 NC 10 NC 11 NC 14 NC 15 NC 20 NC 21 NC 22 NC 23 NC 24 NC 25 NC 26 NC NC 29 IO0 30 IO1 31 IO2 32 IO3 41 IO4 42 IO5 43 IO6 44 IO7 NAND_IO0_DEV NAND_IO1_DEV NAND_IO2_DEV NAND_IO3_DEV NAND_IO4_DEV NAND_IO5_DEV NAND_IO6_DEV NAND_IO7_DEV 7 R/B 48 NC 47 NC 46 NC 45 NC 40 NC 39 NC 38 NC 35 NC 34 NC 33 NC 28 NC 27 NC 36 VSS 13 VSS HY27US08-128Mx8bit C9 0.1uF 10V +/-10% VDD25_AR9344_ R325 10K +/-5% 1/16W NAND_READ_BUSY {3} B J4 1 VCC 3 DATA+ 2 DATA- 4 GND 5 MH1 6 MH2 CON USB-B USB_DEV_P USB_DEV_N R339 R338 No Load ? No Load ? ? USB_P USB_M MOUNT FOR USB DEVICE MODE A {3} NAND_IO0 {3} NAND_IO1 {3} NAND_IO2 R10 NAND_IO0_DEV 0 +/-5% R8 1/16W No Load ? ? R9 NAND_IO1_DEV 0 +/-5% R7 1/16W No Load ? ? R14 NAND_IO2_DEV 0 +/-5% R12 1/16W No Load ? ? {3} NAND_IO3 R13 NAND_IO3_DEV 0 +/-5% R11 1/16W No Load ? ? {3} NAND_IO4 {3} NAND_IO5 R18 NAND_IO4_DEV R16 No Load 0 +/-5% 1/16W ? ? R17 NAND_IO5_DEV R15 No Load 0 +/-5% 1/16W ? ? {3} NAND_IO6 ? ? {3} NAND_IO7 ? ? R34 No Load R36 NAND_IO6_DEV 0 +/-5% 1/16W R33 No Load R35 NAND_IO7_DEV 0 +/-5% 1/16W U7 2 VCC 8 Q SPI_MI_SO_DEV {3,8} SPI_MO_SI {3,8} SPI_CLK {3} SPI_CS_L SPI_MO_SI SPI_CLK SPI_CS_L 15 16 D 7 CLK 9S 1W HOLD 3 NC 4 NC 5 NC 6 NC 11 NC 12 NC 13 NC 14 NC 10 VSS 64Mbit Flash C112 0.1uF 10V C +/-10% Boot Strap Options FOR DISABLING OTP {3,6} DDR_ADDR_3 R358 10K +/-5% 1/16W FOR USB DEVICE MODE VDD25_AR9344_ JP7 FOR SPI BOOT VDD25_AR9344_ 1 2 2X1 .1x.1" CENTERS 1/16W +/-5% 10K R600 10K +/-5% 1/16W {3,8} GPIO20 R395 R383 No Load {3,8} SPI_CLK ? ? JP9 1 2 GPIO6 2X1 .1x.1" CENTERS R601 1K +/-5% 1/16W FOR PCIE RC FOR EJTAG VDD25_AR9344_ FOR DISABLING SDRAM VDD25_AR9344_ JP8 VDD25_AR9344_ {3,8} 1 2 2X1 .1x.1" CENTERS R602 10K +/-5% GPIO21 1/16W R398 No Load ? ? {3,8} GPIO18 R397 10K +/-5% 1/16W B 1/16W +/-5% 10K R384 {3,8} SPI_MO_SI GPIO7 FOR 40MHz VDD25_AR9344_ FOR 32bit DDR VDD25_AR9344_ {3,8} GPIO22 R396 10K +/-5% 1/16W {3} NAND_CLE 1/16W +/-5% 10K R324 FOR SW xMII VDD25_AR9344_ 1/16W +/-5% 10K R604 GPIO5 FOR SELECTING DDR2 VDD25_AR9344_ No Load R302 {3,8} {3} UART_SOUT GPIO10 {3,6} DDR_ADDR_8 FOR SETTING USB MODE = 00 {3,6} DDR_ADDR_9 R497 10K +/-5% 1/16W R498 10K +/-5% 1/16W VDD25_AR9344_ {3,8} GPIO4 R597 No Load ? A ? ATHEROS CONFIDENTIAL PRELIMINARY 5 4 Atheros Communications, Inc 1700 Technology Drive San Jose, CA 95110 Date Saturday, April 30, 2011 Size C Rev ? Title EJTAG USB UART Sheet 8 of 15 DWG NO 245-02042-041 3 2 1 5 4 3 2 1 RGMII i/f to AR9344 {3,14} {3,14} {3,14} {3,14} {3,14} {3,14} ETX_CLK ETXD3 ETXD2 ETXD1 ETXD0 ETX_EN ETX_CLK 0 +/-5% 0 +/-5% 0 +/-5% 0 +/-5% 0 +/-5% 0 +/-5% R500 1/16W R501 1/16W R504 1/16W R505 1/16W R508 1/16W R510 1/16W GTXCLK TXD3 TXD2 TXD1 TXD0 TXEN D {3,14} ERX_EN {3,14} ERXD0 {3,14} ERXD1 {3,14} ERXD2 {3,14} ERXD3 {3,14} ERX_CLK {3,14} EMDIO {3,14} EMDC 0 +/-5% 0 +/-5% 0 +/-5% 0 +/-5% 0 +/-5% 0 +/-5% 0 +/-5% 0 +/-5% R514 RXDV 1/16W R516 RXD0 1/16W R520 RXD1 1/16W R521 RXD2 1/16W R522 RXD3 1/16W R523 RXCLK 1/16W R525 1/16W TXD_MDIO R526 1/16W RXD_MDC 3.3V 5 MC74VHC1GT50 MC74VHC1G125 U18 2 VCC 4 GNDMC74VHC1GT50 VDD3P3_S17 C603 C604 1uF 10uF U11 GPAD EPAD DVDD_1.1V_S17 VDD3P3_S17 LX_S17 S17_LEDn_3 DVDD_2.5V_S17 S17_LEDn_2 S17_LEDn_1 S17_LEDn_0 S17_INTn0 AVDD_1.1V_S S17_TESTMODE TXD3 TXD2 TXD1 TXD0 S17_RG0_GTXC FILCAP2_15 TXEN DVDD_1.1V_S17 FILCAP1_15 RXD3 RXD2 VDD15_REG_0 RXD1 RXD0 R562 4.7K R563 0 GTXCLK C702 0.1uF C602 0.1uF +/-5% 1/16W {3,14} {3,14} {3,14} {3,14} {3,14} {3,14} ETX_CLK ETX_EN ETXD0 ETXD1 ETXD2 ETXD3 {3,14} {3,14} {3,14} {3,14} {3,14} {3,14} ERX_CLK ERX_EN ERXD0 ERXD1 ERXD2 ERXD3 ETX_CLK ETX_EN ETXD0 ETXD1 ETXD2 ETXD3 ERX_CLK ERX_EN ERXD0 ERXD1 ERXD2 ERXD3 {3,8,14} SYS_RST_L SYS_RST_L {3,4,7,8,14} RST_B {3,8,14} SYS_RST_L Power On Strapping pin-B44 S17_SPI_DO No Load No Load DVDD_2.5V_S17 R502 MDIO_EN (D:1) R503 pin-B49 RG1_RXD2 No Load R506 SPI_SIZE(D:0) pin-B68 S17_INTn0 No Load R509 LED_OPEN_EN(D:1) pin-A65 RXCLK No Load 10K R512 SPI_EN(D:0) R513 pin-A54 RG1_RXDV 10K No Load R515 R517 AZ_EN D pin-A69 RXD1 No Load 10K R518 R519 place close to S17 Mode_oclk_selH for LX(D:0) (1) 1ˇb1, 1.15V for ; (2) 1ˇb0, 1.1V; R564 0 C605 No Load RXCLK Normal Setting pin-A64 RXDV 10K pin-B60 RXD3 10K R527 R528 DVDD_2.5V_S17 B76 DVDD A86 VDD33_SVR B75 LX A85 LED_LINK1000n_3 B74 LED_LINK100n_3 A84 LED_LINK10n_3 B73 VDD25_IO A83 LED_LINK1000n_2 B72 LED_LINK100n_2 A82 LED_LINK10n_2 B71 LED_LINK1000n_1 A81 LED_LINK100n_1 B70 LED_LINK10n_1 A80 LED_LINK1000n_0 B69 LED_LINK100n_0 A79 LED_LINK10n_0 B68 INTN A78 SIP B67 SIN A77 AVDD B66 SOP A76 SON B65 TEST_MODE A75 TXD3_0 B64 TXD2_0 A74 TXD1_0 B63 TXD0_0 A73 GTXCLK_0 B62 FILCAP1_15_0 A72 TXEN_0 B61 DVDD A71 FILCAP0_15_0 B60 RXD3_0 A70 RXD2_0 B59 VDD15_REG_0 A69 RXD1_0 A68 RXD0_0 3 1 {3,8,14} SYS_RST_L {3,8} S17_INTn SYS_RST_L S17_INTn 0 R673 S17_INTn0 +/-5% 1/16W 5GE LED i/f to LED display {8} S17_LEDn_0 {8} S17_LEDn_1 {8} S17_LEDn_2 {8} S17_LEDn_3 {8} S17_LEDn_4 S17_LEDn_0 S17_LEDn_1 S17_LEDn_2 S17_LEDn_3 S17_LEDn_4 C 5GE i/f to Transformer {10} S17_P0_TRX0+ {10} S17_P0_TRX0{10} S17_P0_TRX1+ {10} S17_P0_TRX1{10} S17_P0_TRX2+ {10} S17_P0_TRX2{10} S17_P0_TRX3+ {10} S17_P0_TRX3- S17_P0_TRX0+ S17_P0_TRX0S17_P0_TRX1+ S17_P0_TRX1S17_P0_TRX2+ S17_P0_TRX2S17_P0_TRX3+ S17_P0_TRX3- {10} S17_P1_TRX0+ {10} S17_P1_TRX0{10} S17_P1_TRX1+ {10} S17_P1_TRX1{10} S17_P1_TRX2+ {10} S17_P1_TRX2{10} S17_P1_TRX3+ {10} S17_P1_TRX3- S17_P1_TRX0+ S17_P1_TRX0S17_P1_TRX1+ S17_P1_TRX1S17_P1_TRX2+ S17_P1_TRX2S17_P1_TRX3+ S17_P1_TRX3- {10} S17_P2_TRX0+ {10} S17_P2_TRX0{10} S17_P2_TRX1+ {10} S17_P2_TRX1{10} S17_P2_TRX2+ {10} S17_P2_TRX2{10} S17_P2_TRX3+ {10} S17_P2_TRX3- S17_P2_TRX0+ S17_P2_TRX0S17_P2_TRX1+ S17_P2_TRX1S17_P2_TRX2+ S17_P2_TRX2S17_P2_TRX3+ S17_P2_TRX3- S17_P3_TRX0+ {10} S17_P3_TRX0+ S17_P3_TRX0- {10} S17_P3_TRX0- S17_P3_TRX1+ {10} S17_P3_TRX1+ S17_P3_TRX1- {10} S17_P3_TRX1- S17_P3_TRX2+ {10} S17_P3_TRX2+ S17_P3_TRX2- {10} S17_P3_TRX2- S17_P3_TRX3+ B {10} S17_P3_TRX3+ S17_P3_TRX3- {10} S17_P3_TRX3- {10} S17_P4_TRX0+ {10} S17_P4_TRX0{10} S17_P4_TRX1+ {10} S17_P4_TRX1{10} S17_P4_TRX2+ {10} S17_P4_TRX2{10} S17_P4_TRX3+ {10} SV1D7D_P34P_3T_RSX173- L61 S17_P4_TRX0+ S17_P4_TRX0S17_P4_TRX1+ S17_P4_TRX1S17_P4_TRX2+ S17_P4_TRX2S17_P4_TRX3+ S17_P4_TRX3- AVDD_3.3V AVDD_3.3V DVDD_1.1V_S17 0.1uF C606 FIL_CAP0 S17_P0_TRX0+ S17_P0_TRX0- AVDD_1.1V_S17 S17_P0_TRX1+ S17_P0_TRX1AVDD_3.3V S17_P0_TRX2+ S17_P0_TRX2- AVDD_1.1V_S17 S17_P0_TRX3+ S17_P0_TRX3VDD25_REG 1000pF C609 S17_VREF0 AVDD_3.3V 2.37K R566 S17_RBIAS0 0.1uF C610 VDD25_REG XTLI AVDDVCO_O XTLO AVDD_1.1V_S17 0.1uF C714 FIL_CAP2 S17_P1_TRX0+ S17_P1_TRX0AVDD_1.1V_S17 S17_P1_TRX1+ S17_P1_TRX1AVDD_3.3V S17_P1_TRX2+ S17_P1_TRX2AVDD_1.1V_S17 S17_P1_TRX3+ S17_P1_TRX3- 0.1uF C716 FIL_CAP3 DVDD B1 A3 DVDD B2 FILCAP0 A4 CH0_TRXP0 B3 CH0_TRXN0 A5 AVDD B4 CH0_TRXP1 A6 CH0_TRXN1 B5 VDD33 A7 CH0_TRXP2 B6 CH0_TRXN2 A8 AVDD B7 CH0_TRXP3 A9 CH0_TRXN3 B8 VDD25_REG A10 VREF0 B9 VDD33 A11 RBIAS0 B10 FILCAP1 A12 XTLI B11 AVDDVCO_O A13 XTLO B12 AVDD A14 FILCAP2 B13 CH1_TRXP0 A15 CH1_TRXN0 B14 AVDD A16 CH1_TRXP1 B15 CH1_TRXN1 A17 VDD33 B16 CH1_TRXP2 A18 CH1_TRXN2 B17 AVDD A19 CH1_TRXP3 B18 CH1_TRXN3 A20 FILCAP3 B19 DVDD FILCAP4 S17_P2_TRX0+ S17_P2_TRX0- AVDD_1.1V_S17 S17_P2_TRX1+ S17_P2_TRX1- AVDD_3.3V S17_P2_TRX2+ S17_P2_TRX2- AVDD_1.1V_S17 S17_P2_TRX3+ S17_P2_TRX3- 0.1uF C619 FIL_CAP5 S17_P3_TRX0+ S17_P3_TRX0- AVDD_1.1V_S17 R534 2.37K B20 A25 CH2_TRXP0 B21 CH2_TRXN0 A26 AVDD B22 CH2_TRXP1 A27 CH2_TRXN1 B23 VDD33 A28 CH2_TRXP2 B24 CH2_TRXN2 A29 AVDD B25 CH2_TRXP3 A30 CH2_TRXN3 B26 FILCAP5 A31 CH3_TRXP0 B27 CH3_TRXN0 A32 AVDD B28 CH3_TRXP1 A33 CH3_TRXN1 B29 VDD33 A34 AVDD B30 AVDDVCO_I A35 RBIAS1 B31 VREF1 A36 FILCAP6 B32 VDD33 A37 CH3_TRXP2 B33 CH3_TRXN2 A38 AVDD B34 CH3_TRXP3 A39 CH3_TRXN3 B35 FILCAP7 A40 CH4_TRXP0 B36 CH4_TRXN0 A41 AVDD B37 CH4_TRXP1 A42 CH4_TRXN1 B38 VDD33 CH4_TRXP2 S17_P3_TRX1+ S17_P3_TRX1- AVDD_3.3V AVDD_1.1V_S17 AVDDVCO_I Atheros AR8327N S17_RBIAS1 FIL_CAP6 AVDD_3.3V S17_P3_TRX2+ S17_P3_TRX2- AVDD_1.1V_S17 S17_P3_TRX3+ S17_P3_TRX3- S17_P4_TRX0+ S17_P4_TRX0- AVDD_1.1V_S17 S17_P4_TRX1+ S17_P4_TRX1- AVDD_3.3V S17_P4_TRX2+ A65 RXCLK_0 A64 RXDV_0 B56 DVDD A63 VDD25_IO B55 UART_RXD(MDC) A62 UART_TXD(MDIO) B54 DVDD A61 FILCAP0_15_1 B53 TXD3_1 A60 TXD2_1 B52 TXD1_1 A59 TXD0_1 B51 GTXCLK_1 A58 TXEN_1 B50 DVDD A57 RXD3_1 B49 RXD2_1 A56 VDD15_REG_1 B48 RXD1_1 A55 RXD0_1 B47 RXCLK_1 A54 RXDV_1 B46 VDD25_IO A53 DVDD B45 SPI_CLK A52 SPI_CS B44 SPI_DO A51 SPI_DI B43 RESETB A50 LED_LINK1000n_4 B42 LED_LINK100n_4 A49 LED_LINK10n_4 B41 VDD25_IO A48 CH4_TRXN3 B40 CH4_TRXP3 A47 AVDD B39 CH4_TRXN2 S17_RG0_RXC RXDV DVDD_1.1V_S17 DVDD_2.5V_S17 RXD_MDC TXD_MDIO DVDD_1.1V_S17 FILCAP0_15 DVDD_1.1V_S17 RG1_RXD2 VDD15_REG_1 RXD0_1 RG1_RXDV DVDD_2.5V_S17 DVDD_1.1V_S17 S17_SPI_CLK S17_SPI_CS S17_SPI_DO S17_SPI_DI S17_RSTL S17_LEDn_4 DVDD_2.5V_S17 S17_P4_TRX3S17_P4_TRX3+ AVDD_1.1V_S17 S17_P4_TRX2- DVDD_2.5V_S17 R565 1K +/-5% (1.5K)1/16W C607 0.1uF C608 No Load No Load R584 pin-A70 RXD2 10K R529 pin-A55 RXD0_1 10K No Load R585 R586 11: most save power; PHY power is minimize. 01: short cable save some power, long cable does not. 10: short and long cable all save some power. (recommended) C 00: not save power. 25MHz Source X3 25MHz XTLI 2 1 C612 25MHz 27pF XTLO C713 27pF Amplitude of XTLI input clock must be less than 1.5V. SPI Interface C715 No Load (1000pF) DVDD_2.5V_S17 U12 16Bit Mode S17_SPI_CS S17_SPI_CLK S17_SPI_DO S17_SPI_DI 1 2 CS 3 CLK 4 DI DO VCC NC2 NC1 GND 8 7 6 5 No Load C617 93LC66B-SO No Load Reset DVDD_2.5V_S17 (100K) B 0 R532 R533 SYS_RST_L S17_RSTL 10K +/-5% C618 1/16W +/-5% 1/16W No Load (0.1uF) 0.1uF C622 FIL_CAP7 1000pF C620 S17_VREF1 0.1uF C621 C623 C624 25 10uF 1uF AVDD_3.3V AVDD_3.3V C638 0.1uF C639 0.1uF C640 0.1uF C641 0.1uF C642 0.1uF C643 0.1uF C644 0.1uF Close to S17 L62 LX_S17 R536 No Load 4.7uH C645 No Load 25m Ohm/3A DVDD_1.1V_S17 DVDD_1.1V_S17 C627 C628 C629 C630 C631 C632 C633 22uF 1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF L64 25 AVDD_1.1V_S17 C634 L63 AVDD_1.1V_S 22 C635 0.1uF 0.1uF AVDD_1.1V_S17 C646 C647 C648 C649 C650 C651 C652 C653 C654 C655 C656 C657 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF L65 56nH DVDD C658 0.1uF 1.25V PLL Power AVDDVCO_O R535 0 C625 0.1uF C626 No Load AVDDVCO_I C636 0.1uF C637 No Load A C656,C657 close to L66 DVDD_2.5V_S17 L66 22 VDD25_REG DVDD_2.5V_S17 VDD15_REG_0 C659 C660 1uF No Load C661 C662 C663 C664 0.1uF 0.1uF 0.1uF 0.1uF C665 0.1uF VDD15_REG_1 C666 0.1uF 5 4 A ATHEROS CONFIDENTIAL PRELIMINARY Atheros Communications, Inc 1700 Technology Drive San Jose, CA 95110 Date Saturday, April 30, 2011 Size C Rev 010 Title Sheet 9 GIGA Switch AR8327N of 15 DWG NO 245-02042-041 3 2 1 5 4 3 2 C667 1000pF T6 2KV C668 0.1uF 1 48 R537 75 S17_P4_TRX3- 2 TCT1 MCT1 47 {9} S17_P4_TRX3- S17_P4_TRX3+ 3 TD1+ MX1+ 46 {9} S17_P4_TRX3+ C669 0.1uF 4 TD1- MX1- 45 R538 75 S17_P4_TRX2- 5 TCT2 MCT2 44 {9} S17_P4_TRX2- S17_P4_TRX2+ 6 TD2+ MX2+ 43 {9} S17_P4_TRX2+ C670 0.1uF 7 TD2- MX2- 42 R539 75 S17_P4_TRX1- 8 TCT3 MCT3 41 D {9} S17_P4_TRX1- S17_P4_TRX1+ 9 TD3+ MX3+ 40 {9} S17_P4_TRX1+ C671 0.1uF 10 TD3- MX3- 39 R540 75 S17_P4_TRX0- 11 TCT4 MCT4 38 {9} S17_P4_TRX0- S17_P4_TRX0+ 12 TD4+ MX4+ 37 {9} S17_P4_TRX0+ C672 0.1uF 13 TD4- MX4- 36 R541 75 S17_P3_TRX3- 14 TCT5 MCT5 35 {9} S17_P3_TRX3- S17_P3_TRX3+ 15 TD5+ MX5+ 34 {9} S17_P3_TRX3+ C673 0.1uF 16 TD5- MX5- 33 R542 75 S17_P3_TRX2- 17 TCT6 MCT6 32 {9} S17_P3_TRX2- S17_P3_TRX2+ 18 TD6+ MX6+ 31 {9} S17_P3_TRX2+ C674 0.1uF 19 TD6- MX6- 30 R543 75 S17_P3_TRX1- 20 TCT7 MCT7 29 {9} S17_P3_TRX1- S17_P3_TRX1+ 21 TD7+ MX7+ 28 {9} S17_P3_TRX1+ C675 0.1uF 22 TD7- MX7- 27 R544 75 S17_P3_TRX0- 23 TCT8 MCT8 26 {9} S17_P3_TRX0- S17_P3_TRX0+ 24 TD8+ MX8+ 25 {9} S17_P3_TRX0+ TD8- MX8- XFMR-FM-3178-1LLF T7 C676 0.1uF 1 48 R545 75 S17_P2_TRX3- 2 TCT1 MCT1 47 {9} S17_P2_TRX3- S17_P2_TRX3+ 3 TD1+ MX1+ 46 {9} S17_P2_TRX3+ C677 0.1uF 4 TD1- MX1- 45 R546 75 S17_P2_TRX2- 5 TCT2 MCT2 44 {9} S17_P2_TRX2- S17_P2_TRX2+ 6 TD2+ MX2+ 43 {9} S17_P2_TRX2+ C678 0.1uF 7 TD2- MX2- 42 R547 75 S17_P2_TRX1- 8 TCT3 MCT3 41 {9} S17_P2_TRX1- S17_P2_TRX1+ 9 TD3+ MX3+ 40 {9} S17_P2_TRX1+ C679 0.1uF 10 TD3- MX3- 39 R548 75 S17_P2_TRX0- 11 TCT4 MCT4 38 {9} S17_P2_TRX0- S17_P2_TRX0+ 12 TD4+ MX4+ 37 {9} S17_P2_TRX0+ C680 0.1uF 13 TD4- MX4- 36 R549 75 S17_P1_TRX3- 14 TCT5 MCT5 35 {9} S17_P1_TRX3- S17_P1_TRX3+ 15 TD5+ MX5+ 34 {9} S17_P1_TRX3+ C681 0.1uF 16 TD5- MX5- 33 R550 75 S17_P1_TRX2- 17 TCT6 MCT6 32 {9} S17_P1_TRX2- S17_P1_TRX2+ 18 TD6+ MX6+ 31 {9} S17_P1_TRX2+ C682 0.1uF 19 TD6- MX6- 30 R551 75 C S17_P1_TRX1- 20 TCT7 MCT7 29 {9} S17_P1_TRX1- S17_P1_TRX1+ 21 TD7+ MX7+ 28 {9} S17_P1_TRX1+ C683 0.1uF 22 TD7- MX7- 27 R552 75 S17_P1_TRX0- 23 TCT8 MCT8 26 {9} S17_P1_TRX0- S17_P1_TRX0+ 24 TD8+ MX8+ 25 {9} S17_P1_TRX0+ TD8- MX8- T8 S17_P0_TRX3- 2 23 {9} S17_P0_TRX3- C684 0.1uF 1 TD1+ MX1+ 24 R553 75 S17_P0_TRX3+ 3 TCT1 MCT1 22 {9} S17_P0_TRX3+ TD1- MX1- S17_P0_TRX2- 5 20 {9} S17_P0_TRX2- C685 0.1uF 4 TD2+ MX2+ 21 R554 75 S17_P0_TRX2+ 6 TCT2 MCT2 19 {9} S17_P0_TRX2+ TD2- MX2- S17_P0_TRX1- 8 17 {9} S17_P0_TRX1- C686 0.1uF 7 TD3+ MX3+ 18 R555 75 S17_P0_TRX1+ 9 TCT3 MCT3 16 {9} S17_P0_TRX1+ TD3- MX3- S17_P0_TRX0- 11 14 {9} S17_P0_TRX0- C687 0.1uF 10 TD4+ MX4+ 15 R556 75 S17_P0_TRX0+ 12 TCT4 MCT4 13 {9} S17_P0_TRX0+ TD4- MX4- XFMR-FM-1178-1LLF C688 1000pF 2KV C689 0.1uF C690 0.1uF C691 0.1uF C692 0.1uF B J17 32 31 D8 30 D7 29 D6 28 D5 27 D4 26 D3 25 D2 D1 24 23 C8 22 C7 21 C6 20 C5 19 C4 18 C3 17 C2 C1 16 15 B8 14 B7 13 B6 12 B5 11 B4 10 B3 9 B2 B1 8 7 A8 6 A7 5 A6 4 A5 3 A4 2 A3 1 A2 A1 CON-RJ45-1X4 35 S1 36 S2 37 S3 38 S4 39 S5 CON JACK SINGLE PORT 8 78 67 56 45 34 23 12 1 12 CGND 11 CGND J18 ATHEROS CONFIDENTIAL SLOTS SLOT3 1 PRELIMINARY SLOT4 1 LOCAL FIDUCIALS FD14 1 FD15 1 FD18 1 FD19 1 1 D C B A A Atheros Communications, Inc 1700 Technology Drive San Jose, CA 95110 Date Saturday, April 30, 2011 Size C Rev 010 Title Sheet 10 TRANSFORMERS, RJ45'S of 15 DWG NO 245-02042-041 5 4 3 2 1 5 4 3 2 P0_RX- R97 R98 49.9 49.9 P0_RX+ P1_RX- R156 49.9 R155 49.9 P1_RX+ P2_RX- R179 49.9 R178 49.9 P2_RX+ P3_RX- R208 49.9 R207 49.9 P3_RX+ P4_RX- R270 49.9 R269 49.9 P4_RX+ C115 0.1uF 10V +/-10% C116 0.1uF 10V +/-10% C155 0.1uF 10V +/-10% C177 0.1uF 10V +/-10% C251 0.1uF 10V +/-10% R95 49.9 P0_TX- R96 49.9 P0_TX+ P1_TX- R157 49.9 R158 49.9 P1_TX+ P2_TX- R176 49.9 R177 49.9 P2_TX+ P3_TX- R210 49.9 R209 49.9 P3_TX+ P4_TX- R257 49.9 R256 49.9 P4_TX+ D C77 0.1uF 10V +/-10% {3} P4_TX+ {3} P4_TX{3} P4_RX+ {3} P4_RX- C134 0.1uF 10V +/-10% AVDD20_T P4_TX+ P4_TXP4_RX+ P4_RX- C153 0.1uF 10V +/-10% T5 1 2 RD+ 3 NC 4 RD5 CT 6 TD+ 7 NC 8 TD- NC HN1664C 16 RX+ 15 NC 14 RX- 13 CM 12 TX+ 11 NC 10 TX- 9 NC C154 0.1uF +/-10% 10V TX4+ TX4P4REF RX4+ RX4- R431 1 2 75 C179 0.1uF 10V +/-10% 75 R430 PC4 PC4 1 2 TX4- 1 R456 75 2 TX4+ RX4RX4+ C208 0.1uF 10V +/-10% J12 8 78 67 56 45 34 23 12 1 CON JACK SINGLE PORT 10/100 WAN port J8 AVDD20_T R350 1 2 32 31 REF15 10/100 LAN 4 port T3 TX0- 30 REF14 P2_TX- 1 20 TX2- 75 29 TX3- {3} P2_TX- P2_TX+ 2 TD2+ TX2+ 19 TX2+ R408 1 2 28 REF13 {3} P2_TX+ 3 TD2- TX2- 18 P3REF 1 2 R352 TX0+ 27 REF12 P2_RX+ 4 CT2 CM2 17 RX2+ 75 RX0- 26 TX3+ C {3} P2_RX+ {3} P2_RX- P2_RX- 5 RD2+ RD2- RX2+ 16 RX2- RX2- 75 RX0+ 25 RX3RX3+ {3} P3_RX+ {3} P3_RX- {3} P3_TX+ {3} P3_TX- {3} P0_TX{3} P0_TX+ {3} P0_RX{3} P0_RX+ {3} P1_RX+ {3} P1_RX- {3} P1_TX{3} P1_TX+ P3_RX+ P3_RX- P3_TX+ P3_TX- P0_TXP0_TX+ P0_RXP0_RX+ P1_RX+ P1_RX- P1_TXP1_TX+ 6 7 RD18 RD1+ 9 CT1 10 TD1- TD1+ HN2064C T1 1 2 TD2+ 3 TD24 CT2 5 RD2+ RD2- 6 7 RD18 RD1+ 9 CT1 10 TD1- TD1+ HN2064C 15 RX1- 14 RX1+ 13 CM1 12 TX1- 11 TX1+ 20 TX2+ 19 TX2- 18 CM2 17 RX2+ 16 RX2- 15 RX1- 14 RX1+ 13 CM1 12 TX1- 11 TX1+ RX3+ RX3P2REF TX3+ TX3- R424 1 2 75 TX0TX0+ P1REF RX0RX0+ R351 1 2 75 RX1+ RX1P0REF TX1TX1+ R381 1 2 75 R380 1 2 75 1 2 R382 PC4 75 R407 1 2 75 1 2 R409 75 TX1- TX1+ RX1RX1+ TX2- TX2+ RX2RX2+ 24 23 REF11 22 REF10 21 TX220 REF9 19 REF8 18 TX2+ 17 RX2- RX2+ 16 15 REF7 14 REF6 13 TX112 REF5 11 REF4 10 TX1+ 9 RX1RX1+ 10/100 LAN 3 port 10/100 LAN 2 port C209 0.1uF 10V +/-10% C178 0.1uF 10V +/-10% C133 0.1uF +/-10% 10V C114 0.1uF +/-10% 10V R423 1 2 75 1 2 R425 75 TX3- TX3+ RX3RX3+ 8 7 REF3 6 REF2 5 TX04 REF1 3 REF0 2 TX0+ 1 RX0- RX0+ 10/100 LAN 1 port GND_C B CON-JACK-4PORTS HIGH VOLTAGE 1 D C B A ATHEROS CONFIDENTIAL SLOTS A GLOBAL SLOT1 1 FIDUCIALS MOUNTING PRELIMINARY SLOT2 1 FD1 1 HOLES 1 LOGO FD8 1 ZH4 LOCAL FIDUCIALS 1 FD6 1 ZH2 xPA 16 PIN FLASH DUAL LED FD2 1 FD5 1 FD4 1 FD3 1 X2 LOGO-AP-LARGE 1 FD9 1 FD7 1 FD10 1 1 ZH1 1 ZH3 Atheros Communications, Inc. 5480 Great America Parkway Santa Clara, CA 95054 Date Saturday, April 30, 2011 Size C Rev 000 Title TRANSFORMERS, RJ45'S Sheet 11 of 15 DWG NO 245-02042-041 5 4 3 2 1 5 4 3 2 1 R1 220 VDD25_AR9344_ VDD33_PCIE_RC 1.5V_RC PCIE CONNECTOR FOR RC 1/16W +/-5% 2 DS1 GREEN 1 LED POWER LED PUSH BUTTON SWITCHES PCIeAUX R21 220 PCIeAUX_RC R467 VDD33_PCIE_RC {3} USB_LED 1/16W +/-5% USB_LED USBL 2 1 DS4 LED GREEN USB LED 0 R26 220 24 3.3VAUX 2 3.3V 52 3.3V 6 1.5V 28 1.5V 48 1.5V +/-5% J14 1/8W VDD25_AR9344_ PCIeAUX_RC {3} JUMP_START_LED 1/16W +/-5% JUMP_START_LED JSTART 2 1 DS6 LED GREEN JUMP START LED VDD25_AR9344_ D 36 USB_D- 38 USB_D+ 42 R295 TP5 LED_WWAN_L 44 LED_WLAN_L 46 No Load LED_W PAN_L ? R468 10K +/-5% 1/16W R470 SYS_RST_L {3,9,14} 30 SMB_CLK 32 SMB_DATA 1 WAKE_L 22 PERST_L 7 CLKREQ_L ? R R294 R292 No Load WAKE_RC {3,7} R293 No Load ? R469 ?0 TP4 PCIE_RST_L {3,5} 11 REFCLK- 13 REFCLK+ 23 PERn0 25 PERp0 31 PETn0 33 PETp0 R CO?N_PERN0 CO?N_PERP0 CON_PETN0 CON_PETP0 R291 +/-5% 1/16W R290 +/-5% 1/16W 0 0 PCIE_R+E/-F5%CLKBPCIE_R1E/1F6CWLKB+ PCIE_REFCLK-_PCIe_CONN {3} PCIE_REFCLK+_PCIe_CONN {3} PERN0_PCIE_CONN {3} PERP0_PCIE_CONN {3} PETN0_PCIE_CONN {3} PETP0_PCIE_CONN {3} R22 220 D 1/16W +/-5% {3} RDY_STATUS_LED STATUS_LED STATUS 2 1 STATUS LED DS5 LED R6 {3} AR9344_2G_W LAN_LED GREEN R20 220 1/16W +/-5% AR9344_2G_W LAN_LED_RES 2 DS3 1 LED 2G WLAN LED R326 0 10K +/-5% 1/16W R19 220 1/16W +/-5% GREEN {3} JUMP_ST_SW {3} AR9344_5G_W LAN_LED AR9344_5G_W LAN_LED_RES2 1 5G WLAN LED DS2 LED +/-5% R308 220 GREEN 1/16W 1/16W +/-5% {5} AR9380_5G_W LAN_LED AR9380_5G_W LAN_LED_RES2 1 DS17 LED GREEN AR9380 5G WLAN LED JUMPSTART 4 3 SW C8 No Load PCI EXPRESS MINI SOCKET outgoing Tx from RC to DB 2 1 R682 No Load 3 RESERVED 5 RESERVED 8 RESERVED 10 RESERVED 12 RESERVED 14 RESERVED 16 RESERVED 17 RESERVED 19 RESERVED 20 RESERVED 37 RESERVED 39 RESERVED 41 PT1 1 C RESERVED 43 RESERVED 45 PT2 1 RESERVED 47 RESERVED 49 RESERVED 51 RESERVED 4 9 GND 15 GND 18 GND 21 GND 26 GND 27 GND 29 GND 34 GND 35 GND 40 GND 50 GND GND Module Mounting Holes 10/100 ETHERNET LEDS {3,7} LED_LINK_4 R28 220 PORT4_LNK_ACT_LED {3,7} LED_LINK_3 R23 220 PORT3_LNK_ACT_LED {3,7} LED_LINK_2 R25 220 PORT2_LNK_ACT_LED DS7 LED 2 1 GREEN R611 10K +/-5% 1/16W DS8 LED 2 1 GREEN DS9 LED 2 1 GREEN {3} LED_LINK_1 R27 220 DS10 LED 2 1 2 3 Q8 ? C755? 1uF 2N3904 1 6.3V +/-10% R610 VDD25_AR9344_ 100 +/-5% 1/10W {9} S17_LEDN_1 S16_LEDn_1 {9} S17_LEDN_0 S16_LEDn_0 {9} S17_LEDN_4 S16_LEDn_4 {9} S17_LEDN_3 S16_LEDn_3 {9} S17_LEDN_2 S16_LEDn_2 R304 220 1/16W +/-5% R303 220 1/16W +/-5% R307 220 1/16W +/-5% R306 220 1/16W +/-5% R305 220 1/16W +/-5% 2 1 GREEN DS13 LED INTERNET ACTIVE SW 2 TS-1180M-160 2 1 PORT-1 LINK ACTIVE GREEN DS12 LED VDD25_AR9344_ 2 1 PORT-2 LINK ACTIVE R499 {3,4,7,14} SWRST No Load 1/16W GREEN DS16 LED +/-5% C GPIO17 ? 10K 2 1 PORT-3 LINK ACTIVE ? R5 R205 GREEN RST_B 0 RST_SW DS15 LED {3,4,7,14} RST_B 2 1 GREEN DS14 LED PORT-4 LINK ACTIVE +/-5% C7 1/16W 0.01uF 25V +/20% 1 3 SW 1 4 2 PORT1_LNK_ACT_LED GREEN RESET PCIeAUX VDD33_PCIE_EP 1.5V_EP PCIE CONNECTOR FOR EP {3,7} INTERNET_LED R30 220 INTERNET_ACT_LED 2 1 DS11 LED GREEN R612 SW SW PUSHBUTTON RT PCIeAUX_EP R472 VDD33_PCIE_EP {3,9,14} SYS_RST_L 1K +/-5% 1/16W 24 3.3VAUX 2 3.3V 52 3.3V 6 1.5V 28 1.5V 48 1.5V 0 J13 +/-5% 1/8W VDD25_AR9344_ PCIeAUX_EP 36 USB_D- 38 R473 USB_D+ 42 LED_WWAN_L 44 LED_WLAN_L 46 R277 10K TP3 10K +/-5% R476 B LED_W PAN_L +/-5% 1/16W SYS_RST_L {3,9,14} 30 SMB_CLK 32 SMB_DATA 1 WAKE_L 22 PERST_L 7 CLKREQ_L 1/16W R R276 R275 W AKE_EP No Load ?R474 {3,4,7,1?4} 0 TP2 PCIE_EP_RST_L {3} R274 100K 11 REFCLK- 13 REFCLK+ 23 PERn0 25 PERp0 31 PETn0 33 PETp0 R PETN0_EP PETP0_EP PERN0_EP PERP0_EP +/-5% 1/16W R465 +/-5% 1/16W R466 +/-5% 1/16W 0 PERN0_PCIE_EP_CONN {3} PERP0_PCIE_EP_CONN {3} +/-5% ? C152 C151 0.1uF 0.1uF10V PCIE_REFCLK-_PCIe_EP_CONN {3} PCIE_REFCLK+_PCIe_EP_CONN {3} PETN0_PCIE_EP_CONN {3} PETP0_PCIE_EP_CONN {3} incoming Tx from host to EP 0 10V +/-10% +/-10% PCI EXPRESS MINI SOCKET 3 RESERVED 5 RESERVED 8 RESERVED 10 RESERVED 12 RESERVED 14 RESERVED 16 RESERVED 17 RESERVED 19 RESERVED 20 RESERVED 37 RESERVED 39 RESERVED 41 PT3 1 RESERVED 43 RESERVED 45 PT4 1 RESERVED 47 RESERVED 49 RESERVED 51 RESERVED A place close to AR9344 I2S VDD25_AR9344_ R580 560 +/-1% {31}/16WGPIO12 {3} GPIO13 {3} GPIO14 {3} GPIO11 {3,7} GPIO8 {3,7} GPIO21 R314 R316 No Load No Load R318 No Load R320 R321 No Load R323 No Load No Load 5V 3.3V 3.3V 0.1uF C303 +/-10% 10V JP3 H1 DR9X22 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 2X9 .1x.1" CENTERS I2S/SPDIF HEADER VDD25_AR9344_VDD25_AR9344_ 1/16W +/-5% R598 560 10K R579 +/-1% 1/16W R313 GPIO19 {3} 5V No Load R312 R599 SYS_RST_L No Load SW RST R315 No Load R675 No Load No Load GPIO4 SPDIF_OUT/SPI_CSI R317 GPIO15 B {3,9,14} {3,9} GPIO17 {3,9} {3} R319 No Load GPIO6 {3,7} No Load R322 GPIO7 {3,7} No Load SPDIF_OUT/SPI_CSI 5V C307 0.1uF 10V +/-10% J2 SPDIF HEADER R24 2 VCC 3 INPUT No Load 1 GND TOTX177FT A 4 9 GND 15 GND 18 GND 21 GND 26 GND 27 GND 29 GND 34 GND 35 GND 40 GND 50 GND GND Module Mounting Holes ATHEROS CONFIDENTIAL PRELIMINARY 5 4 Atheros Communications, Inc 1700 Technology Drive San Jose, CA 95110 Date Saturday, April 30, 2011 Size Custom Rev ? Title PCIe Connector And LEDs Sheet 12 of 15 DW G NO 245-02042-041 3 2 1 5 4 3 2 1 POWER SUPPLY, REGULATORS & DECOUPLING Vin = 5V J1 5V PJ-102AH F1 2A 1 1 2 3 2 CENTER PIN + SHELL - R31 0 +/-5% 1/4W VDD5_RAW C1 + 100uF 25V +/-20% C15 4.7uF 25V +/-10% C12 C13 1uF 0.1uF 25V 16V +80/-20% +/-10% C14 No Load 1/16W +/-5% 10K R603 D 5V + C2 100uF 25V +/-20% C3 0.1uF +/-20% 16V 2X1 .1x.1" CENTERS SILK Screen: DIS 3.3V 2 1 R328 100K +/-5% C6 ? 0.1uF JP1 +/-20% 16V C5 0.1uF +/-20% 16V VR1 2 VIN 7 EN 8 SS 4 GND 9 EPAD RT8250 1 BOOT R329 0 C305 0.01uF +/-5% ? +/-10% 25V L1 10uH 1 3 SW 5 FB 6 COMP D1 SBR3A40SA 2 R4 39K +/-5% ? C17 2200pF +/-10% 50V C16 No Load 3.3V C331 4700pF +/-10% 25V R337 24K +/-1% ? R336 9.31K +/-1% ? C24 0.1uF 10V +/-10% C23 + 100uF 25V +/-20% C22 No Load C19 1uF 6.3V +/-10% C18 0.1uF 10V +/-10% 3.3V VOLTAGE DOMAINS R330 0 +/-5% 1/8W VDD33 C308 1uF C310 0.1uF C309 1000pF 6.3V 10V 50V +/-10% +/-10% +/-10% D VDD33_RF C745 R331 10uF 0 6.3V +/-5% +/-10% 1/8W C312 22uF 6.3V +/-20% C311 10uF 6.3V +/-10% C314 No Load C313 0.1uF 10V +/-10% 2 1 5V R581 0 +/-5% 1/8W C20 0.1uF +/-10% 10V JP2 R335 100K +/-5% ? ? Optional 1.2V regulator R327 C21 10uF +/-10% 6.3V U1 5 VIN 4 EN 2 GND 1 BOOT 6 PHASE 3 FB RT8258GE 2 0 +/-5% ? 1 C330 0.01uF L2 +/-10% 3.3uH +/-20% 25V D2 SBR3A40SA C4 No Load C304 0.1uF SILK Screen: +/-20% DIS 1.2V Ext 16V R2 100K +/-1% 1/16W R3 56K +/-1% 1/16W 1.2V_EXT C25 22uF +/-20% 6.3V 1.2V_EXT R32 C26 0.1uF +/-10% 10V 0 +/-5% 1/8W VDD12 No Load R561 VDD12_INT R171 0 +/-5% 1/8W 2X1 .1x.1" CENTERS VDD12 C C27 22uF +/-20% 6.3V C30 1uF 6.3V +/-10% C29 0.1uF 10V +/-10% C28 No Load R172 0 +/-5% 1/8W C459 22uF +/-20% 6.3V VDD12_AR9344 C455 1uF 6.3V +/-10% C456 0.1uF 10V +/-10% C457 1000pF 50V +/-10% C458 10pF VDD12_RF C383 0.1uF +/-10% 6.3V C416 0.1uF +/-10% 6.3V C415 0.01uF +/-10% 10V C385 0.01uF +/-10% 10V 5V C302 22uF 6.3V +/-20% C301 1uF 10V +/-10% R311 0 5V VOLTAGE DOMAINS VDD5_USB +/-5% 1/4W C300 0.1uF 10V +/-10% C332 0.1uF 10V +/-10% C11 + 100uF 25V +/-20% C306 10uF +/-10% 6.3V R413 0 +/-5% 1/8W C469 10uF +/-10% 6.3V C466 0.1uF 10V +/-10% VDD33_AR9344 C465 1000pF 50V +/-10% C467 C468 No Load No Load C422 1uF 6.3V +/-10% C421 0.1uF 6.3V +/-10% R683 0 +/-5% 1/10W C388 1uF 6.3V +/-10% C387 0.1uF 6.3V +/-10% VDD3p3 C390 1uF 6.3V +/-10% VDD12_PU C817 10uF 6.3V +/-20% C386 0.1uF +/-10% 6.3V C381 0.01uF +/-10% 10V VDD12_PCIe C818 10uF 6.3V +/-20% C411 0.1uF +/-10% 6.3V C412 0.01uF +/-10% 10V R266 0 +/-5% 1/8W R477 0 +/-5% 1/8W C250 10uF 6.3V +/-10% C207 1uF 6.3V +/-10% VDD33_AR9380 C205 C206 No Load No Load C C589 10uF +/-10% 6.3V C588 0.1uF 10V +/-10% VDD33_PCIE_EP C587 No Load R334 0 +/-5% 1/8W C319 22uF +/-20% 6.3V C321 1uF 6.3V +/-10% C320 0.1uF 10V +/-10% C347 1000pF 50V +/-10% C322 10pF C378 0.1uF 10V +/-10% C377 0.1uF +/-10% 6.3V C372 0.1uF +/-10% 6.3V C345 0.1uF +/-10% 6.3V C346 0.1uF +/-10% 6.3V C374 0.1uF +/-10% 6.3V C373 0.1uF +/-10% 6.3V R471 0 +/-5% 1/8W C586 10uF +/-10% 6.3V C584 0.1uF 10V +/-10% VDD33_PCIE_RC C585 No Load 5V 1.15V option for AR8327 C39 22uF C40 +/-20% 0.1uF 6.3V 16V +/-20% B 2 1 R348 100K +/-5% 1/16W JP4 C38 0.1uF +/-20% 16V VR2 3 VIN 2 EN 1 NC 4 LX 6 FB/VOUT 5 GND 7 TPAD RT8010 L15 2.2uH +/-30% 1.1V_EXT_AR8327 C43 22pF +/-5% 50V R43 95.3K +/-1% 1/16W R42 100K +/-1% 1/16W C86 22uF +/-20% 6.3V R582 DVDD_1.1V_S17 C85 0.1uF 10V +/-10% 0 +/-5% 1/8W VDD_DDR_AR9344 C397 0.1uF +/-10% 6.3V C398 0.1uF +/-10% 6.3V C348 0.01uF +/-10% 10V C349 0.1uF +/-10% 6.3V C401 0.1uF +/-10% 6.3V VDD25_AR9344 R684 R685 VDD25_AR9344_ 0 +/-5% 1/10W C746 10uF +/-10% 6.3V No Load 3.3V C399 0.1uF +/-10% 6.3V C420 0.1uF +/-10% 6.3V L60 25 +/-25% C189 1uF 10V +/-10% C190 0.1uF 10V +/-10% VDD3P3_S17 C574 22uF 6.3V +/-20% C323 10uF +/-10% 6.3V C327 1uF 6.3V +/-10% C326 0.1uF 10V +/-10% C325 1000pF 50V +/-10% C324 10pF C375 0.1uF +/-10% 6.3V C382 0.1uF +/-10% 6.3V C391 0.1uF +/-10% 6.3V C384 0.1uF +/-10% 6.3V C408 0.01uF +/-10% 10V C414 0.1uF +/-10% 6.3V C413 0.01uF +/-10% 10V C410 0.1uF +/-10% 6.3V C419 0.1uF +/-10% 6.3V C394 0.1uF +/-10% 6.3V C389 B 0.1uF 6.3V +/-10% 2X1 .1x.1" CENTERS SILK Screen: DIS 3.3V_AR8327 L35 2.2uH +/-30% 1.2V_EXT_AR9380 1.2V 1.2V L25 470 R260 0 +/-5% ? 1.2V_A GND PINS TO BE SPREAD ACROSS THE PCB TPC2 TESTPIN,TH,BLACK TPC5 TESTPIN,TH,BLACK TPC30 TESTPIN,TH,BLACK TPC32 TESTPIN,TH,BLACK 3.3V C291 1uF +/-10% 6.3V C290 0.1uF +/-10% 10V R297 C292 100K 22uF +/-5% 1/16W +/-20% 6.3V VR3 3 VIN 2 EN 1 NC 4 LX 6 FB/VOUT 5 GND 7 TPAD C254 22pF +/-5% 50V R280 115K +/-1% 1/16W R279 100K +/-1% C253 22uF +/-20% 6.3V C223 22uF +/-20% 6.3V C221 0.1uF +/-10% 10V C222 0.1uF +/-10% 10V C220 0.01uF +/-10% 25V C224 22uF +/-20% 6.3V C227 1uF 6.3V +/-10% C228 0.1uF 10V +/-10% C229 0.01uF +/-10% 25V 1 2X1 .1x.1" CENTERS JP5 RT8010 1/16W 1.2V R259 0 +/-5% ? VDD12_AR9380 Optional "external" switching regulator R296 2 SILK Screen: No Load DIS 1.2V EXT 1.2V A 1 2 C218 22uF C219 1uF C225 0.1uF C540 C537 C554 C555 C557 C517 0.1uF C541 +/-10% +/-20% 6.3V 6.3V +/-10% +/-10% 10V 0.01uF 10V 0.01uF 10V 0.01uF 10V 0.01uF 10V 0.01uF 10V 0.01uF 6.3V 10V +/-10% +/-10% +/-10% +/-10% +/-10% +/-10% A 1.2V_EXT_AR9380 No load dflt 1.2V_INT_AR9380 R278 R258 VDD33_AR9380 R255 0 +/-5% ? 1 2 C204 22uF C239 1uF 6.3V +/-10% C237 0.1uF +/-10% 10V 3.3V_A C238 0.01uF +/-10% 25V 0 +/-5% 1/8W 0 +/-5% 1/8W ATHEROS CONFIDENTIAL Atheros Communications, Inc PRELIMINARY 1700 Technology Drive San Jose, CA 95110 Date Saturday, April 30, 2011 Size C Rev ? Title Power Regulators Sheet 13 of 15 DWG NO 245-02042-041 5 4 3 2 1 5 4 3 2 1 Wideband LNA - 2G & 5G T/R Switch LNA_IN_0 {4} AR9344_COM_D RX Diplexer C717 10pF R567 27R {4} AR9344_COM_C S6 SKY13317-373 3 V1 4 RF1 {4} 2G_RX_0 +/-5% +/-5% C718 L72 50V 1/20W D 1.0pF 3.9nH 9 EP 2 NC ANT 0 D {4} 5G_RX_0 50V +/-0.25PF +/-0.2nH LNA_OUT_0 R568 56K 1/20W +/-5% L73 4.7nH +/-0.2nH {4} AR9344_COM_B {4} 2G_TX_0 6 V2 5 RF2 1 RFC 1/16W R569 J19 7 V3 8 RF3 L74 1.2nH +/-0.2nH C719 0.5pF 50V +/-0.25pF LNA_IN_0 C724 6.8pF 50V +/-0.25PF R570 1K +/-5% 1/20W C722 6.8pF 50V +/-0.25PF 1 2 C723 6.8pF +/-0.25PF 50V LNA_OUT_0 C720 10pF 50V +/-5% {4} AR9344_COM_A 10pF C721 +/-5% 50V 0 +/-5% CON RF 3PIN ANT 0_2G/5G CH_0 Q6 {4} 5G_TX_0 R571 2 3 TRA-BFR740L3RH 3 No Load L75 1 R629 No Load ?? R630 No Load ?? 10pF C728 +/-5% 50V AR9344_COM_A {4} 10pF C729 +/-5% 50V AR9344_COM_B {4} 10pF C730 +/-5% 50V AR9344_COM_C {4} C726 0.5pF 50V +/-0.25PF 3.9nH +/-0.1NH Antenna C727 ANT6 No Load OPTIONAL STAMPED ANTENNA C C T/R Switch LNA_IN_1 Wideband LNA - 2G & 5G {4} AR9344_COM_C S7 SKY13317-373 3 V1 4 RF1 {4} AR9344_COM_D RX Diplexer C731 10pF R572 27R 9 EP 2 NC ANT 1 {4} 2G_RX_1 C732 1.0pF L76 3.9nH +/-5% 50V +/-5% 1/20W {4} AR9344_COM_B {4} 2G_TX_1 6 V2 5 RF2 1 RFC 1/16W R574 J20 7 V3 8 RF3 50V +/-0.2nH LNA_OUT_1 R573 L77 C733 10pF 10pF C734 0 B +/-0.25PF 56K 4.7nH 50V +/-5% +/-5% 50V +/-5% CON RF 3PIN B 1/20W {4} 5G_RX_1 +/-5% +/-0.2nH CH_1 L78 1.2nH +/-0.2nH C735 0.5pF 50V +/-0.25pF R575 C736 C737 LNA_OUT_1 {4} AR9344_COM_A ANT 1_2G/5G C739 6.8pF 1K +/-5% 6.8pF 50V 2 6.8pF +/-0.25PF {4} 5G_TX_1 R576 2 3 50V +/-0.25PF 1/20W +/-0.25PF 50V LNA_IN_1 1 No Load L79 1 Q7 TRA-BFR740L3RH 3 C740 0.5pF 50V 3.9nH +/-0.1NH C741 No Load Antenna ANT7 10pF C742 +/-0.25PF +/-5% 50V R631 No Load ?? R632 No Load ?? AR9344_COM_A {4} 10pF C743 +/-5% 50V OPTIONAL STAMPED ANTENNA AR9344_COM_B {4} 10pF C744 +/-5% 50V AR9344_COM_C {4} A A ATHEROS CONFIDENTIAL PRELIMINARY Atheros Communications, Inc 1700 Technology Drive San Jose, CA 95110 Date Saturday, April 30, 2011 Size C Rev ? Title T/R Switch, Antenna Sheet 14 of 15 DWG NO 245-02042-041 5 4 3 2 1 5 4 3 2 R443 No Load MP_GTXCLK R590 R444 No Load RMII_REFCLK_LP1 RMII_REFCLK_LP2 {3,9} ETX_CLK U10 RMII_REFCLK_SHRT RMII_REFCLK_MID RMII_REFCLK_LONG SILK Screen: RMII Master mode 0 R591 No Load {3,9} ETXD3 R442 No Load {3,9} ETXD2 R435 No Load {3,9} ETXD1 R441 No Load {3,9} ETXD0 R434 No Load D R437 No Load {3,9} ETX_EN MP_TXD3 MP_TXD2 MP_TXD1 MP_TXD0 MP_TXEN SILK Screen: xMII connections {3,9} {3,9} EMDIO EMDC R440 R447 No Load No Load MP_MDIO MP_MDC No Load R595 {3,9} ERX_CLK R448 No Load MP_RXCLK 0 R596 MP_RXCLK_ {3,9} ERX_EN R438 No Load MP_RXDV {3,9} ERXD0 R439 No Load MP_RXD0 {3,9} ERXD1 R445 No Load MP_RXD1 {3,9} ERXD2 R436 No Load MP_RXD2 {3,9} ERXD3 R446 No Load MP_RXD3 C ? R489 ? R490 ? No Load ? No Load SILK Screen: RMII pulldown R592 No Load R593 0 R594 No Load {3,4,7,8} RST_B {3,8,9} SYS_RST_L No Load No Load R484 R483 MP_TXD3 MP_TXD1 MP_TXD0 MP_TXEN MP_MDIO R557 0 MP_MDC R558 0 {3} GPIO6_DIO {3} GPIO17_DIO MP_RXCLK_ R272 0 SILK Screen: C252 ? RMII Master mode No Load ? {3} GPIO7_DC {3} GPIO4_DC R273 5 5 R671 No Load R271 5 5 R482 5 5 R672 No Load No Load No Load No Load MP_RXDV MP_RXD1 MP_RXD2 MP_TXD2 MP_GTXCLK MP_RXD0 EXT_MDIO EXT_MDC ETSTIO RXC ETSTC 26 25 RST 65 CLK CLKRUN 96 99 AD0 94 AD1 95 AD2 92 AD3 91 AD4 90 AD5 87 AD6 85 AD7 84 AD8 81 AD9 80 AD10 79 AD11 78 AD12 75 AD13 76 AD14 60 AD15 57 AD16 58 AD17 53 AD18 54 AD19 51 AD20 52 AD21 47 AD22 46 AD23 41 AD24 44 AD25 39 AD26 42 AD27 35 AD28 38 AD29 33 AD30 AD31 86 73 CBE0 59 CBE1 45 CBE2 CBE3 20 29 INTA 30 REQ 71 GNT 56 PERR 61 PAR 66 IRDY 64 TRDY 68 FRAME 67 STOP 72 SERR DEVSEL 34 PME MINIPCI TYPE III MP_RXD3 48 IDSEL mP_3.3V mP_5V 12 LED2-YELP 14 LED2-YELN 11 LED1-GRNP 13 LED1-GRNN 89 VCC 88 VCC 70 VCC 63 VCC 40 VCC 28 VCC 31 VCC 19 VCC 27 GND 32 R479 No Load 16 GND 37 R478 No Load 21 RESERVED_1 GND 49 R481 No Load 22 RESERVED_2 GND 50 R488 No Load 36 RESERVED_3 GND 55 R485 No Load 43 RESERVED_4 GND 62 mP_5V R491 No Load 93 RESERVED_5 GND 69 R495 No Load 112 RESERVED_6 GND 74 R493 No Load 121 RESERVED_7 GND 77 RESERVED_8 GND 82 GND 83 GND 101 GND 102 GND 114 B 107 GND 105 AC_BIT_CLK 18 R480 No Load 103 AC_SDATA_IN 5V 97 R492 No Load AC_SYNC 5V 123 R494 No Load VCC5VA 15 109 CHSGND 106 AC_CODEC_ID1 108 AC_SDATA_OUT 110 AC_CODEC_ID0 3.3V_AUX AC_RESET 24 122 3.3VAUX 124 17 MPCIACT 3.3VAUX INTB 104 M66EN 1 D C B mP_3.3V C580 0.1uF +/-10% 10V C593 0.1uF +/-10% 10V C596 0.1uF +/-10% 10V C582 0.1uF +/-10% 10V C583 0.1uF +/-10% 10V C581 0.1uF +/-10% 10V C595 0.1uF +/-10% 10V C597 0.1uF +/-10% 10V RGMII interface Slot (T1) using mPCI connector A A mP_5V 3.3V_AUX ATHEROS CONFIDENTIAL PRELIMINARY C599 0.1uF +/-10% 10V C598 0.1uF +/-10% 10V C594 0.1uF +/-10% 10V C591 0.1uF +/-10% 10V C590 0.1uF +/-10% 10V C600 0.1uF +/-10% 10V C592 0.1uF +/-10% 10V 5 4 3 xPA 16 PIN FLASH DUAL LED Atheros Communications, Inc. 5480 Great America Parkway Santa Clara, CA 95054 Date Saturday, April 30, 2011 Size Custom Rev 000 2 Title xMII connector Sheet 15 of 15 DWG NO 245-02042-041 1

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