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MPC560xE 面向ADAS应用的Qorivva 32位MCU

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  • 日期: 2018-11-14
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标签: MPC560xEADAS飞思卡尔

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Freescale Semiconductor Data Sheet Advance Information Document Number MPC5606E Rev 3 082014 MPC5606E MPC5606E Microcontroller Data Sheet 121 MAPBGA 8 mm x 8mm NOTE For BCM89810 document please refer to Broadcom website and download the document Single issue 32bit CPU core complex e200z0h Compliant with Power Architecture embedded category Variable Length Encoding VLE only Memory 512 KB onchip Code Flash with ECC and eraseprogram controller additional 64 4 16 KB onchip Data Flash w......

Freescale Semiconductor Data Sheet: Advance Information Document Number: MPC5606E Rev. 3, 08/2014 MPC5606E MPC5606E Microcontroller Data Sheet 121 MAPBGA 8 mm x 8mm NOTE For BCM89810 document please refer to Broadcom website and download the document • Single issue, 32-bit CPU core complex (e200z0h) — Compliant with Power Architecture® embedded category — Variable Length Encoding (VLE) only • Memory — 512 KB on-chip Code Flash with ECC and erase/program controller — additional 64 (4 × 16) KB on-chip Data Flash with ECC for EEPROM emulation — 96 KB on-chip SRAM with ECC Fail-safe protection — Programmable watchdog timer — Non-maskable interrupt — Fault collection unit Interrupts and events — 16-channel eDMA controller — 16 priority level controller — Up to 22 external interrupts — PIT implements four 32-bit timers — 120 interrupts are routed via INTC General purpose I/Os — Individually programmable as input, output or special function — 39 1 general purpose eTimer unit — 6 timers each with up/down capabilities • • • • — 16-bit resolution, cascadeable counters — Quadrature decode with rotation direction flag — Double buffer input capture and output compare Communications interfaces — 2 LINFlex channels (1 × Master/Slave, 1 × Master Only) — 3 DSPI controllers with automatic chip select generation (up to 2/2/4 chip selects) — 1 FlexCAN interface (2.0B Active) with 32 message buffers One 10-bit analog-to-digital converter (ADC) — 7 input channels – 4 channels routed to the pins – 3 internal connections: 1x temperature sensor, 1x core voltage, 1x IO voltage — Conversion time < 1 time at full precision  s including sampling — 4 analog watchdogs with interrupt capability On-chip CAN/UART bootstrap loader with Boot Assist Module (BAM) On-chip TSENS 100 Mbps Automotive Ethernet Transceiver — Supports precision timestamps JPEG/MJPEG 8/12bit Encoder 6 x stereo channels audio interface 2x I2C controller module CRC module BCM89810 Ethernet PHY • • • • • • • • • • This document contains information on a product under development. Freescale reserves the right to change or discontinue this product without notice. © 2014 Freescale Semiconductor, Inc. Table of Contents 1 Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3 1.1 Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3 1.2 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 2 Package pinouts and signal descriptions . . . . . . . . . . . . . . . . .6 2.1 Package pinouts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6 2.2 Signal descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 2.2.1 Power supply and reference voltage pins . . . . . .7 2.2.2 System pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 2.2.3 Pin muxing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18 3.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18 3.2 Parameter classification . . . . . . . . . . . . . . . . . . . . . . . .18 3.3 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . .19 3.4 Recommended operating conditions . . . . . . . . . . . . . .20 Thermal characteristics. . . . . . . . . . . . . . . . . . . . . . . . .21 3.5 3.5.1 General notes for specifications at maximum junction temperature . . . . . . . . . . . . . . . . . . . . .22 3.6 Electromagnetic Interference (EMI) characteristics . . .23 3.7 Electrostatic Discharge (ESD) characteristics . . . . . . .23 3.8 Power management electrical characteristics. . . . . . . .24 3.8.1 Power Management Overview. . . . . . . . . . . . . .24 3.8.2 Voltage regulator electrical characteristics . . . .26 3.8.3 Voltage monitor electrical characteristics. . . . . .28 3.9 Power Up/Down reset sequencing . . . . . . . . . . . . . . . .28 3.10 DC electrical characteristics . . . . . . . . . . . . . . . . . . . . .30 3.11 Main oscillator electrical characteristics . . . . . . . . . . . .31 3.12FMPLL electrical characteristics . . . . . . . . . . . . . . . . . . . . . . 32 3.13 16 MHz RC oscillator electrical characteristics . . . . . . 34 3.14 Analog-to-Digital Converter (ADC) electrical characteristics 35 3.14.1 Input impedance and ADC accuracy . . . . . . . . 35 3.14.2 ADC conversion characteristics . . . . . . . . . . . . 40 3.15 Temperature sensor electrical characteristics . . . . . . . 41 3.16 Flash memory electrical characteristics . . . . . . . . . . . 41 3.17 AC specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 3.17.1 Pad AC specifications. . . . . . . . . . . . . . . . . . . . 44 3.18 AC timing characteristics . . . . . . . . . . . . . . . . . . . . . . . 47 3.18.1 Generic timing diagrams . . . . . . . . . . . . . . . . . 47 3.18.2 RESET_B pin characteristics . . . . . . . . . . . . . . 48 3.18.3 Nexus and JTAG timing . . . . . . . . . . . . . . . . . . 49 3.18.4 GPIO timing . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 3.18.5 External interrupt timing (IRQ pin) . . . . . . . . . . 52 3.18.6 FlexCAN timing . . . . . . . . . . . . . . . . . . . . . . . . 52 3.18.7 LINFlex timing . . . . . . . . . . . . . . . . . . . . . . . . . 52 3.18.8 DSPI timing . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 3.18.9 Video interface timing. . . . . . . . . . . . . . . . . . . . 58 3.18.10Fast ethernet interface. . . . . . . . . . . . . . . . . . . 59 3.18.11I2C timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 3.18.12SAI timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 121 MAPBGA mechanical outline drawing . . . . . . . . . 65 4.1 2 Freescale Semiconductor MPC5606E Microcontroller Data Sheet, Rev. 3 Overview Overview 1 This document provides electrical specifications, pin assignments, and package diagrams for the MPC5606E series of microcontroller units (MCUs). MPC5606E microcontrollers are members of a new family of next generation microcontrollers built on the Power Architecture. This document describes the features of the family and options available within the family members, and highlights important electrical and physical characteristics of the devices. The MPC5606E microcontroller integrates MPC5604E device with the Broadcom(R) BCM89810 single-port BroadR-Reach™ 100 Mbps automotive Ethernet transceiver. All information about configuration of the BCM89810 BroadR-Reach™ Ethernet transceivers is available at https://support.broadcom.com/. The user should request for an account to access BCM89810 documentation, if the access is not there. The MPC5606E microcontroller is a gateway system designed to move data from different sources via Ethernet to a receiving system and vice versa. The supported data sources and sinks are: • • • • Video data (with 8/10/12 bits per data word) Audio data (6 stereo channels) RADAR data (2  12 bit with <1s per sample, digitized externally and read in via SPI) Other serial communication interfaces including CAN, LIN, and SPI The Ethernet module has a bandwidth of 10/100 Mbits/sec and supports precision time stamps (IEEE1588). Unshielded twisted pair cables are used to transfer data (via Ethernet) in the car, resulting in a significant reduction of wiring costs by providing inexpensive high bandwidth data links. Device summary 1.1 Table 1 summarizes the MPC5606E device. Feature CPU Flash with ECC RAM with ECC DMA PIT SWT FCU Ethernet Video Encoder Audio Interface ADC (10-bit) Timer I/O (eTimer) SCI (LINFlex) Table 1. Device summary MPC5606E 121 MAPBGA e200z0h, 64 MHz, VLE only, no SPE CFlash: 512 KB (LC) DFlash: 64 KB (LC, area optimized) 96 KB 16 channels yes yes yes 100 Mbits MII-Lite 8bpp/12bpp 6x Stereo (4x synchronous + 2x synchronous/asynchronous) 14 channels + VDD_IO + VDDCore + TSens + VGate Current1 16 channels 2 Freescale Semiconductor 3 MPC5606E Microcontroller Data Sheet, Rev. 3 Overview Table 1. Device summary (continued) Feature SPI (DSPI) CAN (FlexCAN) IIC Supply Phase Lock Loop (PLL) Internal RC Oscillator External crystal Oscillator CRC Debug MPC5606E 121 MAPBGA DSPI_0: 2 chip selects DSPI_1: 2 chip selects DSPI_2: 4 chip selects 1 2 3.3 V IO 1.2V Core with dedicated ballast source pin in two modes: • internal ballast or (cid:129) external supply (using power on reset pin) 1 FMPLL 16 MHz 4 MHz - 40 MHz yes JTAG Ambient Temperature 1 This feature is supported by design, but subject to confirmation after device characterization. –40 to 125 °C Block diagram 1.2 Figure 1 shows a top-level block diagram of the MPC5606E MCU. 4 Freescale Semiconductor MPC5606E Microcontroller Data Sheet, Rev. 3 Internal and External Ballast 1.2 V Regulator Control XOSC 16 MHz RC Oscillator FMPLL (System) JTAG Port e200z0 Core Integer Execution Unit JTAG 32-bit General Purpose Registers Special Purpose Registers Instruction Unit Branch Prediction Unit Exception Handler Variable Length Encoded Instructions Load/Store Unit Overview Interrupt Controller eDMA 16 channels Master Instruction Bus (32-bit) Master Data Bus (32-bit) Master FEC Master MII PTP BR-100 Broadcom(R) 89810BCM Ehernet PHY Crossbar Switch (XBAR, AMBA 2.0 v6 AHB) Slave Slave Slave 512 KB Code Flash (ECC) 64 KB Data Flash (ECC) 96 KB SRAM (ECC) M G C M G R U C P E M S N E S T Peripheral Bridge Slave video_clk t t u p u O r e f f u B G E P J M I D P ADC 10-bit 4+4 channels r e m T e i l x e F N I L x 2 I P S D x 3 N A C x e F l C R C C 2 I x 3 I A S x 3 D C F M C S S I T P M T S T W S M A B U S I U C F Analog-to-Digital Converter Boot Assist Module Cylic Redundancy Check Deserial Serial Peripheral Interface Enhanced Direct Memory Access Enhanced Timer Fractional Clock Divider Fault Collection Unit Fast Ethernet Controller ADC BAM CRC DSPI eDMA eTimer FCD FCU FEC FlexCAN Flexible Controller Area Network FMPLL I2C SAI LINFlex Serial Communication Interface (LIN support) ME Frequency-Modulated Phase-Locked Loop Inter-Integrated Circuit serial interface Serial Audio Interface 6xStereo Mode Entry Module Clock Generation Module Power Control Unit Reset Generation Module Temperature sensor CGM PCU RGM TSENS MJPEG 12-bit Motion JPEG Encoder PDI PIT PTP SIU SRAM Static Random-Access Memory SSCM System Status and Configuration Module STM SWT Parallel Data Interface (image sensor) Periodic Interrupt Timer IEEE 1588 Precision Time Stamps System Integration Unit System Timer Module Software Watchdog Timer Figure 1. MPC5606E block diagram MPC5606E Microcontroller Data Sheet, Rev. 3 Freescale Semiconductor 5
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