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TM Data Sheet HIN231, HIN232, HIN236, HIN237, HIN238, HIN239, HIN240, HIN241 August 2001 File Number 3138.10 +5V Powered RS-232 Transmitters/Receivers The HIN231-HIN241 family of RS-232 transmitters/receivers interface circuits meet all ElA RS-232E and V.28 specifications, and are particularly suited for those applications where ±12V is not available. They require a single +5V power supply (except HIN231 and HIN239) and feature onboard charge pump voltage converters which generate +10V and -10V supplies from the 5V supply. The family of devices offer a wide variety of RS-232 transmitter/receiver combinations to accommodate various applications (see Selection Table). The drivers feature true TTL/CMOS input compatibility, slewrate-limited output, and 300Ω power-off source impedance. The receivers can handle up to ±30V, and have a 3kΩ to 7kΩ input impedance. The receivers also feature hysteresis to greatly improve noise rejection. Features • Meets All RS-232E and V.28 Specifications • Requires Only Single +5V Power Supply - (+5V and +12V - HIN231 and HIN239) • High Data Rate. . . . . . . . . . . . . . . . . . . . . . . . . . . 120kbps • HIN233 and HIN235 Require No External Capacitors • Onboard Voltage Doubler/Inverter • Low Power Consumption • Low Power Shutdown Function • Three-State TTL/CMOS Receiver Outputs • Multiple Drivers - ±10V Output Swing for 5V lnput - 300Ω Power-Off Source Impedance - Output Current Limiting - TTL/CMOS Compatible - 30V/µs Maximum Slew Rate • Multiple Receivers - ±30V Input Voltage Range - 3kΩ to 7kΩ Input Impedance - 0.5V Hysteresis to Improve Noise Rejection Applications Selection Table • Any System Requiring RS-232 Communication Ports - Computer - Portable, Mainframe, Laptop - Peripheral - Printers and Terminals - Instrumentation - Modems PART NUMBER HIN231 HIN232 HIN236 HIN237 HIN238 HIN239 HIN240 HIN241 POWER SUPPLY VOLTAGE +5V and +7.5V to 13.2V +5V +5V +5V +5V +5V and +7.5V to 13.2V +5V +5V NUMBER OF RS-232 DRIVERS 2 2 4 5 4 3 5 4 NUMBER OF RS-232 RECEIVERS 2 2 3 3 4 5 5 5 EXTERNAL COMPONENTS 2 Capacitors 4 Capacitors 4 Capacitors 4 Capacitors 4 Capacitors 2 Capacitors 4 Capacitors 4 Capacitors LOW POWER SHUTDOWN/TTL THREE-STATE NO/NO NO/NO YES/YES NO/NO NO/NO NO/YES YES/YES YES/YES NUMBER OF LEADS 16 16 24 24 24 24 44 28 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Americas Inc. | Copyright © Intersil Americas Inc. 2001 HIN231 thru HIN241 Ordering Information PART NUMBER HIN231IB HIN232CP TEMP. RANGE (oC) PACKAGE -40 to 85 16 Ld SOIC 0 to 70 16 Ld PDIP HIN232CB HIN232IP HIN232IB HIN236CP HIN236CB 0 to 70 -40 to 85 -40 to 85 0 to 70 0 to 70 16 Ld SOIC 16 Ld PDIP 16 Ld SOIC 24 Ld PDIP 24 Ld SOIC HIN236IB HIN237CB HIN238CP -40 to 85 0 to 70 0 to 70 24 Ld SOIC 24 Ld SOIC 24 Ld PDIP PKG. NO. M16.3 E16.3 M16.3 E16.3 M16.3 E24.3 M24.3 M24.3 M24.3 E24.3 Ordering Information (Continued) PART NUMBER TEMP. RANGE (oC) PACKAGE PKG. NO. HIN238CB 0 to 70 24 Ld SOIC M24.3 HIN238IB -40 to 85 24 Ld SOIC M24.3 HIN239CB 0 to 70 24 Ld SOIC M24.3 HIN239CP 0 to 70 24 Ld PDIP E24.3 HIN239IB -40 to 85 24 Ld SOIC M24.3 HIN240CN 0 to 70 44 Ld MQFP Q44.10X10 HIN241CB 0 to 70 28 Ld SOIC M28.3 HIN241IB HIN241CA -40 to 85 0 to 70 28 Ld SOIC 28 Ld SSOP M28.3 M28.209 NOTE: Many of the surface mount devices are available on tape and reel; add -T to suffix. Pin Descriptions PIN VCC V+ VGND C1+ C1C2+ C2TIN TOUT RIN ROUT EN SHUTDOWN NC FUNCTION Power Supply Input 5V ±10%. Internally generated positive supply (+10V nominal), HIN231 and HIN239 require +7.5V to +13.2V. Internally generated negative supply (-10V nominal). Ground lead. Connect to 0V. External capacitor (+ terminal) is connected to this lead. External capacitor (- terminal) is connected to this lead. External capacitor (+ terminal) is connected to this lead. External capacitor (- terminal) is connected to this lead. Transmitter Inputs. These leads accept TTL/CMOS levels. An internal 400kΩ pull-up resistor to VCC is connected to each lead. Transmitter Outputs. These are RS-232 levels (nominally ±10V). Receiver Inputs. These inputs accept RS-232 input levels. An internal 5kΩ pull-down resistor to GND is connected to each input. Receiver Outputs. These are TTL/CMOS levels. Enable input. This is an active low input which enables the receiver outputs. With EN = 5V, the outputs are placed in a high impedance state. Shutdown Input. With SHUTDOWN = 5V, the charge pump is disabled, the receiver outputs are in a high impedance state and the transmitters are shut off. No Connect. No connections are made to these leads. 2 HIN231 thru HIN241 Pinouts HIN231 (SOIC) TOP VIEW C+ 1 C- 2 V- 3 T2OUT 4 R2IN 5 R2OUT 6 T2IN 7 NC 8 (NOTE 1) 16 V+ (14) 15 VCC (13) 14 GND (12) 13 T1OUT (11) 12 R1IN (10) 11 R1OUT (9) 10 T1IN (8) 9 NC HIN232 (PDIP, SOIC) TOP VIEW C1+ 1 V+ 2 C1- 3 C2+ 4 C2- 5 V- 6 T2OUT 7 R2IN 8 16 VCC 15 GND 14 T1OUT 13 R1IN 12 R1OUT 11 T1IN 10 T2IN 9 R2OUT NOTE: 1. Pin numbers in parentheses are for PDIP Package. +5V +7.5V TO +13.2V (NOTE 2) 15 VCC 16 V+ 1µF (NOTE 2) 1 + C1+ 2 C1- +12V TO -12V VOLTAGE INVERTER T1IN +5V T1 10 400kΩ V- 3 1µF + 13 T1OUT T2IN +5V T2 7 400kΩ 4 T2OUT 11 R1OUT 12 R1 5kΩ R1IN 6 R2OUT 5 R2 5kΩ R2IN 14 OTE: 2. For V+ > 11V, use C1 ≤ 0.1µF. + 1µF +5V 16 NOTE 3 NOTE 3 T1IN 1 VCC + C1+ +5V TO 10V 2 3 C1- VOLTAGE DOUBLER V+ 4 + C2+ +10V TO -10V 5 C2- VOLTAGE INVERTER V- 6 NOTE 3 + NOTE 3 + +5V T1 11 400kΩ 14 T1OUT T2IN +5V T2 10 400kΩ 7 T2OUT 12 R1OUT 13 R1 5kΩ R1IN 9 R2OUT 8 R2 5kΩ R2IN 15 NOTE: 3. Either 0.1µF or 1µF capacitors may be used. The V+ capacitor may be terminated to VCC or to GND. 3 HIN231 thru HIN241 Pinouts (Continued) HIN236 (PDIP, SOIC) TOP VIEW T3OUT 1 T1OUT 2 T2OUT 3 R1IN 4 R1OUT 5 T2IN 6 T1IN 7 GND 8 VCC 9 C1+ 10 V+ 11 C1- 12 24 T4OUT 23 R2IN 22 R2OUT 21 SHUTDOWN 20 EN 19 T4IN 18 T3IN 17 R3OUT 16 R3IN 15 V14 C213 C2+ HIN237 (PDIP, SOIC) TOP VIEW T3OUT 1 T1OUT 2 T2OUT 3 R1IN 4 R1OUT 5 T2IN 6 T1IN 7 GND 8 VCC 9 C1+ 10 V+ 11 C1- 12 24 T4OUT 23 R2IN 22 R2OUT 21 T5IN 20 T5OUT 19 T4IN 18 T3IN 17 R3OUT 16 R3IN 15 V14 C213 C2+ 1µF 1µF T1IN T2IN T3IN T4IN R1OUT +5V 10 + C1+ 12 C1- 13 + C2+ 14 C2- 9 VCC +5V TO 10V VOLTAGE DOUBLER +10V TO -10V VOLTAGE INVERTER V+ 11 V- 15 +5V T1 7 400kΩ 2 +5V T2 6 400kΩ 3 +5V T3 18 400kΩ +5V T4 19 400kΩ 5 R1 1 24 4 5kΩ 1µF + 1µF + T1OUT T2OUT T3OUT T4OUT R1IN 22 R2OUT 23 R2IN R2 5kΩ 17 R3OUT 20 EN R3 5kΩ 8 16 R3IN 21 SHUTDOWN 1µF 1µF T1IN T2IN T3IN T4IN T5IN R1OUT +5V 10 + C1+ 12 C1- 13 + C2+ 14 C2- 9 VCC +5V TO 10V VOLTAGE DOUBLER +10V TO -10V VOLTAGE INVERTER V+ 11 V- 15 +5V T1 7 400kΩ 2 1µF + 1µF + T1OUT +5V T2 6 400kΩ 3 T2OUT +5V T3 18 400kΩ +5V T4 19 400kΩ +5V T5 21 400kΩ 5 R1 1 24 20 4 5kΩ T3OUT T4OUT T5OUT R1IN 22 R2OUT 23 R2 5kΩ R2IN 17 R3OUT 16 R3 5kΩ R3IN 8 4 Pinouts (Continued) HIN238 (PDIP, SOIC) TOP VIEW HIN231 thru HIN241 HIN239 (SOIC) TOP VIEW T2OUT 1 T1OUT 2 R2IN 3 R2OUT 4 T1IN 5 R1OUT 6 R1IN 7 GND 8 VCC 9 C1+ 10 V+ 11 C1- 12 24 T3OUT 23 R3IN 22 R3OUT 21 T4IN 20 T4OUT 19 T3IN 18 T2IN 17 R4OUT 16 R4IN 15 V14 C213 C2+ R1OUT 1 R1IN 2 GND 3 VCC 4 V+ 5 C1+ 6 C1- 7 V- 8 R5IN 9 R5OUT 10 R4OUT 11 R4IN 12 24 T1IN 23 T2IN 22 R2OUT 21 R2IN 20 T2OUT 19 T1OUT 18 R3IN 17 R3OUT 16 T3IN 15 NC 14 EN 13 T3OUT 1µF 1µF T1IN T2IN T3IN T4IN R1OUT +5V 10 + C1+ 12 C1- 13 + C2+ 14 C2- 9 VCC +5V TO 10V VOLTAGE DOUBLER +10V TO -10V VOLTAGE INVERTER V+ 11 V- 15 +5V T1 5 400kΩ 2 1µF + 1µF + T1OUT +5V T2 18 400kΩ 1 T2OUT +5V T3 19 400kΩ +5V T4 21 400kΩ 6 R1 24 20 7 5kΩ T3OUT T4OUT R1IN 4 R2OUT 3 R2 5kΩ R2IN 22 R3OUT 23 R3 5kΩ R3IN 17 R4OUT 16 R4 5kΩ R4IN 8 +5V +7.5V TO +13.2V (NOTE) 1µF (NOTE) 6 + C1+ 7 C1- 4 VCC +10V TO -10V VOLTAGE INVERTER V+ 5 V- 8 +5V T1 24 400kΩ 19 T1IN 1µF + T1OUT T2IN +5V T2 23 400kΩ 20 T2OUT T3IN R1OUT +5V T3 16 400kΩ 1 R1 13 2 5kΩ T3OUT R1IN 22 R2OUT 21 R2 5kΩ R2IN 17 R3OUT 18 R3 5kΩ R3IN 11 R4OUT 12 R4 5kΩ R4IN 10 R5OUT 14 EN 9 R5 5kΩ R5IN 3 NOTE: For V+ > 11V, use C1 ≤ 0.1µF. 5 HIN231 thru HIN241 Pinouts (Continued) HIN240 (MQFP) NC SHUT DOWN EN T5OUT R4IN R4OUT T4IN T3IN R5OUT R5IN NC NC 44 43 42 41 40 39 38 37 36 35 34 1 33 NC T5IN 2 32 NC R3OUT 3 31 NC R3IN 4 30 V- T4OUT 5 29 C2- T3OUT 6 28 C2+ T1OUT 7 27 C1- T2OUT 8 26 V+ NC 9 25 C1+ R2IN 10 24 NC NC 11 23 12 13 14 15 16 17 18 19 20 21 22 NC HIN241 (SOIC, SSOP) TOP VIEW T3OUT 1 T1OUT 2 T2OUT 3 R2IN 4 R2OUT 5 T2IN 6 T1IN 7 R1OUT 8 R1IN 9 GND 10 VCC 11 C1+ 12 V+ 13 C1- 14 28 T4OUT 27 R3IN 26 R3OUT 25 SHUTDOWN 24 EN 23 R4IN 22 R4OUT 21 T4IN 20 T3IN 19 R5OUT 18 R5IN 17 V16 C215 C2+ NC R2OUT T2IN T1IN R1OUT R1IN GND VCC NC NC NC 1µF 1µF T1IN T2IN T3IN T4IN T5IN R1OUT R2OUT R3OUT R4OUT R5OUT EN 25 + C1+ 27 C128 + C2+ 29 C2- +5V 19 VCC +5V TO 10V VOLTAGE DOUBLER +10V TO -10V VOLTAGE INVERTER +5V T1 15 400kΩ +5V T2 14 400kΩ 26 V+ V- 30 7 8 1µF + 1µF T1OUT T2OUT +5V T3 37 400kΩ +5V T4 38 400kΩ +5V T5 2 400kΩ 16 R1 6 5 41 17 5kΩ T3OUT T4OUT T5OUT R1IN 13 10 R2IN R2 5kΩ 3 4 R3IN R3 5kΩ 39 40 R4IN R4 5kΩ 36 35 R5IN R5 5kΩ 42 43 SHUTDOWN 18 6 1µF 1µF T1IN T2IN T3IN T4IN R1OUT R2OUT R3OUT R4OUT R5OUT EN 12 + C1+ 14 C115 + C2+ 16 C2- +5V 11 VCC +5V TO 10V VOLTAGE DOUBLER +10V TO -10V VOLTAGE INVERTER 13 V+ V- 17 +5V T1 7 400kΩ 2 1µF + + 1µF T1OUT +5V T2 6 400kΩ 3 T2OUT +5V T3 20 400kΩ +5V T4 21 400kΩ 8 R1 1 28 9 5kΩ T3OUT T4OUT R1IN 5 4 R2IN R2 5kΩ 26 27 R3IN R3 5kΩ 22 23 R4IN R4 5kΩ 19 18 R5IN R5 5kΩ 24 25 SHUTDOWN 10 HIN231 thru HIN241 Absolute Maximum Ratings VCC to Ground . . . . . . . . . . . . . . . . . . . . . . (GND -0.3V) < VCC < 6V V+ to Ground (Note 4) . . . . . . . . . . . . . . . (VCC -0.3V) < V+ < 13.2V V- to Ground. . . . . . . . . . . . . . . . . . . . . . . . -12V < V- < (GND +0.3V) V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24V Input Voltages TIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V < VIN < (V+ +0.3V) RIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±30V Output Voltages TOUT . . . . . . . . . . . . . . . . . . . .(V- -0.3V) < VTXOUT < (V+ +0.3V) ROUT . . . . . . . . . . . . . . . . . (GND -0.3V) < VRXOUT < (V+ +0.3V) Short Circuit Duration TOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Continuous ROUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Continuous Thermal Information Thermal Resistance (Typical, Note 5) θJA (oC/W) 16 Ld PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . 90 24 Ld PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . 70 16 Ld SOIC (W) Package. . . . . . . . . . . . . . . . . . . . . 100 24 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . 75 28 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . 70 28 Ld SSOP Package . . . . . . . . . . . . . . . . . . . . . . . 95 44 Ld MQFP Package . . . . . . . . . . . . . . . . . . . . . . . 80 Maximum Junction Temperature (Plastic Package) . . . . . . . . 150oC Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC (SOIC, SSOP, MQFP - Lead Tips Only) Operating Conditions Temperature Range HIN2XXCX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 70oC HIN2XXIX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 4. Only HIN231 and HIN239. For V+ > 11V, C1 must be ≤0.1µF. 5. θJA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details. Electrical Specifications Test Conditions: VCC = +5V ±10%, TA = Operating Temperature Range PARAMETER TEST CONDITIONS MIN SUPPLY CURRENTS Power Supply Current, ICC No Load, HIN232 - TA = 25oC HIN236-238, HIN240-241 - HIN231, HIN239 - V+ No Power Supply Current, Load, TA = 25oC ICC No Load, TA = 25oC HIN231 HIN239 - Shutdown Supply Current, ICC(SD) TA = 25oC - LOGIC AND TRANSMITTER INPUTS, RECEIVER OUTPUTS Input Logic Low, VlL Input Logic High, VlH TIN, EN, Shutdown - TIN 2.0 EN, Shutdown 2.4 Transmitter Input Pullup Current, IP TTL/CMOS Receiver Output Voltage Low, VOL TTL/CMOS Receiver Output Voltage High, VOH RECEIVER INPUTS TIN = 0V - IOUT = 1.6mA - (HIN231 IOUT = 3.2mA) IOUT = -1.0mA 3.5 RS-232 Input Voltage Range VIN Receiver Input Impedance RIN Receiver Input Low Threshold, VlN (H-L) Receiver Input High Threshold, VIN (L-H) Receiver Input Hysteresis VHYST -30 VIN = ±3V 3.0 VCC = 5V, TA = 25oC 0.8 VCC = 5V, TA = 25oC - 0.2 TYP 5 7 0.4 1.8 5.0 1 15 0.1 4.6 5.0 1.2 1.7 0.5 MAX UNITS 10 mA 15 mA 1 mA 5 mA 15 mA 10 µA 0.8 V - V - V 200 µA 0.4 V - V +30 V 7.0 kΩ - V 2.4 V 1.0 V 7 HIN231 thru HIN241 Electrical Specifications Test Conditions: VCC = +5V ±10%, TA = Operating Temperature Range (Continued) PARAMETER TEST CONDITIONS MIN TYP TIMING CHARACTERISTICS Baud Rate (1 Transmitter Switching) Output Enable Time, tEN Output Disable Time, tDIS Propagation Delay, tPD Instantaneous Slew Rate SR RL = 3kΩ HIN236, 239, 240, 241 120 - - 400 HIN236, 236, 239, 240, 241 - 250 RS-232 to TTL - 0.5 CL = 10pF, RL = 3kΩ, TA = 25oC - - (Note 6) Transition Region Slew Rate, SRT RL = 3kΩ, CL = 2500pF Measured - 3 from +3V to -3V or -3V to +3V, 1 Transmitter Switching TRANSMITTER OUTPUTS Output Voltage Swing, TOUT Output Resistance, ROUT RS-232 Output Short Circuit Current, ISC NOTE: 6. Guaranteed by design. Transmitter Outputs, 3kΩ to Ground ±5 ±9 VCC = V+ = V- = 0V, VOUT = ±2V 300 - TOUT shorted to GND - ±10 MAX UNITS - kbps - ns - ns - µs 30 V/µs - V/µs ±10 V - Ω - mA VCC GND VOLTAGE DOUBLER S1 C1+ S2 + C1 - S3 C1- S4 RC OSCILLATOR V+ = 2VCC VOLTAGE INVERTER S5 C2+ S6 + C3 VCC GND S7 + C2 - C2- S8 + C4 - GND V- = -(V+) FIGURE 1. CHARGE PUMP Detailed Description The HIN232 thru HIN241 family of RS-232 transmitters/receivers are powered by a single +5V power supply (except HIN231 and HIN239), feature low power consumption, and meet all ElA RS-232C and V.28 specifications. The circuit is divided into three sections: The charge pump, transmitter, and receiver. Charge Pump An equivalent circuit of the charge pump is illustrated in Figure 1. The charge pump contains two sections: the voltage doubler and the voltage inverter. Each section is driven by a two phase, internally generated clock to generate +10V and -10V. The nominal clock frequency is 16kHz. During phase one of the clock, capacitor C1 is charged to VCC. During phase two, the voltage on C1 is added to VCC, producing a signal across C3 equal to twice VCC. During phase one, C2 is also charged to 2VCC, and then during phase two, it is inverted with respect to ground to produce a signal across C4 equal to -2VCC. The charge pump accepts input voltages up to 5.5V. The output impedance of the voltage doubler section (V+) is approximately 200Ω, and the output impedance of the voltage inverter section (V-) is approximately 450Ω. A typical application uses 1µF capacitors for C1-C4, however, the value is not critical. Increasing the values of C1 and C2 will lower the output impedance of the voltage doubler and inverter, increasing the values of the reservoir capacitors, C3 and C4, lowers the ripple on the V+ and V- supplies. During shutdown mode (HIN236, 240 and 241), SHUTDOWN control line set to logic “1”, the charge pump is turned off, V+ is pulled down to VCC , V- is pulled up to GND, and the supply current is reduced to less than 10µA. The transmitter outputs are disabled and the receiver outputs are placed in the high impedance state. Transmitters The transmitters are TTL/CMOS compatible inverters which translate the inputs to RS-232 outputs. The input logic 8 HIN231 thru HIN241 threshold is about 26% of VCC, or 1.3V for VCC = 5V. A logic 1 at the input results in a voltage of between -5V and V- at the output, and a logic 0 results in a voltage between +5V and (V+ -0.6V). Each transmitter input has an internal 400kΩ pullup resistor so any unused input can be left unconnected and its output remains in its low state. The output voltage swing meets the RS-232C specifications of ±5V minimum with the worst case conditions of: all transmitters driving 3kΩ minimum load impedance, VCC = 4.5V, and maximum allowable operating temperature. The transmitters have an internally limited output slew rate which is less than 30V/µs. The outputs are short circuit protected and can be shorted to ground indefinitely. The powered down output impedance is a minimum of 300Ω with ±2V applied to the outputs and VCC = 0V. V+ VCC 400kΩ TXIN GND < TXIN < VCC 300Ω TOUT V- < VTOUT < V+ VFIGURE 2. TRANSMITTER Receivers The receiver inputs accept up to ±30V while presenting the required 3kΩ to 7kΩ input impedance even if the power is off (VCC = 0V). The receivers have a typical input threshold of 1.3V which is within the ±3V limits, known as the transition region, of the RS-232 specifications. The receiver output is 0V to VCC. The output will be low whenever the input is greater than 2.4V and high whenever the input is floating or driven between +0.8V and -30V. The receivers feature 0.5V hysteresis to improve noise rejection. The receiver Enable line EN, when set to logic “1”, (HIN236, 239, 240, and 241) disables the receiver outputs, placing them in the high impedance mode. The receiver outputs are also placed in the high impedance state when in shutdown mode. VCC RXIN -30V < RXIN < +30V 5kΩ ROUT GND < VROUT < VCC GND FIGURE 3. RECEIVER TIN OR RIN TOUT OR ROUT tPHL tPLH VOL VOL Average Propagation Delay = tPHL + 2 tPLH FIGURE 4. PROPAGATION DELAY DEFINITION Typical Performance Curves V- SUPPLY VOLTAGE SUPPLY VOLTAGE (|V|) 12 1µF 10 0.47µF 8 0.10µF 6 4 2 0 3.0 3.5 4.0 4.5 5.0 5.5 6.0 VCC FIGURE 5. V- SUPPLY VOLTAGE vs VCC , VARYING CAPACITORS TA = 25oC 12 TRANSMITTER OUTPUTS OPEN CIRCUIT 10 8 V+ (VCC = 5V) 6 4 V- (VCC = 4.5V) 2 V+ (VCC = 4.5V) V- (VCC = 5V) 0 0 5 10 15 20 25 30 35 |ILOAD| (mA) FIGURE 6. V+, V- OUTPUT VOLTAGE vs LOAD (HIN232) 9 HIN231 thru HIN241 Test Circuits (HIN232) 1µF - C3 + 1µF + C1 - 1 C1+ 2 V+ 3 C1- VCC 16 GND 15 T1OUT 14 1µF + C2 - 4 C2+ 5 C2- R1IN 13 R1OUT 12 -+ 6 V- T1IN 11 3kΩ 1µF C4 7 T2OUT T2IN 10 T2 OUTPUT 8 R2IN R2OUT 9 RS-232 ±30V INPUT +4.5V TO +5.5V INPUT 3kΩ T1 OUTPUT RS-232 ±30V INPUT TTL/CMOS OUTPUT TTL/CMOS INPUT TTL/CMOS INPUT TTL/CMOS OUTPUT FIGURE 7. GENERAL TEST CIRCUIT Applications The HIN2XX may be used for all RS-232 data terminal and communication links. It is particularly useful in applications where ±12V power supplies are not available for conventional RS-232 interface circuits. The applications presented represent typical interface configurations. A simple duplex RS-232 port with CTS/RTS handshaking is illustrated in Figure 9. Fixed output signals such as DTR (data terminal ready) and DSRS (data signaling rate select) is generated by driving them through a 5kΩ resistor connected to V+. In applications requiring four RS-232 inputs and outputs (Figure 10), note that each circuit requires two charge pump capacitors (C1 and C2) but can share common reservoir capacitors (C3 and C4). The benefit of sharing common reservoir capacitors is the elimination of two capacitors and the reduction of the charge pump source impedance which effectively increases the output swing of the transmitters. 1 C1+ 2 V+ VCC 16 GND 15 3 C14 C2+ T1OUT 14 R1IN 13 5 C2- R1OUT 12 6 V7 T2OUT T1IN 11 T2IN 10 8 R2IN R2OUT 9 ROUT = VIN/1T2OUT T1OUT VIN = ±2V A FIGURE 8. POWER-OFF SOURCE RESISTANCE CONFIGURATION +5V 1 C1 + 1µF - 3 4 C2 + 1µF - 5 16 HIN232 11 TD 10 TTL/CMOS RTS T1 T2 INPUTS AND 12 OUTPUTS RD CTS 9 R2 R1 - + DTR (20) DATA 2 TERMINAL READY DSRS (24) DATA SIGNALING RATE 6 - SELECT + RS-232 INPUTS AND OUTPUTS 14 TD (2) TRANSMIT DATA 7 RTS (4) REQUEST TO SEND 13 RD (3) RECEIVE DATA 8 CTS (5) CLEAR TO SEND 15 SIGNAL GROUND (7) FIGURE 9. SIMPLE DUPLEX RS-232 PORT WITH CTS/RTS HANDSHAKING 10 HIN231 thru HIN241 TTL/CMOS INPUTS AND OUTPUTS 1 C1 + 1µF - 3 HIN232 11 TD 10 RTS T1 T2 12 RD CTS 9 R2 R1 4 + C2 5 - 1µF 14 TD (2) TRANSMIT DATA 7 RTS (4) REQUEST TO SEND 13 RD (3) RECEIVE DATA 8 CTS (5) CLEAR TO SEND 15 + + C4 - 2µF 6 2 V- V+ 6 2 16 C3 - 2µF 16 +5V RS-232 INPUTS AND OUTPUTS TTL/CMOS INPUTS AND OUTPUTS 1 C1 + 1µF - 3 HIN232 11 DTR DSRS 10 T1 T2 12 DCD R1 9 R2 R1 4 + C2 5 - 1µF 14 DTR (20) DATA TERMINAL READY 7 DSRS (24) DATA SIGNALING RATE SELECT 13 DCD (8) DATA CARRIER DETECT 8 R1 (22) RING INDICATOR 15 SIGNAL GROUND (7) FIGURE 10. COMBINING TWO HIN232s FOR 4 PAIRS OF RS-232 INPUTS AND OUTPUTS 11 HIN231 thru HIN241 Die Characteristics DIE DIMENSIONS 160 mils x 140 mils METALLIZATION Type: Al Thickness: 10kÅ ±1kÅ SUBSTRATE POTENTIAL V+ Metallization Mask Layout R2IN T2OUT T1OUT PASSIVATION Type: Nitride over Silox Nitride Thickness: 8kÅ Silox Thickness: 7kÅ TRANSISTOR COUNT 238 PROCESS CMOS Metal Gate HIN240 T3OUT T4OUT R3IN R3OUT T5IN R2OUT T2IN T1IN R1OUT SHUTDOWN EN T5OUT R4IN R1IN GND VCC C1+ V+ C1- C2+ 12 C2- V- R4OUT T4IN T3IN R5OUT R5IN HIN231 thru HIN241 Dual-In-Line Plastic Packages (PDIP) INDEX AREA N 12 3 E1 N/2 -B- -A- D E BASE PLANE SEATING PLANE -C- A2 A L CL D1 D1 A1 eA B1 e B eC C 0.010 (0.25) M C A B S eB NOTES: 1. Controlling Dimensions: INCH. In case of conflict between English and Metric dimensions, the inch dimensions control. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication No. 95. 4. Dimensions A, A1 and L are measured with the package seated in JEDEC seating plane gauge GS-3. 5. D, D1, and E1 dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.010 inch (0.25mm). 6. E and eA are measured with the leads constrained to be perpendicular to datum -C- . 7. eB and eC are measured at the lead tips with the leads unconstrained. eC must be zero or greater. 8. B1 maximum dimensions do not include dambar protrusions. Dambar protrusions shall not exceed 0.010 inch (0.25mm). 9. N is the maximum number of terminal positions. 10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3, E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm). E16.3 (JEDEC MS-001-BB ISSUE D) 16 LEAD DUAL-IN-LINE PLASTIC PACKAGE INCHES MILLIMETERS SYMBOL MIN MAX MIN MAX NOTES A - 0.210 - 5.33 4 A1 0.015 - 0.39 - 4 A2 0.115 0.195 2.93 4.95 - B 0.014 0.022 0.356 0.558 - B1 0.045 0.070 1.15 1.77 8, 10 C 0.008 0.014 0.204 0.355 - D 0.735 0.775 18.66 19.68 5 D1 0.005 - 0.13 - 5 E 0.300 0.325 7.62 8.25 6 E1 0.240 0.280 6.10 7.11 5 e 0.100 BSC 2.54 BSC - eA 0.300 BSC 7.62 BSC 6 eB - 0.430 - 10.92 7 L 0.115 0.150 2.93 3.81 4 N 16 16 9 Rev. 0 12/93 13 HIN231 thru HIN241 Dual-In-Line Plastic Packages (PDIP) INDEX AREA N 12 3 E1 N/2 -B- -A- D E BASE PLANE SEATING PLANE -C- A2 A L CL D1 D1 A1 eA B1 e B eC C 0.010 (0.25) M C A B S eB NOTES: 1. Controlling Dimensions: INCH. In case of conflict between English and Metric dimensions, the inch dimensions control. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication No. 95. 4. Dimensions A, A1 and L are measured with the package seated in JEDEC seating plane gauge GS-3. 5. D, D1, and E1 dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.010 inch (0.25mm). 6. E and eA are measured with the leads constrained to be perpendicular to datum -C- . 7. eB and eC are measured at the lead tips with the leads unconstrained. eC must be zero or greater. 8. B1 maximum dimensions do not include dambar protrusions. Dambar protrusions shall not exceed 0.010 inch (0.25mm). 9. N is the maximum number of terminal positions. 10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3, E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm). E24.3 (JEDEC MS-001-AF ISSUE D) 24 LEAD NARROW BODY DUAL-IN-LINE PLASTIC PACKAGE INCHES MILLIMETERS SYMBOL MIN MAX MIN MAX NOTES A - 0.210 - 5.33 4 A1 0.015 - 0.39 - 4 A2 0.115 0.195 2.93 4.95 - B 0.014 0.022 0.356 0.558 - B1 0.045 0.070 1.15 1.77 8 C 0.008 0.014 0.204 0.355 - D 1.230 1.280 31.24 32.51 5 D1 0.005 - 0.13 - 5 E 0.300 0.325 7.62 8.25 6 E1 0.240 0.280 6.10 7.11 5 e 0.100 BSC 2.54 BSC - eA 0.300 BSC 7.62 BSC 6 eB - 0.430 - 10.92 7 L 0.115 0.150 2.93 3.81 4 N 24 24 9 Rev. 0 12/93 14 HIN231 thru HIN241 Small Outline Plastic Packages (SOIC) N INDEX AREA H E -B- 0.25(0.010) M B M 123 -AD SEATING PLANE A L h x 45o -C- µα e A1 C B 0.10(0.004) 0.25(0.010) M C A M B S NOTES: 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch) 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. M16.3 (JEDEC MS-013-AA ISSUE C) 16 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE INCHES MILLIMETERS SYMBOL MIN MAX MIN MAX NOTES A 0.0926 0.1043 2.35 2.65 - A1 0.0040 0.0118 0.10 0.30 - B 0.013 0.0200 0.33 0.51 9 C 0.0091 0.0125 0.23 0.32 - D 0.3977 0.4133 10.10 10.50 3 E 0.2914 0.2992 7.40 7.60 4 e 0.050 BSC 1.27 BSC - H 0.394 0.419 10.00 10.65 - h 0.010 0.029 0.25 0.75 5 L 0.016 0.050 0.40 1.27 6 N 16 16 7 α 0o 8o 0o 8o - Rev. 0 12/93 15 HIN231 thru HIN241 Small Outline Plastic Packages (SOIC) N INDEX AREA H E -B- 0.25(0.010) M B M 123 -AD SEATING PLANE A L h x 45o -C- µα e A1 C B 0.10(0.004) 0.25(0.010) M C A M B S NOTES: 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch) 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. M24.3 (JEDEC MS-013-AD ISSUE C) 24 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE INCHES MILLIMETERS SYMBOL MIN MAX MIN MAX NOTES A 0.0926 0.1043 2.35 2.65 - A1 0.0040 0.0118 0.10 0.30 - B 0.013 0.020 0.33 0.51 9 C 0.0091 0.0125 0.23 0.32 - D 0.5985 0.6141 15.20 15.60 3 E 0.2914 0.2992 7.40 7.60 4 e 0.05 BSC 1.27 BSC - H 0.394 0.419 10.00 10.65 - h 0.010 0.029 0.25 0.75 5 L 0.016 0.050 0.40 1.27 6 N 24 24 7 α 0o 8o 0o 8o - Rev. 0 12/93 16 HIN231 thru HIN241 Small Outline Plastic Packages (SOIC) N INDEX AREA H E -B- 0.25(0.010) M B M 123 -AD SEATING PLANE A L h x 45o -C- µα e A1 C B 0.10(0.004) 0.25(0.010) M C A M B S NOTES: 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch) 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. M28.3 (JEDEC MS-013-AE ISSUE C) 28 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE INCHES MILLIMETERS SYMBOL MIN MAX MIN MAX NOTES A 0.0926 0.1043 2.35 2.65 - A1 0.0040 0.0118 0.10 0.30 - B 0.013 0.0200 0.33 0.51 9 C 0.0091 0.0125 0.23 0.32 - D 0.6969 0.7125 17.70 18.10 3 E 0.2914 0.2992 7.40 7.60 4 e 0.05 BSC 1.27 BSC - H 0.394 0.419 10.00 10.65 - h 0.01 0.029 0.25 0.75 5 L 0.016 0.050 0.40 1.27 6 N 28 28 7 α 0o 8o 0o 8o - Rev. 0 12/93 17 HIN231 thru HIN241 Shrink Small Outline Plastic Packages (SSOP) N INDEX AREA H E -B- 0.25(0.010) M B M GAUGE PLANE 123 -AD SEATING PLANE A L 0.25 0.010 -C- µα e A1 A2 C B 0.10(0.004) 0.25(0.010) M C A M B S NOTES: 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.20mm (0.0078 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.20mm (0.0078 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. Dimension “B” does not include dambar protrusion. Allowable dambar protrusion shall be 0.13mm (0.005 inch) total in excess of “B” dimension at maximum material condition. 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. M28.209 (JEDEC MO-150-AH ISSUE B) 28 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE INCHES MILLIMETERS SYMBOL MIN MAX MIN MAX NOTES A - 0.078 - 2.00 - A1 0.002 - 0.05 - - A2 0.065 0.072 1.65 1.85 - B 0.009 0.014 0.22 0.38 9 C 0.004 0.009 0.09 0.25 - D 0.390 0.413 9.90 10.50 3 E 0.197 0.220 5.00 5.60 4 e 0.026 BSC 0.65 BSC - H 0.292 0.322 7.40 8.20 - L 0.022 0.037 0.55 0.95 6 N 28 28 7 α 0o 8o 0o 8o - Rev. 1 3/95 18 HIN231 thru HIN241 Metric Plastic Quad Flatpack Packages (MQFP) D D1 -D- -A- -B- E E1 e PIN 1 -H- 0.40 0.016 MIN 0o MIN 0o-7o L SEATING A PLANE 12o-16o A2 A1 0.076 0.003 -C- 0.20 0.008 M C A-B S DS b b1 12o-16o 0.13/0.17 0.005/0.007 BASE METAL WITH PLATING 0.13/0.23 0.005/0.009 Q44.10x10 (JEDEC MS-022AB ISSUE B) 44 LEAD METRIC PLASTIC QUAD FLATPACK PACKAGE INCHES MILLIMETERS SYMBOL MIN MAX MIN MAX NOTES A - 0.096 - 2.45 - A1 0.004 0.010 0.10 0.25 - A2 0.077 0.083 1.95 2.10 - b 0.012 0.018 0.30 0.45 6 b1 0.012 0.016 0.30 0.40 - D 0.515 0.524 13.08 13.32 3 D1 0.389 0.399 9.88 10.12 4, 5 E 0.516 0.523 13.10 13.30 3 E1 0.390 0.398 9.90 10.10 4, 5 L 0.029 0.040 0.73 1.03 - N 44 44 7 e 0.032 BSC 0.80 BSC - NOTES: Rev. 2 4/99 1. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. 2. All dimensions and tolerances per ANSI Y14.5M-1982. 3. Dimensions D and E to be determined at seating plane -C- . 4. Dimensions D1 and E1 to be determined at datum plane -H- . 5. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is 0.25mm (0.010 inch) per side. 6. Dimension b does not include dambar protrusion. Allowable dambar protrusion shall be 0.08mm (0.003 inch) total. 7. “N” is the number of terminal positions. All Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at website www.intersil.com/design/quality/iso.asp Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site www.intersil.com Sales Office Headquarters NORTH AMERICA Intersil Corporation 2401 Palm Bay Rd. Palm Bay, FL 32905 TEL: (321) 724-7000 FAX: (321) 724-7240 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 ASIA Intersil Ltd. 8F-2, 96, Sec. 1, Chien-kuo North, Taipei, Taiwan 104 Republic of China TEL: 886-2-2515-8508 FAX: 886-2-2515-8369 19

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