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Product Folder Sample & Buy Technical Documents Tools & Software Support & Community bq27546-G1 ZHCSDO4 – MAY 2015 bq27546-G1 针对电池组集成的单节锂离子电池电量监测计 1 特性 •1 电池电量监测计适用于 1 节 (1sXp) 锂离子电池应 用(最高容量 14500mAh) • 微控制器外设提供: – 精确的电池电量监测,最高支持 14500mAh – 用于电池温度报告的内部或者外部温度传感器 – 安全哈希算法 (SHA)-1 / 哈希消息认证码 (HMAC) 认证 – 使用寿命的数据记录 – 64 字节非易失性暂用闪存 • 基于已获专利的 Impedance Track™ 技术的电池电 量计量 – 用于电池续航能力精确预测的电池放电模拟曲线 – 可针对电池老化、电池自放电以及温度/速率低 效情况进行自动调节 – 低值感应电阻器(5mΩ 至 20mΩ) • 高级电量计量特性 – 内部短路检测 – 电池端子断开侦测 • 高速 1 线 (HDQ) 和 I2C 接口格式,用于与主机系 统通信 • 小型 15 焊球 Nano-Free™ 芯片尺寸球状引脚栅格 阵列 (DSBGA) 封装 2 应用 • 智能手机 • 平板电脑 • 数码相机与视频摄像机 • 手持式终端 • MP3 或多媒体播放器 3 说明 bq27546-G1 锂离子电池电量监测计是一款微控制器外 设,可为单节锂离子电池组提供电量监测。 该器件可 实现精确的电池电量监测,并且对系统微控制器固件开 发的要求极低。 bq27546-G1 驻留在电池组内或者内 置电池(不可拆卸)的系统主板上。 bq27546-G1 采用已获专利的 Impedance Track™ 算 法进行电量监测,并提供电池剩余电量 (mAh)、充电 状态 (%)、续航时间(分钟)、电池电压 (mV) 以及温 度 (°C) 等信息。 该器件还提供针对内部短路或电池端 子断开事件的检测功能。 bq27546-G1 特有针对安全电池组认证(使用 SHA1/HMAC 认证算法)的集成支持功能。 该器件采用 15 焊球 Nano-Free™ DSBGA 封装 (2.61mm × 1.96mm),是空间受限类应用的理想选 择。 器件型号 bq27546-G1 器件信息 (1) 封装 YZF (15) 封装尺寸(标称值) 2.61mm x 1.96mm (1) 要了解所有可用封装,请见数据表末尾的可订购产品附录。 4 简化电路原理图 Single Cell Li -Ion Battery Pack PACK+ REGIN BAT VCC HDQ SDA SCL PROTECTION IC CHG DSG PACK– FET HDQ SDA SCL SE CE TS SRP SRN 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. English Data Sheet: SLUSC53 bq27546-G1 ZHCSDO4 – MAY 2015 www.ti.com.cn 目录 1 特性.......................................................................... 1 2 应用.......................................................................... 1 3 说明.......................................................................... 1 4 简化电路原理图........................................................ 1 5 修订历史记录 ........................................................... 2 6 Device Comparison Table..................................... 3 7 Pin Configuration and Functions ......................... 3 8 Specifications......................................................... 4 8.1 Absolute Maximum Ratings ...................................... 4 8.2 ESD Ratings.............................................................. 4 8.3 Recommended Operating Conditions....................... 4 8.4 Thermal Information .................................................. 4 8.5 Supply Current .......................................................... 5 8.6 Digital Input and Output DC Characteristics ............. 5 8.7 Power-On Reset........................................................ 5 8.8 2.5-V LDO Regulator ................................................ 5 8.9 Internal Clock Oscillators .......................................... 5 8.10 Integrating ADC (Coulomb Counter) Characteristics ........................................................... 6 8.11 ADC (Temperature and Cell Voltage) Characteristics ........................................................... 6 8.12 Data Flash Memory Characteristics........................ 6 8.13 HDQ Communication Timing Characteristics ......... 6 8.14 I2C-Compatible Interface Timing Characteristics .... 7 8.15 Typical Characteristics ............................................ 8 9 Detailed Description .............................................. 9 9.1 Overview ................................................................... 9 9.2 Functional Block Diagram ....................................... 10 9.3 Feature Description................................................. 10 9.4 Device Functional Modes........................................ 15 9.5 Programming........................................................... 20 9.6 Register Maps ......................................................... 22 10 Application and Implementation........................ 24 10.1 Application Information.......................................... 24 10.2 Typical Applications .............................................. 25 10.3 Application Curves ................................................ 29 11 Power Supply Recommendations ..................... 29 11.1 Power Supply Decoupling ..................................... 29 12 Layout................................................................... 30 12.1 Layout Guidelines ................................................. 30 12.2 Layout Example .................................................... 31 13 器件和文档支持 ..................................................... 32 13.1 文档支持................................................................ 32 13.2 社区资源................................................................ 32 13.3 商标 ....................................................................... 32 13.4 静电放电警告......................................................... 32 13.5 术语表 ................................................................... 32 14 机械、封装和可订购信息....................................... 32 5 修订历史记录 日期 2015 年 5 月 修订版本 * 注释 最初发布版本 2 Copyright © 2015, Texas Instruments Incorporated www.ti.com.cn 6 Device Comparison Table PART NUMBER (1) BQ27546YZFR-G1 BQ27546YZFT-G1 FIRMWARE VERSION 2.00 (1) bq27546-G1 is shipped in I2C™ mode. PACKAGE DSBGA-15 7 Pin Configuration and Functions bq27546-G1 ZHCSDO4 – MAY 2015 TA –40°C to 85°C COMMUNICATION FORMAT I2C, HDQ(1) TAPE AND REEL QUANTITY 3000 250 PIN NAME NO. SRP A1 SRN VSS SE VCC REGIN HDQ TS CE BAT B1 C1, C2 C3 D1 E1 A2 B2 D2 E2 SCL A3 SDA B3 NC/GPIO D3, E3 Pin Functions TYPE (1) DESCRIPTION IA Analog input pin connected to the internal coulomb counter where SRP is nearest the PACK– connection. Connect to a 5-mΩ to 20-mΩ sense resistor. IA Analog input pin connected to the internal coulomb counter where SRN is nearest the VSS connection. Connect to a 5-mΩ to 20-mΩ sense resistor. P Device ground O Shutdown Enable output. Push-pull output P Regulator output and processor power. Decouple with a 1.0-µF ceramic capacitor to VSS. P Regulator input. Decouple with a 0.1-µF ceramic capacitor to VSS. I/O HDQ serial communications line (Slave). Open-drain IA Pack thermistor voltage sense (use 103AT-type thermistor). ADC input I Chip Enable. Internal LDO is disconnected from REGIN when driven low. IA Cell-voltage measurement input. ADC input. Recommendation is 4.8 V maximum for conversion accuracy. I Slave I2C serial communications clock input line for communication with system (Master). Use with a 10kΩ pull-up resistor (typical). I/O Slave I2C serial communications data line for communication with system (Master). Open-drain I/O. Use with a 10-kΩ pull-up resistor (typical). NC Do not connect for proper operation. Reserved for future GPIO. (1) IA = Analog input, I/O = Digital input/output, P = Power connection, NC = No connect Copyright © 2015, Texas Instruments Incorporated 3 bq27546-G1 ZHCSDO4 – MAY 2015 8 Specifications www.ti.com.cn 8.1 Absolute Maximum Ratings Over-operating free-air temperature range (unless otherwise noted)(1) VI VCC VIOD VBAT VI TA TF Tstg Regulator input, REGIN Supply voltage range Open-drain I/O pins (SDA, SCL, HDQ) BAT input (pin E2) Input voltage range to all others (pins GPIO, SRP, SRN, TS) Operating free-air temperature range Functional temperature range Storage temperature range MIN MAX UNIT –0.3 5.5 V –0.3 2.75 V –0.3 5.5 V –0.3 5.5 V –0.3 –40 VCC + 0.3 V 85 °C –40 100 °C –65 150 (1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 8.2 ESD Ratings V(ESD) Electrostatic Discharge Human Body Model (HBM), per ANSI/ESDA/JEDEC JS-001(1), BAT pin Human Body Model (HBM), all pins Charged-device model (CDM), per JEDEC specification JESD22-C101(2) VALUE 1500 2000 ±500 (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. UNIT V V 8.3 Recommended Operating Conditions TA = –40°C to 85°C; typical values at TA = 25°C and VREGIN = VBAT = 3.6 V (unless otherwise noted) MIN TYP No operating restrictions 2.8 VI Supply voltage, REGIN No FLASH writes 2.45 CREGIN CLDO25 tPUCD External input capacitor for internal LDO between REGIN and VSS Nominal capacitor values specified. Recommend a 5% ceramic X5R type capacitor External output capacitor for internal LDO located close to the device. between VCC an VSS Power-up communication delay 0.1 0.47 1 250 MAX 4.5 2.8 UNIT V µF µF ms 8.4 Thermal Information THERMAL METRIC RθJA RθJCtop RθJB ψJT ψJB RθJCbot Junction-to-ambient thermal resistance Junction-to-case (top) thermal resistance Junction-to-board thermal resistance Junction-to-top characterization parameter Junction-to-board characterization parameter Junction-to-case (bottom) thermal resistance bq27546-G1 YZF (15 PINS) 70 17 20 1 18 n/a UNIT °C/W 4 Copyright © 2015, Texas Instruments Incorporated www.ti.com.cn bq27546-G1 ZHCSDO4 – MAY 2015 8.5 Supply Current TA = 25°C and VREGIN = VBAT = 3.6 V (unless otherwise noted) PARAMETER TEST CONDITIONS ICC I(SLP) I(FULLSLP) I(HIB) NORMAL operating mode current (1) Low-power operating mode current(1) Low-power operating mode current(1) HIBERNATE operating mode current (1) Fuel gauge in NORMAL mode. ILOAD > Sleep Current Fuel gauge in SLEEP mode. ILOAD < Sleep Current Fuel gauge in FULLSLEEP mode. ILOAD < Sleep Current Fuel gauge in HIBERNATE mode. ILOAD < Hibernate Current (1) Specified by design. Not tested in production. MIN TYP MAX UNIT 118 μA 62 μA 23 μA 8 μA 8.6 Digital Input and Output DC Characteristics TA = –40°C to 85°C; typical values at TA = 25°C and VREGIN = VBAT = 3.6 V (unless otherwise noted) PARAMETER TEST CONDITIONS MIN VOL Output voltage low (HDQ, SDA, SCL, SE) IOL = 3 mA VOH(PP) VOH(OD) VIL VIH VIL(CE) VIH(CE) Ilkg Output high voltage (SE) Output high voltage (HDQ, SDA, SCL) Input voltage low (HDQ, SDA, SCL) Input voltage high (HDQ, SDA, SCL) CE Low-level input voltage CE High-level input voltage Input leakage current (I/O pins) IOH = –1 mA External pullup resistor connected to VCC VREGIN = 2.8 to 4.5 V VCC–0.5 VCC–0.5 –0.3 1.2 2.65 VREGIN–0.5 TYP MAX UNIT 0.4 V V V 0.6 V 5.5 V 0.8 V 0.8 0.3 μA 8.7 Power-On Reset TA = –40°C to 85°C, C(REG) = 0.47 μF, 2.45 V < V(REGIN) = VBAT < 5.5 V; typical values at TA = 25°C and V(REGIN) = VBAT = 3.6 V (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VIT+ VHYS Positive-going battery voltage input at VCC Power-on reset hysteresis 2.05 2.15 2.20 V 45 115 185 mV 8.8 2.5-V LDO Regulator TA = –40°C to 85°C, C(REG) = 0.47 μF, 2.45 V < V(REGIN) = VBAT < 5.5 V; typical values at TA = 25°C and V(REGIN) = VBAT = 3.6 V (unless otherwise noted) PARAMETER TEST CONDITION MIN TYP MAX UNIT VREG25 Regulator output voltage, REG25 2.8 V ≤ V(REGIN) ≤ 4.5 V, IOUT ≤ 16 mA 2.45 V ≤ V(REGIN) < 2.8 V (low battery), IOUT ≤ 3 mA 2.3 2.5 2.6 V 2.3 V 8.9 Internal Clock Oscillators TA = –40°C to 85°C, 2.4 V < VCC < 2.6 V; typical values at TA = 25°C and VCC = 2.5 V (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX f(OSC) f(LOSC) Operating frequency Operating frequency 2.097 32.768 UNIT MHz kHz Copyright © 2015, Texas Instruments Incorporated 5 bq27546-G1 ZHCSDO4 – MAY 2015 www.ti.com.cn 8.10 Integrating ADC (Coulomb Counter) Characteristics TA = –40°C to 85°C, C(REG) = 0.47 μF, 2.45 V < V(REGIN) = VBAT < 5.5 V; typical values at TA = 25°C and V(REGIN) = VBAT = 3.6 V (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VSR tCONV(SR) Input voltage range, V(SRN) and V(SRP) Conversion time Resolution VSR = V(SRN) – V(SRP) Single conversion –0.125 14 0.125 V 1 s 15 bits VOS(SR) INL ZIN(SR) Ilkg(SR) Input offset Integral nonlinearity error Effective input resistance(1) Input leakage current(1) 10 ±0.007 2.5 ±0.034 0.3 μV FSR MΩ μA (1) Specified by design. Not production tested. 8.11 ADC (Temperature and Cell Voltage) Characteristics TA = –40°C to 85°C, C(REG) = 0.47 μF, 2.45 V < V(REGIN) = VBAT < 5.5 V; typical values at TA = 25°C and V(REGIN) = VBAT = 3.6 V (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VIN(TS) VIN(BAT) VIN(ADC) G(TEMP) tCONV(ADC) Input voltage range (TS) Input voltage range (BAT) Input voltage range to ADC Temperature sensor voltage gain Conversion time Resolution VSS – 0.125 VSS – 0.125 0.05 –2.0 14 VCC V 5V 1V mV/°C 125 ms 15 bits VOS(ADC) Z(TS) Input offset Effective input resistance (TS)(1) bq27546-G1 not measuring external temperature 1 mV 8 MΩ Z(BAT) Effective input resistance (BAT)(1) bq27546-G1 not measuring cell voltage bq27546-G1 measuring cell voltage 8 MΩ 100 kΩ Ilkg(ADC) Input leakage current 0.3 μA (1) Specified by design. Not production tested. 8.12 Data Flash Memory Characteristics TA = –40°C to 85°C, C(REG) = 0.47 μF, 2.45 V < V(REGIN) = VBAT < 5.5 V; typical values at TA = 25°C and V(REGIN) = VBAT = 3.6 V (unless otherwise noted) tDR tWORDPROG ICCPROG tDFERASE tPGERASE PARAMETER Data retention(1) Flash programming write-cycles(1) Word programming time(1) Flash-write supply current(1) Data flash master erase time(1) Flash page erase time(1) TEST CONDITIONS MIN 10 20,000 200 20 TYP MAX UNIT Years Cycles 2 ms 5 10 mA ms ms (1) Specified by design. Not production tested. 8.13 HDQ Communication Timing Characteristics TA = –40°C to 85°C, CREG = 0.47 μF, 2.45 V < VREGIN = VBAT < 5.5 V; typical values at TA = 25°C and VREGIN = VBAT = 3.6 V (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT t(CYCH) t(CYCD) t(HW1) Cycle time, host to bq27546-G1 Cycle time, bq27546-G1 to host Host sends 1 to bq27546-G1 190 μs 190 205 250 μs 0.5 50 μs 6 Copyright © 2015, Texas Instruments Incorporated www.ti.com.cn bq27546-G1 ZHCSDO4 – MAY 2015 HDQ Communication Timing Characteristics (continued) TA = –40°C to 85°C, CREG = 0.47 μF, 2.45 V < VREGIN = VBAT < 5.5 V; typical values at TA = 25°C and VREGIN = VBAT = 3.6 V (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT t(DW1) t(HW0) t(DW0) t(RSPS) t(B) t(BR) t(RISE) bq27546-G1 sends 1 to host Host sends 0 to bq27546-G1 bq27546-G1 sends 0 to host Response time, bq27546-G1 to host Break time Break recovery time HDQ line rising time to logic 1 (1.2 V) 32 50 μs 86 145 μs 80 145 μs 190 950 μs 190 μs 40 μs 950 ns 8.14 I2C-Compatible Interface Timing Characteristics TA = –40°C to 85°C, CREG = 0.47 μF, 2.45 V < VREGIN = VBAT < 5.5 V; typical values at TA = 25°C and VREGIN = VBAT = 3.6 V (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT tr tf tw(H) tw(L) tsu(STA) td(STA) tsu(DAT) th(DAT) tsu(STOP) tBUF fSCL SCL/SDA rise time SCL/SDA fall time SCL pulse width (high) SCL pulse width (low) Setup for repeated start Start to first falling edge of SCL Data setup time Data hold time Setup time for stop Bus free time between stop and start Clock frequency (1) 600 1.3 600 600 1000 0 600 66 300 ns 300 ns ns μs ns ns ns ns ns μs 400 kHz (1) If the clock frequency (fSCL) is > 100 kHz, use 1-byte write commands for proper operation. All other transactions types are supported at 400 kHz. (Refer to I2C Interface.) t(B) t(BR) (a) Break and Break Recovery t(RISE) 1.2V (b) HDQ line rise time t(HW1) t(HW0) t(CYCH) (c) Host Transmitted Bit t(DW1) t(DW0) t(CYCD) (d) Gauge Transmitted Bit Break 7-bit address 1-bit R/W 8-bit data t(RSPS) (e) Gauge to Host Response Figure 1. HDQ Timing Diagrams Copyright © 2015, Texas Instruments Incorporated 7 bq27546-G1 ZHCSDO4 – MAY 2015 www.ti.com.cn tSU(STA) SCL tw(H) tw(L) tf tr t(BUF) SDA td(STA) tf tr th(DAT) tsu(DAT) tsu(STOP) REPEATED START STOP START Figure 2. I2C-Compatible Interface Timing Diagrams 8.15 Typical Characteristics VREG25 - Regulator Output Voltage (V) 2.65 2.6 2.55 2.5 2.45 2.4 2.35 VREGIN = 2.7 V VREGIN = 4.5 V Temperature (GC) D001 fOSC - High Frequency Oscillator (MHz) 8.8 8.7 8.6 8.5 8.4 8.3 8.2 8.1 8 -40 -20 0 20 40 60 Temperature (GC) 80 100 D002 fLOSC - Low Frequency Oscillator (kHz) Figure 3. Regulator Output Voltage vs. Temperature 34 33.5 33 32.5 32 31.5 31 30.5 30 -40 -20 0 20 40 60 Temperature (GC) 80 100 D003 Reported Temperature Error (GC) Figure 4. High-Frequency Oscillator Frequency vs. Temperature 5 4 3 2 1 0 -1 -2 -3 -4 -5 -30 -20 -10 0 10 20 30 40 50 60 Temperature (GC) D004 Figure 5. Low-Frequency Oscillator Frequency vs. Temperature 8 Figure 6. Reported Internal Temperature Measurement vs. Temperature Copyright © 2015, Texas Instruments Incorporated www.ti.com.cn 9 Detailed Description bq27546-G1 ZHCSDO4 – MAY 2015 9.1 Overview The bq27546-G1 accurately predicts the battery capacity and other operational characteristics of a single Libased rechargeable cell. It can be interrogated by a system processor to provide cell information, such as stateof-charge (SOC) and time-to-empty (TTE). Information is accessed through a series of commands, called Standard Commands. Further capabilities are provided by the additional Extended Commands set. Both sets of commands, indicated by the general format Command(), are used to read and write information contained within the bq27546-G1 control and status registers, as well as its data flash locations. Commands are sent from the system to gauge using the bq27546G1 serial communications engine, and can be executed during application development, pack manufacture, or end-equipment operation. Cell information is stored in the bq27546-G1 in non-volatile flash memory. Many of these data flash locations are accessible during application development. They cannot, generally, be accessed directly during end-equipment operation. To access to these locations, use the bq27546-G1 companion evaluation software, individual commands, or a sequence of data-flash-access commands. To access a desired data flash location, the correct data flash subclass and offset must be known. For detailed data flash information, see the bq27546-G1 Technical Reference Manual (SLUUB74). The bq27546-G1 provides 64 bytes of user-programmable data flash memory, partitioned into two (2) 32-byte blocks: Manufacturer Info Block A and Manufacturer Info Block B. This data space is accessed through a data flash interface. For specifics on accessing the data flash, see section Manufacturer Information Blocks in the bq27546-G1 Technical Reference Manual (SLUUB74). The key to the bq27546-G1 high-accuracy gas gauging prediction is the Texas Instruments proprietary Impedance Track™ algorithm. This algorithm uses cell measurements, characteristics, and properties to create state-of-charge predictions that can achieve less than 1% error across a wide variety of operating conditions and over the lifetime of the battery. The bq27546-G1 measures charge/discharge activity by monitoring the voltage across a small-value series sense resistor (5 mΩ to 20 mΩ typ.) located between the CELL– and the battery’s PACK– terminal. When a cell is attached to the bq27546-G1, cell impedance is learned based on cell current, cell open-circuit voltage (OCV), and cell voltage under loading conditions. The bq27546-G1 external temperature sensing is optimized with the use of a high accuracy negative temperature coefficient (NTC) thermistor with R25 = 10 kΩ ± 1% and B25/85 = 3435K ± 1% (such as Semitec 103AT) for measurement. The bq27546-G1 can also be configured to use its internal temperature sensor. The bq27546-G1 uses temperature to monitor the battery-pack environment, which is used for fuel gauging and cell protection functionality. To minimize power consumption, the bq27546-G1 has different power modes: NORMAL, SLEEP, FULLSLEEP, and HIBERNATE. The bq27546-G1 passes automatically between these modes, depending upon the occurrence of specific events, though a system processor can initiate some of these modes directly. More details can be found in Power Modes. NOTE FORMATTING CONVENTIONS IN THIS DOCUMENT: Commands: italics with parentheses() and no breaking spaces. e.g. RemainingCapacity() Data Flash: italics, bold, and breaking spaces. e.g. Design Capacity Register bits and flags: italics with brackets[ ]. e.g. [TDA] Data flash bits: italics, bold, and brackets[ ]. e.g: [LED1] Modes and states: ALL CAPITALS. e.g. UNSEALED mode Copyright © 2015, Texas Instruments Incorporated 9 bq27546-G1 ZHCSDO4 – MAY 2015 9.2 Functional Block Diagram REGIN CE REG25 VCC HDQ SCL SDA 2.5-V LDO + Power Mgt Communications HDQ/I2C Oscillator System Clock Impedance Track Engine www.ti.com.cn ADC Divider Temp Sensor Co- ulomb Counter BAT TS SRP SRN Peripherals SE Program Memory Data Memory VSS 9.3 Feature Description 9.3.1 Fuel Gauging The bq27546-G1 fuel gauge measures the cell voltage, temperature, and current to determine battery SOC based on the Impedance Track algorithm. (For more information, refer to the Theory and Implementation of Impedance Track Battery Fuel-Gauging Algorithm Application Report [SLUA450].) The device monitors charge and discharge activity by sensing the voltage across a small-value resistor (5-mΩ to 20-mΩ typical) between the SRP and SRN pins and in series with the cell. By integrating the charge passing through the battery, the battery SOC is adjusted during battery charge or discharge. The total battery capacity is found by comparing states of charge before and after applying the load with the amount of charge passed. When an application load is applied, the impedance of the cell is measured by comparing the OCV obtained from a predefined function for present SOC with the measured voltage under load. Measurements of OCV and charge integration determine chemical state of charge and chemical capacity (Qmax). The initial Qmax values are taken from a cell manufacturer's data sheet multiplied by the number of parallel cells. It is also used for the value in Design Capacity. The fuel gauge acquires and updates the batteryimpedance profile during normal battery usage. It uses this profile, along with SOC and the Qmax value, to determine FullChargeCapacity() and StateOfCharge(), specifically for the present load and temperature. FullChargeCapacity() is reported as capacity available from a fully charged battery under the present load and temperature until Voltage() reaches the Terminate Voltage. NominalAvailableCapacity() and FullAvailableCapacity() are the uncompensated (no or light load) versions of RemainingCapacity() and FullChargeCapacity(), respectively. 9.3.2 Impedance Track Variables The bq27546-G1 fuel gauge has several data flash variables that permit the user to customize the Impedance Track algorithm for optimized performance. These variables depend on the power characteristics of the application, as well as the cell itself. 10 Copyright © 2015, Texas Instruments Incorporated www.ti.com.cn bq27546-G1 ZHCSDO4 – MAY 2015 Feature Description (continued) 9.3.3 Power Control 9.3.3.1 Reset Functions When the bq27546-G1 detects a software reset by sending [RESET] Control() subcommand, it determines the type of reset and increments the corresponding counter. This information is accessible by issuing the command Control() function with the RESET_DATA subcommand. 9.3.3.2 Wake-Up Comparator The wake-up comparator is used to indicate a change in cell current while the bq27546-G1 is in SLEEP mode. Pack Configuration uses bits [RSNS1–RSNS0] to set the sense resistor selection. Pack Configuration also uses the [IWAKE] bit to select one of two possible voltage threshold ranges for the given sense resistor selection. An internal interrupt is generated when the threshold is breached in either charge or discharge directions. Setting both [RSNS1] and [RSNS0] to 0 disables this feature. IWAKE 0 1 0 1 0 1 0 1 Table 1. IWAKE Threshold Settings(1) RSNS1 RSNS0 Vth(SRP-SRN) 0 0 Disabled 0 0 Disabled 0 1 +1.0 mV or –1.0 mV 0 1 +2.2 mV or –2.2 mV 1 0 +2.2 mV or –2.2 mV 1 0 +4.6 mV or –4.6 mV 1 1 +4.6 mV or –4.6 mV 1 1 +9.8 mV or –9.8 mV (1) The actual resistance value vs. the sense resistor setting is not important; however, the actual voltage threshold when calculating the configuration is important. The voltage thresholds are typical values under room temperature. 9.3.3.3 Flash Updates Data flash can only be updated if Voltage() ≥ Flash Update OK Voltage. Flash programming current can cause an increase in LDO dropout. The value of Flash Update OK Voltage should be selected such that the bq27546G1 VCC voltage does not fall below its minimum of 2.4 V during flash write operations. 9.3.4 Autocalibration The bq27546-G1 device provides an autocalibration feature that measures the voltage offset error across SRP and SRN from time-to-time as operating conditions change. It subtracts the resulting offset error from normal sense resistor voltage, VSR, for maximum measurement accuracy. Autocalibration of the ADC begins on entry to SLEEP mode, except if Temperature() is ≤ 5°C or Temperature() ≥ 45°C. The fuel gauge also performs a single offset calibration when (1) the condition of AverageCurrent() ≤ 100 mA and (2) {voltage change since the last offset calibration ≥ 256 mV} or {temperature change since last offset calibration is greater than 8°C for ≥ 60 seconds}. Capacity and current measurements will continue at the last measured rate during the offset calibration when these measurements cannot be performed. If the battery voltage drops more than 32 mV during the offset calibration, the load current has likely increased considerably; therefore, the offset calibration will be stopped. Copyright © 2015, Texas Instruments Incorporated 11 bq27546-G1 ZHCSDO4 – MAY 2015 www.ti.com.cn 9.3.5 Communications 9.3.5.1 Authentication The bq27546-G1 device can act as a SHA-1/HMAC authentication slave by using its internal engine. Sending a 160-bit SHA-1 challenge message to the bq27546-G1 fuel gauge causes the gauge to return a 160-bit digest, based upon the challenge message and a hidden, 128-bit plain-text authentication key. If this digest matches an identical one generated by a host or dedicated authentication master, and when operating on the same challenge message and using the same plain text keys, the authentication process is successful. 9.3.5.2 Key Programming (Data Flash Key) By default, the bq27546-G1 contains a default plain-text authentication key of 0x0123456789ABCDEFFEDCBA9876543210. This default key is intended for development purposes. It should be changed to a secret key and the part should be immediately sealed before putting a pack into operation. Once written, a new plain-text key cannot be read again from the fuel gauge while in SEALED mode. Once the bq27546-G1 is UNSEALED, the authentication key can be changed from its default value by writing to the Authenticate() Extended Data Command locations. A 0x00 is written to BlockDataControl() to enable the authentication data commands. The DataFlashClass() is issued 112 (0x70) to set the Security class. Up to 32 bytes of data can be read directly from the BlockData() (0x40...0x5F) and the authentication key is located at 0x48 (0x40 + 0x08 offset) to 0x57 (0x40 + 0x17 offset). The new authentication key can be written to the corresponding locations (0x48 to 0x57) using the BlockData() command. The data is transferred to the data flash when the correct checksum for the whole block (0x40 to 0x5F) is written to BlockDataChecksum() (0x60). The checksum is (255 – x) where x is the 8-bit summation of the BlockData() (0x40 to 0x5F) on a byte-by-byte basis. Once the authentication key is written, the gauge can then be sealed again. 9.3.5.3 Key Programming (Secure Memory Key) The bq27546-G1 secure-memory authentication key is stored in the secure memory of the bq27546-G1 device. If a secure-memory key has been established, only this key can be used for authentication challenges (the programmable data flash key is not available). The selected key can only be established/programmed by special arrangements with TI, using TI’s Secure B-to-B Protocol. The secure-memory key can never be changed or read from the bq27546-G1 fuel gauge. 9.3.5.4 Executing an Authentication Query To execute an authentication query in UNSEALED mode, a host must first write 0x01 to the BlockDataControl() command to enable the authentication data commands. If in SEALED mode, 0x00 must be written to DataFlashBlock() instead. Next, the host writes a 20-byte authentication challenge to the Authenticate() address locations (0x40 through 0x53). After a valid checksum for the challenge is written to AuthenticateChecksum(), the bq27546-G1 uses the challenge to perform the SHA-1/HMAC computation in conjunction with the programmed key. The bq27546-G1 completes the SHA-1/HMAC computation and writes the resulting digest to Authenticate(), overwriting the preexisting challenge. The host should wait at least 45 ms to read the resulting digest. The host may then read this response and compare it against the result created by its own parallel computation. 9.3.5.5 HDQ Single-Pin Serial Interface The HDQ interface is an asynchronous return-to-one protocol where a processor sends the command code to the bq27546-G1 device. With HDQ, the least significant bit (LSB) of a data byte (command) or word (data) is transmitted first. Note that the DATA signal on pin 12 is open-drain and requires an external pull-up resistor. The 8-bit command code consists of two fields: the 7-bit HDQ command code (bits 0–6) and the 1-bit R/W field (MSB bit 7). The R/W field directs the bq27546-G1 either to • Store the next 8 or 16 bits of data to a specified register or • Output 8 bits of data from the specified register. The HDQ peripheral can transmit and receive data as either an HDQ master or slave. 12 Copyright © 2015, Texas Instruments Incorporated www.ti.com.cn bq27546-G1 ZHCSDO4 – MAY 2015 HDQ serial communication is normally initiated by the host processor sending a break command to the bq27546G1 device. A break is detected when the DATA pin is driven to a logic-low state for a time t(B) or greater. The DATA pin should then be returned to its normal ready high logic state for a time t(BR). The bq27546-G1 fuel gauge is now ready to receive information from the host processor. The bq27546-G1 device is shipped in I2C mode. TI provides tools to enable the HDQ peripheral. The HDQ Communication Basics Application Report (SLUA408A) provides details of HDQ communication. 9.3.5.6 HDQ Host Interruption Feature The default bq27546-G1 gauge behaves as an HDQ slave-only device when HDQ mode is enabled. If the HDQ interrupt function is enabled, the bq27546-G1 is capable of mastering and also communicating to an HDQ device. There is no mechanism for negotiating what is to function as the HDQ master and care must be taken to avoid message collisions. The interrupt is signaled to the host processor with the bq27546-G1 mastering an HDQ message. This message is a fixed message that will be used to signal the interrupt condition. The message itself is 0x80 (slave write to register 0x00) with no data byte being sent as the command, and is not intended to convey any status of the interrupt condition. The HDQ interrupt function is disabled by default and needs to be enabled by command. When the SET_HDQINTEN subcommand is received, the bq27546-G1 device detects any of the interrupt conditions and asserts the interrupt at 1-s intervals until the CLEAR_HDQINTEN command is received or the count of HDQHostIntrTries has lapsed. The number of tries for interrupting the host is determined by the data flash parameter named HDQHostIntrTries. 9.3.5.6.1 Low Battery Capacity This feature works identically to SOC1. It uses the same data flash entries as SOC1 and triggers interrupts as long as SOC1 = 1 and HDQIntEN = 1. 9.3.5.6.2 Temperature This feature triggers an interrupt based on the OTC (Overtemperature in Charge) or OTD (Overtemperature in Discharge) condition being met. It uses the same data flash entries as OTC or OTD and triggers interrupts as long as either the OTD or OTC condition is met and HDQIntEN = 1. 9.3.5.7 I2C Interface The fuel gauge supports the standard I2C read, incremental read, one-byte write quick read, and functions. The 7-bit device address (ADDR) is the most significant 7 bits of the hex address and is fixed as 1010101. The 8-bit device address is therefore 0xAA or 0xAB for a write or read, respectively. Host Generated Fuel Gauge Generated S ADDR[6:0] 0 A CMD[7:0] (a) A DATA[7:0] AP S ADDR[6:0] 1 A DATA[7:0] N P (b) S ADDR[6:0] 0 A CMD[7:0] A Sr ADDR[6:0] (c) 1A DATA[7:0] NP S ADDR[6:0] 0 A CMD[7:0] A Sr ADDR[6:0] (d) 1A DATA[7:0] A . . . DATA[7:0] N P Figure 7. Supported I2C formats: (a) 1-byte write, (b) quick read, (c) 1 byte-read, and (d) incremental read (S = Start, Sr = Repeated Start, A = Acknowledge, N = No Acknowledge, and P = Stop). The quick read returns data at the address indicated by the address pointer. The address pointer, a register internal to the I2C communication engine, increments whenever data is acknowledged by the bq27546-G1 or the I2C master. Quick writes function in the same manner and are a convenient means of sending multiple bytes to consecutive command locations (such as two-byte commands that require two bytes of data). Attempt to write a read-only address (NACK after data sent by master): Copyright © 2015, Texas Instruments Incorporated 13 bq27546-G1 ZHCSDO4 – MAY 2015 www.ti.com.cn S ADDR[6:0] 0 A CMD[7:0] A DATA[7:0] AP Attempt to read an address above 0x7F (NACK command): S ADDR[6:0] 0 A CMD[7:0] N P Attempt at incremental writes (NACK all extra data bytes sent): S ADDR[6:0] 0 A CMD[7:0] A DATA[7:0] A DATA[7:0] N . . . N P Incremental read at the maximum allowed read address: S ADDR[6:0] 0 A CMD[7:0] A Sr ADDR[6:0] 1 A DATA[7:0] A . . . DATA[7:0] N P Address 0x7F Data From addr 0x7F Data From addr 0x00 The I2C engine releases both SDA and SCL if the I2C bus is held low for t(BUSERR). If the fuel gauge was holding the lines, releasing them frees the master to drive the lines. If an external condition is holding either of the lines low, the I2C engine enters the low-power SLEEP mode. 9.3.5.7.1 I2C Time Out The I2C engine will release both SDA and SCL if the I2C bus is held low for about 2 seconds. If the bq27546-G1 device were holding the lines, releasing them frees for the master to drive the lines. 9.3.5.7.2 I2C Command Waiting Time To ensure there are correct results of a command with the 400-KHz I2C operation, a proper waiting time should be added between issuing command and reading results. For subcommands, the following diagram shows the waiting time required between issuing the control command the reading the status with the exception of the checksum command. A 100-ms waiting time is required between the checksum command and reading result. For read-write standard commands, a minimum of 2 seconds is required to get the result updated. For read-only standard commands, there is no waiting time required, but the host should not issue all standard commands more than two times per second. Otherwise, the gauge could result in a reset issue due to the expiration of the watchdog timer. S ADDR[6:0] 0 A S ADDR[6:0] 0 A CMD[7:0] CMD[7:0] A DATA [7:0] A DATA [7:0] A P 66ms A Sr ADDR[6:0] 1 A DATA [7:0] A DATA [7:0] Waiting time between control subcommand and reading results N P 66ms S ADDR[6:0] 0 A CMD[7:0] A Sr ADDR[6:0] 1 A DATA [7:0] A DATA [7:0] A DATA [7:0] A DATA [7:0] N P 66ms Waiting time between continuous reading results Figure 8. I2C Command Waiting Time 14 Copyright © 2015, Texas Instruments Incorporated www.ti.com.cn bq27546-G1 ZHCSDO4 – MAY 2015 9.3.5.7.3 I2C Clock Stretching I2C clock stretches can occur during all modes of fuel gauge operation. In the SLEEP and HIBERNATE modes, a short clock stretch will occur on all I2C traffic as the device must wake-up to process the packet. In NORMAL and SLEEP modes, clock stretching will only occur for packets addressed for the fuel gauge. The timing of stretches will vary as interactions between the communicating host and the gauge are asynchronous. The I2C clock stretches may occur after start bits, the ACK/NAK bit, and first data bit transmit on a host read cycle. The majority of clock stretch periods are small (≤ 4 ms) as the I2C interface peripheral and CPU firmware perform normal data flow control. However, less frequent but more significant clock stretch periods may occur when data flash (DF) is being written by the CPU to update the resistance (Ra) tables and other DF parameters, such as Qmax. Due to the organization of DF, updates need to be written in data blocks consisting of multiple data bytes. An Ra table update requires erasing a single page of DF, programming the updated Ra table and a flag. The potential I2C clock stretching time is 24 ms max. This includes 20-ms page erase and 2-ms row programming time (×2 rows). The Ra table updates occur during the discharge cycle and at up to 15 resistance grid points that occur during the discharge cycle. A DF block write typically requires a max of 72 ms. This includes copying data to a temporary buffer and updating DF. This temporary buffer mechanism is used for protection from power failure during a DF update. The first part of the update requires 20 ms time to erase the copy buffer page, 6 ms to write the data into the copy buffer, and the program progress indicator (2 ms for each individual write). The second part of the update is writing to the DF and requires 44-ms DF block update time. This includes a 20-ms each page erase for two pages and a 2-ms each row write for two rows. In the event that a previous DF write was interrupted by a power failure or reset during the DF write, an additional 44-ms max DF restore time is required to recover the data from a previously interrupted DF write. In this power failure recovery case, the total I2C clock stretching is 116 ms max. Another case where I2C clock stretches is at the end of discharge. The update to the last discharge data will go through the DF block update twice because two pages are used for the data storage. The clock stretching in this case is 144 ms max. This occurs if there has been a Ra table update during the discharge. 9.4 Device Functional Modes 9.4.1 Power Modes The bq27546-G1 device has three power modes: NORMAL, SLEEP, and HIBERNATE. • In NORMAL mode, the bq27546-G1 is fully powered and can execute any allowable task. • In SLEEP mode, the fuel gauge exists in a reduced-power state, periodically taking measurements and performing calculations. • In HIBERNATE mode, the fuel gauge is in a very low power state, but can be awoken by communication or certain I/O activity. Figure 9 shows the relationship among these modes. Details are described in the sections that follow. Copyright © 2015, Texas Instruments Incorporated 15 bq27546-G1 ZHCSDO4 – MAY 2015 Device Functional Modes (continued) Exit From HIBERNATE VCELL < POR threshold Exit From HIBERNATE Communication Activity OR The device clears Control Status [HIBERNATE] = 0 Recommend Host also set Control Status [HIBERNATE] = 0 POR NORMAL Fuel gauging and data updated every 1s www.ti.com.cn Exit From SLEEP Pack Configuration [SLEEP] = 0 OR | AverageCurrent( ) | > Sleep Current OR Current is Detected above IWAKE HIBERNATE Disable all device subcircuits except GPIO. Wakeup From HIBERNATE Communication Activity AND Comm address is NOT for the device Entry to SLEEP Pack Configuration [SLEEP] = 1 AND | AverageCurrent( ) |≤ Sleep Current SLEEP Fuel gauging and data updated every 20 seconds Exit From WAIT_HIBERNATE Host must set Control Status [HIBERNATE] = 0 AND VCELL > Hibernate Voltage Entry to WAITFULLSLEEP Entry to FULLSLEEP If Full Sleep Wait Time = 0, Host must set Control Status [FULLSLEEP]=1 If Full Sleep Wait Time > 0, Exit From WAITFULLSLEEP Guage ignores Control Status Any Communication Cmd [FULLSLEEP] WAITFULLSLEEP FULLSLEEP Count Down Exit From WAIT_HIBERNATE Cell relaxed AND | AverageCurrent() | < Hibernate Current OR Cell relaxed AND VCELL < Hibernate Voltage WAIT_HIBERNATE Fuel gauging and data updated every 20 seconds System Shutdown Exit From SLEEP (Host has set Control Status [HIBERNATE] = 1 OR VCELL < Hibernate Voltage Entry to FULLSLEEP Count <1 FULLSLEEP Exit From FULLSLEEP Any Communication Cmd In low power state of SLEEP mode. Gas gauging and data updated every 20 seconds System Sleep Figure 9. Power Mode Diagram 9.4.1.1 NORMAL Mode The fuel gauge is in NORMAL mode when not in any other power mode. During this mode, AverageCurrent(), Voltage(), and Temperature() measurements are taken, and the interface data set is updated. Decisions to change states are also made. This mode is exited by activating a different power mode. Because the gauge consumes the most power in NORMAL mode, the Impedance Track™ algorithm minimizes the time the fuel gauge remains in this mode. 9.4.1.2 SLEEP Mode SLEEP mode is entered automatically if the feature is enabled (Pack Configuration [SLEEP]) = 1) and AverageCurrent() is below the programmable level Sleep Current. Once entry into SLEEP mode is qualified, but prior to entering it, the bq27546-G1 performs an ADC autocalibration to minimize offset. While in SLEEP mode, the fuel gauge can suspend serial communications as much as 4 ms by holding the comm line(s) low. This delay is necessary to correctly process host communication, since the fuel gauge processor is mostly halted in SLEEP mode. 16 Copyright © 2015, Texas Instruments Incorporated www.ti.com.cn bq27546-G1 ZHCSDO4 – MAY 2015 Device Functional Modes (continued) During SLEEP mode, the bq27546-G1 periodically takes data measurements and updates its data set. However, a majority of its time is spent in an idle condition. The bq27546-G1 exits SLEEP if any entry condition is broken, specifically when (1) AverageCurrent() rises above Sleep Current, or (2) a current in excess of IWAKE through RSENSE is detected when the IWAKE comparator is enabled. 9.4.1.3 FULLSLEEP Mode FULLSLEEP mode is entered automatically when the bq27546-G1 is in SLEEP mode and the timer counts down to 0 (Full Sleep Wait Time > 0). FULLSLEEP mode is entered immediately after entry to SLEEP if Full Sleep Wait Time is set to 0 and the host sets the [FULLSLEEP] bit in the CONTROL_STATUS register using the SET_FULLSLEEP subcommand. During FULLSLEEP mode, the bq27546-G1 periodically takes data measurements and updates its data set. However, a majority of its time is spent in an idle condition. The gauge exits the FULLSLEEP mode when there is any communication activity. The [FULLSLEEP] bit can remain set (Full Sleep Wait Time > 0) or be cleared (Full Sleep Wait Time ≤ 0) after exit of FULLSLEEP mode. Therefore, EVSW communication activity might cause the gauge to exit FULLSLEEP mode and display the [FULLSLEEP] bit as clear. The execution of SET_FULLSLEEP to set [FULLSLEEP] bit is required when Full Sleep Wait Time ≤ 0 in order to re-enter FULLSLEEP mode. FULLSLEEP mode can be verified by measuring the current consumption of the gauge. In this mode, the high frequency oscillator is turned off. The power consumption is further reduced in this mode compared to SLEEP mode. While in FULLSLEEP mode, the fuel gauge can suspend serial communications as much as 4 ms by holding the comm line(s) low. This delay is necessary to correctly process host communication, since the fuel gauge processor is mostly halted in SLEEP mode. The bq27546-G1 exits FULLSLEEP if any entry condition is broken, specifically when (1) AverageCurrent() rises above Sleep Current, or (2) a current in excess of IWAKE through RSENSE is detected when the IWAKE comparator is enabled. 9.4.1.4 HIBERNATE Mode HIBERNATE mode should be used for long-term pack storage or when the host system needs to enter a lowpower state and minimal gauge power consumption is required. This mode is ideal when the host is set to its own HIBERNATE, SHUTDOWN, or OFF mode. The gauge waits to enter HIBERNATE mode until it has taken a valid OCV measurement (cell relaxed) and the value of the average cell current has fallen below Hibernate Current. When the conditions are met, the fuel gauge can enter HIBERNATE due to either low cell voltage or by having the [HIBERNATE] bit of the CONTROL_STATUS register set. The gauge remains in HIBERNATE mode until any communication activity appears on the communication lines and the address is for the bq27546-G1 device. In addition, the SE pin SHUTDOWN mode function is supported only when the fuel gauge enters HIBERNATE due to low cell voltage. When the gauge wakes up from HIBERNATE mode, the [HIBERNATE] bit of the CONTROL_STATUS register is cleared. The host is required to set the bit in order to allow the gauge to re-enter HIBERNATE mode if desired. Because the fuel gauge is dormant in HIBERNATE mode, the battery should not be charged or discharged in this mode, because any changes in battery charge status will not be measured. If necessary, the host equipment can draw a small current (generally infrequent and less than 1 mA) for purposes of low-level monitoring and updating; however, the corresponding charge drawn from the battery will not be logged by the gauge. Once the gauge exits to NORMAL mode, the IT algorithm will take approximately 3 s to re-establish the correct battery capacity and measurements, regardless of the total charge drawn in HIBERNATE mode. During this period of reestablishment, the gauge reports values previously calculated prior to entering HIBERNATE mode. The host can identify exit from HIBERNATE mode by checking if Voltage() < Hibernate Voltage or [HIBERNATE] bit is cleared by the gauge. If a charger is attached, the host should immediately take the fuel gauge out of HIBERNATE mode before beginning to charge the battery. Charging the battery in HIBERNATE mode will result in a notable gauging error that will take several hours to correct. It is also recommended to minimize discharge current during exit from HIBERNATE. Copyright © 2015, Texas Instruments Incorporated 17 bq27546-G1 ZHCSDO4 – MAY 2015 www.ti.com.cn Device Functional Modes (continued) 9.4.2 System Control Function The fuel gauge provides system control functions that allow the fuel gauge to enter SHUTDOWN mode in order to power-off with the assistance of an external circuit or provide interrupt function to the system. Table 2 shows the configurations for SE and HDQ pins. Table 2. SE and HDQ Pin Functions [INTSEL] 0 (default) 1 COMMUNICATION MODE I2C HDQ I2C HDQ SE PIN FUNCTION Interrupt Mode (1) Shutdown Mode HDQ PIN FUNCTION Not Used HDQ Mode(2) Interrupt Mode HDQ Mode(2) (1) The [SE_EN] bit in Pack Configuration can be enabled to use the [SE] and [SHUTDWN] bits in the CONTROL_STATUS() function. The SE pin shutdown function is disabled. (2) The HDQ pin is used for communication and the HDQ Host Interrupt Feature is available. 9.4.2.1 SHUTDOWN Mode In SHUTDOWN mode, the SE pin is used to signal the external circuit to power-off the fuel gauge. This feature is useful to shut down the fuel gauge in a deeply discharged battery to protect the battery. By default, SHUTDOWN mode is in NORMAL state. By sending the SET_SHUTDOWN subcommand or setting the [SE_EN] bit in the Pack Configuration register, the [SHUTDWN] bit is set and enables the shutdown feature. When this feature is enabled and [INTSEL] is set, the SE pin can be in NORMAL state or SHUTDOWN state. The SHUTDOWN state can be entered in HIBERNATE mode (only if HIBERNATE mode is enabled due to low cell voltage). All other power modes will default the SE pin to NORMAL state. Table 3 shows the SE pin state in NORMAL or SHUTDOWN mode. The CLEAR_SHUTDOWN subcommand or clearing [SE_EN] bit in the Pack Configuration register can be used to disable SHUTDOWN mode. The SE pin will be high impedance at power-on reset (POR), and the [SE_POL] does not affect the state of SE pin at POR. Also, [SE_PU] configuration changes will only take effect after POR. In addition, the [INTSEL] only controls the behavior of the SE pin; it does not affect the function of [SE] and [SHUTDWN] bits. Table 3. SE Pin State [SE_PU] 0 0 1 1 [SE_POL] 0 1 0 1 SHUTDOWN Mode [INTSEL] = 1 and ([SE_EN] or [SHUTDOWN] = 1) NORMAL State SHUTDOWN State High Impedance 0 0 High Impedance 1 0 0 1 9.4.2.2 INTERRUPT Mode By using the INTERRUPT mode, the system can be interrupted based on detected fault conditions, as specified in Table 6. The SE or HDQ pin can be selected as the interrupt pin by configuring the [INTSEL] bit based on . In addition, the pin polarity and pullup (SE pin only) can be configured according to the system's needs, as described in Table 4 or Table 5. [SE_PU] 0 0 1 1 Table 4. SE Pin in Interrupt Mode ([INTSEL] = 0) [INTPOL] 0 1 0 1 INTERRUPT CLEAR High Impedance 0 1 0 INTERRUPT SET 0 High Impedance 0 1 18 Copyright © 2015, Texas Instruments Incorporated www.ti.com.cn Table 5. HDQ Pin in Interrupt Mode ([INTSEL] = 1) [INTPOL] 0 1 INTERRUPT CLEAR High Impedance 0 INTERRUPT SET 0 High Impedance bq27546-G1 ZHCSDO4 – MAY 2015 INTERRUPT CONDITION SOC1 Set Battery High Battery Low Over-Temperature Charge Over-Temperature Discharge Internal Short Detection Tab Disconnect Detection Imax Battery Trip Point (BTP) Table 6. Interrupt Mode Fault Conditions Flags() STATUS BIT ENABLE CONDITION [SOC1] Always [BATHI] Always [BATLOW] Always [OTC] OT Chg Time ≠ 0 COMMENT This interrupt is raised when the [SOC1] flag is set. This interrupt is raised when the [BATHI] flag is set. This interrupt is raised when the [BATLOW] flag is set. This interrupt is raised when the [OTC] flag is set. [OTD] OT Dsg Time ≠ 0 This interrupt is raised when the [OTD] flag is set. [ISD] [TDD] [IMAX] [SOC1] [SE_ISD] = 1 in Pack Configuration B [SE_TDD] = 1 in Pack Configuration B [IMAXEN] = 1 in Pack Configuration D [BTP_EN] = 1 in Pack Configuration C. The BTP interrupt supersedes all other interrupt sources, which are unavailable when BTP is active. This interrupt is raised when the [ISD] flag is set. This interrupt is raised when the [TDD] flag is set. This interrupt is raised when the [IMAX] flag is set. This interrupt is raised when RemainingCapacity() ≤ BTPSOC1Set() or RemainingCapacity() ≥ BTPSOC1Clear() during battery discharge or charge, respectively. The interrupt remains asserted until new values are written to both the BTPSOC1Set() and BTPSOC1Clear() registers. 9.4.3 Security Modes The bq27546-G1 provides three security modes (FULL ACCESS, UNSEALED, and SEALED) that control data flash access permissions. Data flash refers to those data flash locations that are accessible to the user. Manufacture Information refers to the two 32-byte blocks. 9.4.3.1 Sealing and Unsealing Data Flash The bq27546-G1 implements a key-access scheme to transition between SEALED, UNSEALED, and FULL ACCESS modes. Each transition requires that a unique set of two keys be sent to the bq27546-G1 via the Control() command. The keys must be sent consecutively with no other data being written to the Control() register in between. NOTE To avoid conflict, the keys must be different from the codes presented in the CNTL DATA column of Table 8 subcommands. When in SEALED mode the [SS] bit of CONTROL_STATUS is set, but when the UNSEAL keys are correctly received by the bq27546-G1, the [SS] bit is cleared. When the full-access keys are correctly received the CONTROL_STATUS [FAS] bit is cleared. Both Unseal Key and Full-Access Key have two words and are stored in data flash. The first word is Key 0 and the second word is Key 1. The order of the keys sent to bq27546-G1 are Key 1 followed by Key 0. The order of the bytes for each key entered through the Control() command is the reverse of what is read from the part. For an example, if the Unseal Key is 0x56781234, key 1 is 0x1234 and key 0 is 0x5678. Then Control() should supply 0x3412 and 0x7856 to unseal the part. The Unseal Key and the Full-Access Key can only be updated when in FULL ACCESS mode. Copyright © 2015, Texas Instruments Incorporated 19 bq27546-G1 ZHCSDO4 – MAY 2015 www.ti.com.cn 9.5 Programming 9.5.1 Standard Data Commands The bq27546-G1 uses a series of 2-byte standard commands to enable system reading and writing of battery information. Each standard command has an associated command-code pair, as indicated in Table 7. Each protocol has specific means to access the data at each Command Code. DataRAM is updated and read by the gauge only once per second. Standard commands are accessible in NORMAL operation mode. COMMAND NAME Control() AtRate() UnfilteredSOC() Temperature() Voltage() Flags() NomAvailableCapacity() FullAvailableCapacity() RemainingCapacity() FullChargeCapacity() AverageCurrent() TimeToEmpty() FullChargeCapacityFiltered() SafetyStatus() FullChargeCapacityUnfiltered() Imax() RemainingCapacityUnfiltered() RemainingCapacityFiltered() BTPSOC1Set() BTPSOC1Clear() InternalTemperature() CycleCount() StateofCharge() StateofHealth() ChargingVoltage() ChargingCurrent) PassedCharge() DOD0() SelfDischargeCurrent() Table 7. Standard Commands COMMAND CODE 0x00 and 0x01 0x02 and 0x03 0x04 and 0x05 0x06 and 0x07 0x08 and 0x09 0x0A and 0x0B 0x0C and 0x0D 0x0E and 0x0F 0x10 and 0x11 0x12 and 0x13 0x14 and 0x15 0x16 and 0x17 0x18 and 0x19 0x1A and 0x1B 0x1C and 0x1D 0x1E and 0x1F 0x20 and 0x21 0x22 and 0x23 0x24 and 0x25 0x26 and 0x27 0x28 and 0x29 0x2A and 0x2B 0x2C and 0x2D 0x2E and 0x2F 0x30 and 0x31 0x32 and 0x33 0x34 and 0x35 0x36 and 0x37 0x34 and 0x35 UNIT — mA % 0.1°K mV — mAh mAh mAh mAh mA min mAh — mAh mA mAh mAh mAh mAh 0.1°K Counts % % / num mV mA mAh hex mA SEALED ACCESS RW RW R R R R R R R R R R R R R R R R RW RW R R R R R R R R R 9.5.1.1 Control(): 0x00 and 0x01 Issuing a Control() command requires a subsequent 2-byte subcommand. These additional bytes specify the particular control function desired. The Control() command allows the system to control specific features of the bq27546-G1 during normal operation and additional features when the bq27546-G1 is in different access modes, as described in Table 8. SUBCOMMAND NAME CONTROL_STATUS DEVICE_TYPE Table 8. Control() Subcommands SUBCOMMAND CODE 0x0000 0x0001 SEALED ACCESS Yes Yes DESCRIPTION Reports the status of DF Checksum, Impedance Track, and so on Reports the device type of 0x0541 (indicating bq27546-G1) 20 Copyright © 2015, Texas Instruments Incorporated www.ti.com.cn SUBCOMMAND NAME FW_VERSION HW_VERSION RESET_DATA PREV_MACWRITE CHEM_ID BOARD_OFFSET CC_OFFSET DF_VERSION SET_FULLSLEEP SET_SHUTDOWN CLEAR_SHUTDOWN SET_HDQINTEN CLEAR_HDQINTEN STATIC_CHEM_CHKSUM ALL_DF_CHKSUM STATIC_DF_CHKSUM SYNC_SMOOTH SEALED IT_ENABLE IMAX_INT_CLEAR CAL_ENABLE RESET EXIT_CAL ENTER_CAL OFFSET_CAL bq27546-G1 ZHCSDO4 – MAY 2015 Table 8. Control() Subcommands (continued) SUBCOMMAND CODE 0x0002 0x0003 0x0005 0x0007 0x0008 0x0009 0x000A 0x000C 0x0010 0x0013 0x0014 0x0015 0x0016 0x0017 0x0018 0x0019 0x001E 0x0020 0x0021 0x0023 0x002D 0x0041 0x0080 0x0081 0x0082 SEALED ACCESS Yes Yes Yes Yes Yes No No Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes No No Yes No No No No No DESCRIPTION Reports the firmware version on the device type Reports the hardware version on the device type Returns reset data Returns previous Control() subcommand code Reports the chemical identifier of the Impedance Track configuration Forces the device to measure and store the board offset Forces the device to measure the CC offset Reports the data flash version of the device Sets the CONTROL_STATUS[FULLSLEEP] bit to 1 Sets the CONTROL_STATUS[SHUTDWN] bit to 1 Clears the CONTROL_STATUS[SHUTDWN] bit to 1 Forces CONTROL_STATUS [HDQHOSTIN] to 1 Forces CONTROL_STATUS [HDQHOSTIN] to 0 Calculates chemistry checksum Reports checksum for all data flash excluding device specific variables Reports checksum for static data flash excluding device specific variables Synchronizes RemCapSmooth() and FCCSmooth() with RemCapTrue() and FCCTrue() Places the fuel gauge in SEALED access mode Enables the Impedance Track algorithm Clears an Imax interrupt that is currently asserted on the RC2 pin Toggle CALIBRATION mode Forces a full reset of the fuel gauge Exit CALIBRATION mode Enter CALIBRATION mode Reports internal CC offset in CALIBRATION mode Copyright © 2015, Texas Instruments Incorporated 21 bq27546-G1 ZHCSDO4 – MAY 2015 www.ti.com.cn 9.6 Register Maps 9.6.1 Pack Configuration Register Some bq27546-G1 pins are configured via the Pack Configuration data flash register, as indicated in Table 9. This register is programmed/read via the methods described in the bq27546-G1 Technical Reference Manual (SLUUB74). The register is located at subclass = 64, offset = 0. High Byte Default = Bit 7 RESCAP 0 Low Byte GNDSEL Default = 0 Table 9. Pack Configuration Bit Definition Bit 6 CALEN 0 Bit 5 INTPOL 0 RFACTSTEP 1 SLEEP 1 Bit 4 Bit 3 INTSEL RSVD 1 0 0x11 RMFCC SE_PU 1 0 0x77 Bit 2 IWAKE 0 SE_POL 1 Bit 1 RSNS1 0 SE_EN 1 Bit 0 RSNS0 1 TEMPS 1 RESCAP = No-load rate of compensation is applied to the reserve capacity calculation. True when set. CALEN = Calibration mode is enabled. INTPOL = Polarity for Interrupt pin. (See INTERRUPT Mode.) INTSEL = Interrupt Pin select: 0 = SE pin, 1 = HDQ pin. (See INTERRUPT Mode.) RSVD = Reserved. Must be 0. IWAKE/RSNS1/RSNS0 = These bits configure the current wake function (see Wake-Up Comparator). GNDSEL = The ADC ground select control. The VSS (pins C1, C2) is selected as ground reference when the bit is clear. Pin A1 is selected when the bit is set. RFACTSTEP = Enables Ra step up/down to Max/Min Res Factor before disabling Ra updates. SLEEP = The fuel gauge can enter sleep, if operating conditions allow. True when set. (See SLEEP Mode.) RMFCC = RM is updated with the value from FCC, on valid charge termination. True when set. SE_PU = Pull-up enable for SE pin. True when set (push-pull). SE_POL = Polarity bit for SE pin. SE is active high when set (makes SE high when gauge is ready for shutdown). SE_EN = Indicates if set the shutdown feature is enabled. True when set. See the System Shutdown Enable section for details. TEMPS = Selects external thermistor for Temperature() measurements. True when set. 22 Copyright © 2015, Texas Instruments Incorporated www.ti.com.cn bq27546-G1 ZHCSDO4 – MAY 2015 9.6.2 Pack Configuration B Register Some bq27546-G1 pins are configured via the Pack Configuration B data flash register, as indicated in Table 10. This register is programmed/read via the methods described in the bq27546-G1 Technical Reference Manual (SLUUB74). The register is located at subclass = 64, offset = 2. Default = Bit 7 ChgDoD EoC 1 Table 10. Pack Configuration B Bit Definition Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 SE_TDD VconsEN SE_ISD RSVD LFPRelax 0 1 0 0 1 0x67 Bit 1 DoDWT 1 Bit 0 FConvEn 1 ChgDoDEoC = Enable DoD at EoC recalculation during charging only. True when set. The default setting is recommended. SE_TDD = Enable Tab Disconnection Detection. True when set. VconsEN = Enable voltage consistency check. True when set. The default setting is recommended. SE_ISD = Enable Internal Short Detection. True when set. RSVD = Reserved. Must be 0. LFPRelax = Enable LiFePO4 long relaxation mode. True when set. DoDWT = Enable DoD weighting feature of gauging algorithm. This feature can improve accuracy during relaxation in a flat portion of the voltage profile, especially when using LiFePO4 chemistry. True when set. FConvEn = Enable fast convergence algorithm. The default setting is recommended. 9.6.3 Pack Configuration C Register Some bq27546-G1 algorithm settings are configured via the Pack Configuration C data flash register, as indicated in Table 11. This register is programmed/read via the methods described in the bq27546-G1 Technical Reference Manual (SLUUB74). The register is located at subclass = 64, offset = 3. Default = Bit 7 RSVD 0 Table 11. Pack Configuration C Bit Definition Bit 6 RSVD 0 Bit 5 RelaxRCJumpOK 0 Bit 4 Bit 3 SmoothEn SleepWk Chg 1 1 0x18 Bit 2 RSVD 0 Bit 1 RSVD 0 Bit 0 RSVD 0 RSVD = Reserved. Must be 0. RelaxRCJumpOK = Allow SOC to change due to temperature change during relaxation when SOC smoothing algorithm is enabled. True when set. SmoothEn = Enable SOC smoothing algorithm. True when set. SleepWkChg = Enables compensation for the passed charge missed when waking from SLEEP mode. Copyright © 2015, Texas Instruments Incorporated 23 bq27546-G1 ZHCSDO4 – MAY 2015 10 Application and Implementation www.ti.com.cn NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 10.1 Application Information The bq27546-G1 measures the cell voltage, temperature, and current to determine battery SOC based on Impedance Track™ algorithm (see Theory and Implementation of Impedance Track Battery Fuel-Gauging Algorithm Application Note (SLUA450) for more information). The bq27546-G1 monitors charge and discharge activity by sensing the voltage across a small-value resistor (5 mΩ to 20 mΩ typ.) between the SRP and SRN pins and in series with the cell. By integrating charge passing through the battery, the battery’s SOC is adjusted during battery charge or discharge. 24 Copyright © 2015, Texas Instruments Incorporated bq27546-G1 ZHCSDO4 – MAY 2015 www.ti.com.cn 10.2 Typical Applications C1 0.1 µF C2 0.1 µF Vin Max: 4.2 V Current Max: 3 A TP2 CELL + Place C1 close to BAT pin Place C2 close to REGIN pin TB1 CELL + 1 2 CELL – TP1 CELL – J3 1 ON CE 2 3 OFF Ext Thermistor RT1 10 kΩ VCC TP7 C4 .47 µf TP8 VCC TS VCC E3 NC/GPIO E2 BAT E1 REGIN D3 NC/GPIO D2 CE D1 VCC C3 SE SE C2 VSS SRP A1 HDQ A2 SCL A3 SRN B1 TS B2 SDA B3 VSS C1 C3 TP5 1 µF 0.1 µF C6 R6 R9 100 100 AZ23C5V6-7 D1 R7 R4 100 100 R10 R8 100 100 AZ23C5V6-7 D2 VCC J6 1 2 R12 4.7 k 4 3 2 1 J8 HDQ VSS VCC J7 1 2 J9 1 2 R14 10 k R15 10 k 4 3 2 1 J10 SDA SCL VSS 0.1 µF C5 0.1 µF C7 Place R1, R3, C5, C6, C7 R1 Close to GG R3 100 100 TP6 Low-pass filter for coulomb counter input should be placed as close as possible to gas gauge IC. Connection to sense resistor must be of Kelvin connection type. R15 330 C13 0.1 µF U2 MM3511 3 6 DOUT V– 5 2 VDD COUT 4 VSS 1 DS R17 1 k U2/Q1A/Q1B TP9 PACK+ 2 PACK+/Load+ 1 PACK–/Load– TB2 TP10 PACK– TP5 R2 Q1:A Q1:B 0.01 SI6926DQ SI6926DQ C14 C15 0.1 µF 0.1 µF R7, R8, and R9 are optional pull-down resistors if pull-up resistors are applied. Figure 10. Schematic Copyright © 2015, Texas Instruments Incorporated 25 bq27546-G1 ZHCSDO4 – MAY 2015 www.ti.com.cn Typical Applications (continued) 10.2.1 Design Requirements Several key parameters must be updated to align with a given application's battery characteristics. For highest accuracy gauging, it is important to follow-up this initial configuration with a learning cycle to optimize resistance and maximum chemical capacity (Qmax) values prior to sealing and shipping systems to the field. Successful and accurate configuration of the fuel gauge for a target application can be used as the basis for creating a "golden" file that can be written to all gauges, assuming identical pack design and Li-Ion cell origin (chemistry, lot, and so on). Calibration data is included as part of this golden file to cut down on system production time. If using this method, it is recommended to average the voltage and current measurement calibration data from a large sample size and use these in the golden file. Table 12 shows the items that should be configured to achieve reliable protection and accurate gauging with minimal initial configuration. NAME Design Capacity Design Energy Scale Reserve Capacity-mAh Cycle Count Threshold Chem ID Load Mode Load Select Qmax Cell 0 Cell0 V at Chg Term Terminate Voltage Ra Max Delta Charging Voltage Taper Current Taper Voltage Dsg Current Threshold Chg Current Threshold Quit Current Avg I Last Run Avg P Last Run 26 Table 12. Key Data Flash Parameters for Configuration DEFAULT 1000 1 0 900 0100 1 1 1000 4200 3200 44 4200 100 100 60 75 40 –299 –1131 UNIT mAh — mAh mAh hex — — mAh mV mV mΩ mV mA mV mA mA mA mA mW RECOMMENDED SETTING Set based on the nominal pack capacity as interpreted from the cell manufacturer's data sheet. If multiple parallel cells are used, should be set to N × Cell Capacity. Set to 10 to convert all power values to cWh or to 1 for mWh. Design Energy is divided by this value. Set to desired runtime remaining (in seconds/3600) × typical applied load between reporting 0% SOC and reaching Terminate Voltage, if needed. Set to 90% of configured Design Capacity. Should be configured using TI-supplied Battery Management Studio (bqStudio) software. Default open-circuit voltage and resistance tables are also updated in conjunction with this step. Do not attempt to manually update reported Device Chemistry as this does not change all chemistry information. Always update chemistry using the bqStudio software tool. Set to applicable load model, 0 for constant current or 1 for constant power. Set to load profile which most closely matches typical system load. Set to initial configured value for Design Capacity. The gauge will update this parameter automatically after the optimization cycle and for every regular Qmax update thereafter. Set to nominal cell voltage for a fully charged cell. The gauge will update this parameter automatically each time full charge termination is detected. Set to empty point reference of battery based on system needs. Typical is between 3000 and 3200 mV. Set to 15% of Cell0 R_a 4 resistance after an optimization cycle is completed. Set based on nominal charge voltage for the battery in normal conditions (25°C, and so on). Used as the reference point for offsetting by Taper Voltage for full charge termination detection. Set to the nominal taper current of the charger + taper current tolerance to ensure that the gauge will reliably detect charge termination. Sets the voltage window for qualifying full charge termination. Can be set tighter to avoid or wider to ensure possibility of reporting 100% SOC in outer JEITA temperature ranges that use derated charging voltage. Sets threshold for gauge detecting battery discharge. Should be set lower than minimal system load expected in the application and higher than Quit Current. Sets the threshold for detecting battery charge. Can be set higher or lower depending on typical trickle charge current used. Also should be set higher than Quit Current. Sets threshold for gauge detecting battery relaxation. Can be set higher or lower depending on typical standby current and exhibited in the end system. Current profile used in capacity simulations at onset of discharge or at all times if Load Select = 0. Should be set to nominal system load. Is automatically updated by the gauge every cycle. Power profile used in capacity simulations at onset of discharge or at all times if Load Select = 0. Should be set to nominal system power. Is automatically updated by the gauge every cycle. Copyright © 2015, Texas Instruments Incorporated www.ti.com.cn bq27546-G1 ZHCSDO4 – MAY 2015 Typical Applications (continued) NAME Sleep Current Charge T0 Charge T1 Charge T2 Charge T3 Charge T4 Charge Current T0 Charge Current T1 Charge Current T2 Charge Current T3 Charge Current T4 Charge Voltage T0 Charge Voltage T1 Charge Voltage T2 Charge Voltage T3 Charge Voltage T4 Chg Temp Hys Chg Disabled Regulation V CC Gain CC Delta CC Offset Board Offset Pack V Offset Table 12. Key Data Flash Parameters for Configuration (continued) DEFAULT 15 0 10 45 50 60 50 50 50 50 0 210 210 207 205 0 5 4200 10 10 –1418 0 0 UNIT mA °C °C °C °C °C % Des Cap % Des Cap % Des Cap % Des Cap % Des Cap 20 mV 20 mV 20 mV 20 mV 20 mV °C mV mΩ mΩ Counts Counts mV RECOMMENDED SETTING Sets the threshold at which the fuel gauge enters SLEEP mode. Take care in setting above typical standby currents else entry to SLEEP may be unintentionally blocked. Sets the boundary between charging inhibit and charging with T0 parameters. Sets the boundary between charging with T0 and T1 parameters. Sets the boundary between charging with T1 and T2 parameters. Sets the boundary between charging with T2 and T3 parameters. Sets the boundary between charging with T3 and T4 parameters. Sets the charge current parameter for T0. Sets the charge current parameter for T1. Sets the charge current parameter for T2. Sets the charge current parameter for T3. Sets the charge current parameter for T4. Sets the charge voltage parameter for T0. Sets the charge voltage parameter for T1. Sets the charge voltage parameter for T2. Sets the charge voltage parameter for T3. Sets the charge voltage parameter for T4. Adds temperature hysteresis for boundary crossings to avoid oscillation if temperature is changing by a degree or so on a given boundary. Sets the voltage threshold for voltage regulation to system when charge is disabled. It is recommended to program to same value as Charging Voltage and maximum charge voltage that is obtained from Charge Voltage T0–4 parameters. Calibrate this parameter using TI-supplied bqStudio software and calibration procedure in the TRM. Determines conversion of coulomb counter measured sense resistor voltage to current. Calibrate this parameter using TI-supplied bqStudio software and calibration procedure in the TRM. Determines conversion of coulomb counter measured sense resistor voltage to passed charge. Calibrate this parameter using TI-supplied bqStudio software and calibration procedure in the TRM. Determines native offset of coulomb counter hardware that should be removed from conversions. Calibrate this parameter using TI-supplied bqStudio software and calibration procedure in the TRM. Determines native offset of the printed circuit board parasitics that should be removed from conversions. Calibrate this parameter using TI-supplied bqStudio software and calibration procedure in the TRM. Determines voltage offset between cell tab and ADC input node to incorporate back into or remove from measurement, depending on polarity. 10.2.2 Detailed Design Procedure 10.2.2.1 BAT Voltage Sense Input A ceramic capacitor at the input to the BAT pin is used to bypass AC voltage ripple to ground, greatly reducing its influence on battery voltage measurements. It proves most effective in applications with load profiles that exhibit high-frequency current pulses (that is, cell phones), but is recommended for use in all applications to reduce noise on this sensitive high-impedance measurement node. Copyright © 2015, Texas Instruments Incorporated 27 bq27546-G1 ZHCSDO4 – MAY 2015 www.ti.com.cn 10.2.2.2 SRP and SRN Current Sense Inputs The filter network at the input to the coulomb counter is intended to improve differential mode rejection of voltage measured across the sense resistor. These components should be placed as close as possible to the coulomb counter inputs and the routing of the differential traces length-matched to best minimize impedance mismatchinduced measurement errors. 10.2.2.3 Sense Resistor Selection Any variation encountered in the resistance present between the SRP and SRN pins of the fuel gauge will affect the resulting differential voltage and derived current it senses. As such, it is recommended to select a sense resistor with minimal tolerance and temperature coefficient of resistance (TCR) characteristics. The standard recommendation based on best compromise between performance and price is a 1% tolerance, 100-ppm drift sense resistor with a 1-W power rating. 10.2.2.4 TS Temperature Sense Input Similar to the BAT pin, a ceramic decoupling capacitor for the TS pin is used to bypass AC voltage ripple away from the high-impedance ADC input, minimizing measurement error. Another helpful advantage is that the capacitor provides additional ESD protection since the TS input to system may be accessible in systems that use removable battery packs. It should be placed as close as possible to the respective input pin for optimal filtering performance. 10.2.2.5 Thermistor Selection The fuel gauge temperature sensing circuitry is designed to work with a negative temperature coefficient-type (NTC) thermistor with a characteristic 10-kΩ resistance at room temperature (25°C). The default curve-fitting coefficients configured in the fuel gauge specifically assume a 103AT-2 type thermistor profile and so that is the default recommendation for thermistor selection purposes. Moving to a separate thermistor resistance profile (for example, JT-2 or others) requires an update to the default thermistor coefficients in data flash to ensure highest accuracy temperature measurement performance. 10.2.2.6 REGIN Power Supply Input Filtering A ceramic capacitor is placed at the input to the fuel gauge internal LDO to increase power supply rejection (PSR) and improve effective line regulation. It ensures that voltage ripple is rejected to ground instead of coupling into the internal supply rails of the fuel gauge. 10.2.2.7 VCC LDO Output Filtering A ceramic capacitor is also needed at the output of the internal LDO to provide a current reservoir for fuel gauge load peaks during high peripheral utilization. It acts to stabilize the regulator output and reduce core voltage ripple inside of the fuel gauge. 28 Copyright © 2015, Texas Instruments Incorporated www.ti.com.cn 10.3 Application Curves VREG25 - Regulator Output Voltage (V) 2.65 2.6 2.55 2.5 2.45 2.4 2.35 VREGIN = 2.7 V VREGIN = 4.5 V Temperature (GC) D001 fOSC - High Frequency Oscillator (MHz) bq27546-G1 ZHCSDO4 – MAY 2015 8.8 8.7 8.6 8.5 8.4 8.3 8.2 8.1 8 -40 -20 0 20 40 60 Temperature (GC) 80 100 D002 fLOSC - Low Frequency Oscillator (kHz) Figure 11. Regulator Output Voltage vs. Temperature 34 33.5 33 32.5 32 31.5 31 30.5 30 -40 -20 0 20 40 60 Temperature (GC) 80 100 D003 Reported Temperature Error (GC) Figure 12. High-Frequency Oscillator Frequency vs. Temperature 5 4 3 2 1 0 -1 -2 -3 -4 -5 -30 -20 -10 0 10 20 30 40 50 60 Temperature (GC) D004 Figure 13. Low-Frequency Oscillator Frequency vs. Temperature Figure 14. Reported Internal Temperature Measurement vs. Temperature 11 Power Supply Recommendations 11.1 Power Supply Decoupling Both the REGIN input pin and the VCC output pin require low equivalent series resistance (ESR) ceramic capacitors placed as close as possible to the respective pins to optimize ripple rejection and provide a stable and dependable power rail that is resilient to line transients. A 0.1-µF capacitor at the REGIN and a 1-µF capacitor at VCC will suffice for satisfactory device performance. Copyright © 2015, Texas Instruments Incorporated 29 bq27546-G1 ZHCSDO4 – MAY 2015 12 Layout www.ti.com.cn 12.1 Layout Guidelines 12.1.1 Sense Resistor Connections Kelvin connections at the sense resistor are as critical as those for the battery terminals. The differential traces should be connected at the inside of the sense resistor pads and not along the high-current trace path to prevent false increases to measured current that could result when measuring between the sum of the sense resistor and trace resistance between the tap points. In addition, the routing of these leads from the sense resistor to the input filter network and finally into the SRP and SRN pins needs to be as closely matched in length as possible or else additional measurement offset could occur. It is further recommended to add copper trace or pour-based "guard rings" around the perimeter of the filter network and coulomb counter inputs to shield these sensitive pins from radiated EMI into the sense nodes. This prevents differential voltage shifts that could be interpreted as real current change to the fuel gauge. All of the filter components need to be placed as close as possible to the coulomb counter input pins. 12.1.2 Thermistor Connections The thermistor sense input should include a ceramic bypass capacitor placed as close to the TS input pin as possible. The capacitor helps to filter measurements of any stray transients as the voltage bias circuit pulses periodically during temperature sensing windows. 12.1.3 High-Current and Low-Current Path Separation NOTE For best possible noise performance, it is important to separate the low-current and highcurrent loops to different areas of the board layout. The fuel gauge and all support components should be situated on one side of the boards and tap off of the highcurrent loop (for measurement purposes) at the sense resistor. Routing the low-current ground around instead of under high-current traces will further help to improve noise rejection. 30 版权 © 2015, Texas Instruments Incorporated www.ti.com.cn 12.2 Layout Example Use copper pours for battery power path to minimize IR losses Kelvin connect the BAT sense line right at positive battery terminal REGIN BAT RTHERM NC NC SE Vcc CE VS S VS S SRN SDA TS SCL R7 R4 C1 C2 C3 R6 bq27546-G1 ZHCSDO4 – MAY 2015 PACK+ SCL R10 SDA R8 SE HDQ R9 SRP HDQ Via connects to Power Ground 10 mΩ 1% Kelvin connect SRP and SRN connections right at Rsense terminals Figure 15. Layout Example PACK – Star ground right at PACK – for ESD return path 版权 © 2015, Texas Instruments Incorporated 31 bq27546-G1 ZHCSDO4 – MAY 2015 13 器件和文档支持 www.ti.com.cn 13.1 文档支持 13.1.1 相关文档 更多信息,请参见《bq27546-G1 技术参考手册》(文献编号:SLUUB74)。 13.2 社区资源 The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support. 13.3 商标 Impedance Track, Nano-Free, E2E are trademarks of Texas Instruments. I2C is a trademark of NXP B.V. Corporation. All other trademarks are the property of their respective owners. 13.4 静电放电警告 ESD 可能会损坏该集成电路。德州仪器 (TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理措施和安装程序 , 可能会损坏集成电路。 ESD 的损坏小至导致微小的性能降级 , 大至整个器件故障。 精密的集成电路可能更容易受到损坏 , 这是因为非常细微的参数更改都可 能会导致器件与其发布的规格不相符。 13.5 术语表 SLYZ022 — TI 术语表。 这份术语表列出并解释术语、首字母缩略词和定义。 14 机械、封装和可订购信息 以下页中包括机械、封装和可订购信息。 这些信息是针对指定器件可提供的最新数据。 这些数据会在无通知且不 对本文档进行修订的情况下发生改变。 欲获得该数据表的浏览器版本,请查阅左侧的导航栏。 32 版权 © 2015, Texas Instruments Incorporated 重要声明 德州仪器(TI) 及其下属子公司有权根据 JESD46 最新标准, 对所提供的产品和服务进行更正、修改、增强、改进或其它更改, 并有权根据 JESD48 最新标准中止提供任何产品和服务。客户在下订单前应获取最新的相关信息, 并验证这些信息是否完整且是最新的。所有产品的销售 都遵循在订单确认时所提供的TI 销售条款与条件。 TI 保证其所销售的组件的性能符合产品销售时 TI 半导体产品销售条件与条款的适用规范。仅在 TI 保证的范围内,且 TI 认为 有必要时才会使 用测试或其它质量控制技术。除非适用法律做出了硬性规定,否则没有必要对每种组件的所有参数进行测试。 TI 对应用帮助或客户产品设计不承担任何义务。客户应对其使用 TI 组件的产品和应用自行负责。为尽量减小与客户产品和应 用相关的风险, 客户应提供充分的设计与操作安全措施。 TI 不对任何 TI 专利权、版权、屏蔽作品权或其它与使用了 TI 组件或服务的组合设备、机器或流程相关的 TI 知识产权中授予 的直接或隐含权 限作出任何保证或解释。TI 所发布的与第三方产品或服务有关的信息,不能构成从 TI 获得使用这些产品或服 务的许可、授权、或认可。使用 此类信息可能需要获得第三方的专利权或其它知识产权方面的许可,或是 TI 的专利权或其它 知识产权方面的许可。 对于 TI 的产品手册或数据表中 TI 信息的重要部分,仅在没有对内容进行任何篡改且带有相关授权、条件、限制和声明的情况 下才允许进行 复制。TI 对此类篡改过的文件不承担任何责任或义务。复制第三方的信息可能需要服从额外的限制条件。 在转售 TI 组件或服务时,如果对该组件或服务参数的陈述与 TI 标明的参数相比存在差异或虚假成分,则会失去相关 TI 组件 或服务的所有明 示或暗示授权,且这是不正当的、欺诈性商业行为。TI 对任何此类虚假陈述均不承担任何责任或义务。 客户认可并同意,尽管任何应用相关信息或支持仍可能由 TI 提供,但他们将独力负责满足与其产品及在其应用中使用 TI 产品 相关的所有法 律、法规和安全相关要求。客户声明并同意,他们具备制定与实施安全措施所需的全部专业技术和知识,可预见 故障的危险后果、监测故障 及其后果、降低有可能造成人身伤害的故障的发生机率并采取适当的补救措施。客户将全额赔偿因 在此类安全关键应用中使用任何 TI 组件而 对 TI 及其代理造成的任何损失。 在某些场合中,为了推进安全相关应用有可能对 TI 组件进行特别的促销。TI 的目标是利用此类组件帮助客户设计和创立其特 有的可满足适用 的功能安全性标准和要求的终端产品解决方案。尽管如此,此类组件仍然服从这些条款。 TI 组件未获得用于 FDA Class III(或类似的生命攸关医疗设备)的授权许可,除非各方授权官员已经达成了专门管控此类使 用的特别协议。 只有那些 TI 特别注明属于军用等级或“增强型塑料”的 TI 组件才是设计或专门用于军事/航空应用或环境的。购买者认可并同 意,对并非指定面 向军事或航空航天用途的 TI 组件进行军事或航空航天方面的应用,其风险由客户单独承担,并且由客户独 力负责满足与此类使用相关的所有 法律和法规要求。 TI 已明确指定符合 ISO/TS16949 要求的产品,这些产品主要用于汽车。在任何情况下,因使用非指定产品而无法达到 ISO/TS16949 要 求,TI不承担任何责任。 数字音频 放大器和线性器件 数据转换器 DLP® 产品 DSP - 数字信号处理器 时钟和计时器 接口 逻辑 电源管理 微控制器 (MCU) RFID 系统 OMAP应用处理器 无线连通性 产品 www.ti.com.cn/audio www.ti.com.cn/amplifiers www.ti.com.cn/dataconverters www.dlp.com www.ti.com.cn/dsp www.ti.com.cn/clockandtimers www.ti.com.cn/interface www.ti.com.cn/logic www.ti.com.cn/power www.ti.com.cn/microcontrollers www.ti.com.cn/rfidsys www.ti.com/omap www.ti.com.cn/wirelessconnectivity 通信与电信 计算机及周边 消费电子 能源 工业应用 医疗电子 安防应用 汽车电子 视频和影像 应用 www.ti.com.cn/telecom www.ti.com.cn/computer www.ti.com/consumer-apps www.ti.com/energy www.ti.com.cn/industrial www.ti.com.cn/medical www.ti.com.cn/security www.ti.com.cn/automotive www.ti.com.cn/video 德州仪器在线技术支持社区 www.deyisupport.com IMPORTANT NOTICE 邮寄地址: 上海市浦东新区世纪大道1568 号,中建大厦32 楼邮政编码: 200122 Copyright © 2015, 德州仪器半导体技术(上海)有限公司 PACKAGE OPTION ADDENDUM www.ti.com 23-May-2015 PACKAGING INFORMATION Orderable Device BQ27546YZFR-G1 BQ27546YZFT-G1 Status Package Type Package Pins Package Eco Plan (1) Drawing Qty (2) ACTIVE DSBGA YZF 15 3000 Green (RoHS & no Sb/Br) ACTIVE DSBGA YZF 15 250 Green (RoHS & no Sb/Br) Lead/Ball Finish (6) SNAGCU SNAGCU MSL Peak Temp Op Temp (°C) (3) Level-1-260C-UNLIM -40 to 85 Level-1-260C-UNLIM -40 to 85 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. Device Marking (4/5) BQ27546 BQ27546 (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. 23-May-2015 Addendum-Page 2 YZF0015 PACKAGE OUTLINE DSBGA - 0.625 mm max height SCALE 6.500 DIE SIZE BALL GRID ARRAY B E A BALL A1 CORNER D 0.625 MAX 0.35 0.15 E BALL TYP 1 TYP SYMM C SEATING PLANE 0.05 C D 2 TYP C B 0.5 TYP A 15X 0.35 0.25 1 0.015 C A B SYMM D: Max = 2.64 mm, Min = 2.58 mm E: Max = 1.986 mm, Min =1.926 mm 2 3 0.5 TYP NOTES: 4219381/A 02/2017 NanoFree Is a trademark of Texas Instruments. 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. NanoFreeTM package configuration. www.ti.com YZF0015 EXAMPLE BOARD LAYOUT DSBGA - 0.625 mm max height DIE SIZE BALL GRID ARRAY (0.5) TYP 15X ( 0.245) 1 2 A (0.5) TYP B C 3 SYMM D ( 0.245) METAL E SYMM LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:30X 0.05 MAX 0.05 MIN METAL UNDER SOLDER MASK SOLDER MASK OPENING EXPOSED METAL NON-SOLDER MASK DEFINED (PREFERRED) EXPOSED METAL SOLDER MASK DEFINED ( 0.245) SOLDER MASK OPENING SOLDER MASK DETAILS NOT TO SCALE NOTES: (continued) 4. Final dimensions may vary due to manufacturing tolerance considerations and also routing constraints. For more information, see Texas Instruments literature number SNVA009 (www.ti.com/lit/snva009). 4219381/A 02/2017 www.ti.com YZF0015 EXAMPLE STENCIL DESIGN DSBGA - 0.625 mm max height DIE SIZE BALL GRID ARRAY 15X ( 0.25) (0.5) TYP 1 2 A (0.5) TYP B METAL TYP C (R0.05) TYP 3 SYMM D E SYMM SOLDER PASTE EXAMPLE BASED ON 0.1 mm THICK STENCIL SCALE:40X NOTES: (continued) 5. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. 4219381/A 02/2017 www.ti.com IMPORTANT NOTICE 重要声明 德州仪器 (TI) 公司有权按照最新发布的 JESD46 对其半导体产品和服务进行纠正、增强、改进和其他修改,并不再按最新发布的 JESD48 提 供任何产品和服务。买方在下订单前应获取最新的相关信息,并验证这些信息是否完整且是最新的。 TI 公布的半导体产品销售条款 (http://www.ti.com/sc/docs/stdterms.htm) 适用于 TI 已认证和批准上市的已封装集成电路产品的销售。另有其 他条款可能适用于其他类型 TI 产品及服务的使用或销售。 复制 TI 数据表上 TI 信息的重要部分时,不得变更该等信息,且必须随附所有相关保证、条件、限制和通知,否则不得复制。TI 对该等复制文 件不承担任何责任。第三方信息可能受到其它限制条件的制约。在转售 TI 产品或服务时,如果存在对产品或服务参数的虚假陈述,则会失去 相关 TI 产品或服务的明示或暗示保证,且构成不公平的、欺诈性商业行为。TI 对此类虚假陈述不承担任何责任。 买方和在系统中整合 TI 产品的其他开发人员(总称“设计人员”)理解并同意,设计人员在设计应用时应自行实施独立的分析、评价和判断,且 应全权 负责并确保 应用的安全性, 及设计人员的 应用 (包括应用中使用的所有 TI 产品)应符合所有适用的法律法规及其他相关要求。设计 人员就自己设计的 应用声明,其具备制订和实施下列保障措施所需的一切必要专业知识,能够 (1) 预见故障的危险后果,(2) 监视故障及其后 果,以及 (3) 降低可能导致危险的故障几率并采取适当措施。设计人员同意,在使用或分发包含 TI 产品的任何 应用前, 将彻底测试该等 应用 和 该等应用中所用 TI 产品的 功能。 TI 提供技术、应用或其他设计建议、质量特点、可靠性数据或其他服务或信息,包括但不限于与评估模块有关的参考设计和材料(总称“TI 资 源”),旨在帮助设计人员开发整合了 TI 产品的 应用, 如果设计人员(个人,或如果是代表公司,则为设计人员的公司)以任何方式下载、 访问或使用任何特定的 TI 资源,即表示其同意仅为该等目标,按照本通知的条款使用任何特定 TI 资源。 TI 所提供的 TI 资源,并未扩大或以其他方式修改 TI 对 TI 产品的公开适用的质保及质保免责声明;也未导致 TI 承担任何额外的义务或责任。 TI 有权对其 TI 资源进行纠正、增强、改进和其他修改。除特定 TI 资源的公开文档中明确列出的测试外,TI 未进行任何其他测试。 设计人员只有在开发包含该等 TI 资源所列 TI 产品的 应用时, 才被授权使用、复制和修改任何相关单项 TI 资源。但并未依据禁止反言原则或 其他法理授予您任何TI知识产权的任何其他明示或默示的许可,也未授予您 TI 或第三方的任何技术或知识产权的许可,该等产权包括但不限 于任何专利权、版权、屏蔽作品权或与使用TI产品或服务的任何整合、机器制作、流程相关的其他知识产权。涉及或参考了第三方产品或服务 的信息不构成使用此类产品或服务的许可或与其相关的保证或认可。使用 TI 资源可能需要您向第三方获得对该等第三方专利或其他知识产权 的许可。 TI 资源系“按原样”提供。TI 兹免除对资源及其使用作出所有其他明确或默认的保证或陈述,包括但不限于对准确性或完整性、产权保证、无屡 发故障保证,以及适销性、适合特定用途和不侵犯任何第三方知识产权的任何默认保证。TI 不负责任何申索,包括但不限于因组合产品所致或 与之有关的申索,也不为或对设计人员进行辩护或赔偿,即使该等产品组合已列于 TI 资源或其他地方。对因 TI 资源或其使用引起或与之有关 的任何实际的、直接的、特殊的、附带的、间接的、惩罚性的、偶发的、从属或惩戒性损害赔偿,不管 TI 是否获悉可能会产生上述损害赔 偿,TI 概不负责。 除 TI 已明确指出特定产品已达到特定行业标准(例如 ISO/TS 16949 和 ISO 26262)的要求外,TI 不对未达到任何该等行业标准要求而承担 任何责任。 如果 TI 明确宣称产品有助于功能安全或符合行业功能安全标准,则该等产品旨在帮助客户设计和创作自己的 符合 相关功能安全标准和要求的 应用。在应用内使用产品的行为本身不会 配有 任何安全特性。设计人员必须确保遵守适用于其应用的相关安全要求和 标准。设计人员不可将 任何 TI 产品用于关乎性命的医疗设备,除非已由各方获得授权的管理人员签署专门的合同对此类应用专门作出规定。关乎性命的医疗设备是 指出现故障会导致严重身体伤害或死亡的医疗设备(例如生命保障设备、心脏起搏器、心脏除颤器、人工心脏泵、神经刺激器以及植入设 备)。此类设备包括但不限于,美国食品药品监督管理局认定为 III 类设备的设备,以及在美国以外的其他国家或地区认定为同等类别设备的 所有医疗设备。 TI 可能明确指定某些产品具备某些特定资格(例如 Q100、军用级或增强型产品)。设计人员同意,其具备一切必要专业知识,可以为自己的 应用选择适合的 产品, 并且正确选择产品的风险由设计人员承担。设计人员单方面负责遵守与该等选择有关的所有法律或监管要求。 设计人员同意向 TI 及其代表全额赔偿因其不遵守本通知条款和条件而引起的任何损害、费用、损失和/或责任。 邮寄地址:上海市浦东新区世纪大道 1568 号中建大厦 32 楼,邮政编码:200122 Copyright © 2017 德州仪器半导体技术(上海)有限公司

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