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    Q1: An AJMP instruction is encoded in addresses 0x3E12, 0x3E13, namely 0x3E12: 0x21 0x3E13: 0x4A What would be the destination address (in hexadecimal)? Show briefly your steps. The destination address is 0x394A The first 5 bits of the destination is same as the first 5 bits of the instruction address 3E12 ----00111 The middle 3 bits of the destination is same as the first  3 bits of the opcode 0x21 ----001 The last 8 bits of the destination is same as the second instruction 0x4A Thus the whole destination is 0011100101001010 ---- 0x394A Q2: Translate the following piece of C code fragment into 8051 assembly: if (x > 100)     x = 255; else     x = 0; You can assume that the variable x is stored at byte address 0x20. MOV A, 20h CJNE A, #100, L_NOTEQ SJMP L_IF L_NOTEQ:JNC L_IF SJMP L_ELSE L_IF: MOV 20h, #255 SJMP L_OUT L_ELSE: MOV 20h, #0 L_OUT: Q3: Study page 8 of lecture note "21-8051IO1" which shows the internal structure of P0 port pin. Suggest the values of port SFR latch (Q), ADDR/DATA and Control if (a) the 8051 software clears the port pin; (b) the 8051 hardware sets the port pin Possible values are '1' (HIGH), '0' (LOW) and 'X' (don't care). (a) port SFR latch(Q) 0 ADDR/DATA 0 Control 1 (b) port SFR latch(Q) 1 ADDR/DATA 0 Control 1   Q4: Study the following 8051 assembly code fragment: DELAY: MOV R1, #25 HERE:  NOP        DJNZ R1, HERE How many machine cycles does it take to execute the above fragment? Write down your steps. It takes 76 machine cycles to execute. The first instruction "MOV R1, #25" takes 1 machine cycle, "NOP" takes 1 machine cycle, "DJNZ R1, HERE" takes 2 machine cycles. "NOP" and "DJNZ R1, HERE" executes 25 times. So the total is 1+(1+2)*25=76 Q5: Based on the machine structure on page 9 of "22-StackCall", write down a list of possible microcodes to implement the LCALL instruction. ROM_AR<-PC, PC<-PC+1 DPTRH<-ROM_read() ROM_AR<-PC, PC<-PC+1 DPTRL<-ROM_read() SP<-SP+1 RAM_AR<-SP DBus<-PCL, RAM_write() SP<-SP+1 RAM_AR<-SP DBus<-PCH, RAM_write() PCH<-DPTRH PCL<-DPTRL Q6: The following figure show the contents of a stack frame at the beginning of the subroutine call. low addr   |                  |            +------------------+            |       arg1       |            +------------------+            |       arg2       |            +------------------+            |       arg3       |            +------------------+            | return low  byte |            +------------------+ SP ->      | return high byte |            +------------------+ high addr  |                  | Write a short piece of 8051 assembly code to copy the first argument (arg1) to register R1. You are allowed to change the values of A and R0 ONLY. MOV A, SP CLR C SUBB A, #4 MOV R0, A MOV A, @R0 MOV R1, A Q7: What values will you load to SFRs TH0 and TL0 if you want the timer 0 to time for approximately 5.475 ms, assuming a 12 MHz oscillator? Show briefly your steps. 1 machine cycle takes 1µs when using a 12 MHz oscillator. 5.475ms equals to 5475 machine cycles. We should load 0xEA to TH0 and load 0x9D to TL0. Q8: What is the correct byte value for SFR TMOD if you want to configure: (a) software-gated timer 1 in mode 2, using internal clock (b) hardware-gated timer 0 in mode 1, using external clock input? Pages 12 and 15 of "23-Timer" should be useful. (a) 0x20 (b) 0x0D

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