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标    签:慧荣SM3267USB3.0datasheet

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慧荣SM3267主控规格书

Sm3267 superspeed USB3.0 flash driver cotroller datasheet

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DYNA FAMILY SM3267 SuperSpeed USB 3.0 Flash Drive Controller Datasheet Revision 1.0 Apr 2014 SM3267 Datasheet Revision History Revision Date 0.1 May 10, 2013 1.0 Apr 11, 2014 Description Preliminary release  Added the built-in voltage regulators in Key Features (1.2)  Added the E-LQFP-48 pin assignments and package outline (2.1, 2.2 and 4.2)  Updated Block Diagram (1.3)  Added the ordering numbers (5) IMPORTANT NOTICE INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH PRODUCTS OF SILICON MOTION, INC. (“SMI”). NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN SMI'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, SMI ASSUMES NO LIABILITY WHATSOEVER, AND SMI DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF SMI PRODUCTS INCLUDING LIABILITY OR WARRANTIES FOR FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. SMI products are not intended for use in medical, life saving, life sustaining, critical control or safety systems, or in nuclear facility applications. SMI may make changes to specifications and product descriptions at any time, without notice. SMI may have patents or pending patent applications, trademarks, copyrights, or other intellectual property rights that relate to the presented subject matter. The furnishing of documents and other materials and information does not constitute any license, express or implied, by estoppel or otherwise, to any such patents, trademarks, copyrights, or other intellectual property rights. The information in this document is furnished for informational use only, is subject to change without notice, and should not be construed as a commitment by SMI. SMI assumes no responsibility or liability for any errors or inaccuracies that may appear in this document or any software that may be provided in association with this document. Except as permitted by such license, no part of this document may be reproduced, stored in a retrieval system, or transmitted in any form or by any means without the express written consent of SMI. Contact your local SMI sales office or your distributor to obtain the latest specifications and before placing your product order. Silicon Motion and Silicon Motion logo are registered trademarks of SMI and/or its affiliates. Other brand names mentioned herein are for identification purposes only and may be trademarks and/or registered trademarks of their respective owners. Copyright © 2014, SMI. All Rights Reserved. www.siliconmotion.com Revision 1.0 ii Revision History SM3267 Datasheet Table of Contents 1. Overview ............................................................................................................................................ 5 1.1 Product Description ................................................................................................................... 5 1.2 Key Features ............................................................................................................................. 5 1.3 Block Diagram ........................................................................................................................... 7 2. Pin Assignments and Signal Descriptions ..................................................................................... 8 2.1 Pin Assignments........................................................................................................................ 8 2.2 Signal Descriptions.................................................................................................................. 10 3. Electrical Characteristics ............................................................................................................... 12 3.1 DC Characteristics................................................................................................................... 12 3.2 Flash Interface AC Characteristics.......................................................................................... 13 3.2.1 Legacy NAND ............................................................................................................. 13 3.2.2 Toggle NAND.............................................................................................................. 16 4. Package Information ....................................................................................................................... 20 4.1 48-Pin QFN Package Outline .................................................................................................. 20 4.2 48-Pin E-LQFP Package Outline............................................................................................. 21 4.3 Top Marking............................................................................................................................. 22 5. Product Ordering Information........................................................................................................ 23 Revision 1.0 iii Table of Contents SM3267 Datasheet List of Tables Table 1: Table 2: Table 3: Table 4: Table 5: Table 6: SM3267 Signal Descriptions ............................................................................................... 10 Absolute Maximum Ratings................................................................................................. 12 DC Characteristics .............................................................................................................. 12 AC Timing Parameters for Legacy NAND ........................................................................... 13 AC Timing Parameters for Toggle DDR NAND................................................................... 16 Ordering Information ........................................................................................................... 23 List of Figures Figure 1: Figure 2: Figure 3: Figure 4: Figure 5: Figure 6: Figure 7: Figure 8: Figure 9: Figure 10: Figure 11: Figure 12: Figure 13: Figure 14: SM3267 Block Diagram......................................................................................................... 7 48-Pin QFN Pin Assignments (Top View) ............................................................................. 8 48-Pin E-LQFP Pin Assignments (Top View)........................................................................ 9 Command Latch Cycle Timing ............................................................................................ 14 Address Latch Cycle Timing................................................................................................ 14 Input Data Latch Cycle Timing ............................................................................................ 15 Serial Access Cycle after Read........................................................................................... 15 Toggle NAND Command Latch Cycle Timing..................................................................... 17 Toggle NAND Address Latch Cycle Timing (1)................................................................... 17 Toggle NAND Address Latch Cycle Timing (2)................................................................... 18 Toggle NAND Output Data (Write) Cycle Timing ................................................................ 18 Toggle NAND Input Data (Read) Cycle Timing................................................................... 19 Top Marking of 48-Pin QFN ................................................................................................ 22 Top Marking of 48-Pin E-LQFP ........................................................................................... 22 Revision 1.0 iv Overview SM3267 Datasheet 1. Overview 1.1 Product Description The SM3267 is a USB 3.0 single-channel flash drive controller offering high performance and high compatibility for SLC, MLC, TLC, and high-speed Toggle and ONFI DDR NAND. For USB 3.0 Flash Disk applications, this controller supports high capacity of up to 4 NAND flash devices. The SM3267 delivers high data transfer rate, and ensures data accuracy and reliability with the powerful ECC engine which can overcome the read/write disturbances on new generation NAND. By integrating an embedded crystal and other components, the controller can reduce customer overall cost at a system level. The SM3267 is available in QFN-48 and E-LQFP-48 green packages with manufacturing-ready turnkey solution. 1.2 Key Features  USB 3.0 SuperSpeed (5 Gbps) and USB High-Speed Interface  Compliant with USB 3.0 Specification Rev. 1.0  Compliant with USB 2.0 Specification Rev. 2.0  USB Mass Storage Class Specification Rev. 1.0  USB Mass Storage Class Bulk-Only Transport Protocol  Supports USB 3.0 multi-level link power management  NAND Flash Support  Single-channel flash interface  Supports 2-way and 4-way interleave operation  Configurable ECC engine with correction capability up to 72-bit/1KB  Supports SLC/MLC/TLC with 4KB/8KB/16KB page  Supports Toggle/ONFI DDR NAND flash  Supports 3.3V/1.8V NAND Flash  Supports Bad Column Management  The crystal-less design offers lower BOM cost  Built-in 3.3V/1.2V voltage regulators  Supports “Write Protect” security function to protect the data in USB Flash Disk  Supports LED indicator to indicate the access status  Supports VID, PID, serial number, and vender information update  Supports firmware in-system programming (ISP) function for firmware upgrade  Low power 1.2V core operation Revision 1.0 5 Overview SM3267 Datasheet  Supports the operating systems: − Windows 8, Windows 7, Windows Vista, Windows XP, Windows 2000, Windows ME, Windows 98/98SE1 − Mac OS 10.x − Linux kernel 2.4  Supports Windows 8, Windows 7, and Windows Vista ReadyBoost function  Package Option (Lead-free and RoHS compliant) − 48-pin QFN − 48-pin E-LQFP 1: Driver for Windows 98/98SE/ME/2000 is not available in SuperSpeed mode. Revision 1.0 6 Overview 1.3 Block Diagram Figure 1: SM3267 Block Diagram SM3267 Datasheet USB Host USB 3.0/ USB 2.0 PHY USB 3.0/ USB 2.0 Controller DMA Engine NFC Controller Analog IP RAM TSB Command Accelerator Pad Controller/ Test Mode Micro Processor NAND Flash Chips LED Indicator/ WP Switch Revision 1.0 7 Overview 2. Pin Assignments and Signal Descriptions 2.1 Pin Assignments Figure 2: 48-Pin QFN Pin Assignments (Top View) SM3267 Datasheet 48 VGG 47 RXP 46 RXN 45 VPP 44 TXP 43 TXN 42 VSSA 41 DM 40 DP 39 VCCA 38 XI 37 XO RB0 1 F0_D0 2 F0_D1 3 F0_D2 4 F0_D3 5 VDD 6 VCCIOF 7 F0_DQS 8 F0_D4 9 F0_D5 10 F0_D6 11 F0_D7 12 SM3267 48-pin QFN 36 VDD 35 TESTN 34 FNWP 33 VCCIOF 32 F0_CE3 31 F0_CE2 30 F0_CE1 29 F0_CE0 28 DCDC_GND 27 LX 26 V12A_PAD 25 VGNDA RB1 13 F0_NWE 14 F0_NRE 15 VCCIOF 16 F0_CLE 17 F0_ALE 18 BCE 19 VDD 20 WPRO 21 LED 22 V33_PAD 23 VCCAH5 24 Revision 1.0 8 Pin Assignments and Signal Descriptions Figure 3: 48-Pin E-LQFP Pin Assignments (Top View) SM3267 Datasheet VGG 48 RXP 47 RXN 46 VPP 45 TXP 44 TXN 43 VSSA 42 DM 41 DP 40 VCCA 39 XI 38 XO 37 1 RB0 2 F0_D0 3 F0_D1 4 F0_D2 5 F0_D3 6 VDD 7 VCCIOF 8 F0_DQS 9 F0_D4 10 F0_D5 11 F0_D6 12 F0_D7 SM3267 48-pin E-LQFP VDD 36 TESTN 35 FNWP 34 VCCIOF 33 F0_CE3 32 F0_CE2 31 F0_CE1 30 F0_CE0 29 DCDC_GND 28 LX 27 V12A_PAD 26 VGNDA 25 13 RB1 14 F0_NWE 15 F0_NRE 16 VCCIOF 17 F0_CLE 18 F0_ALE 19 BCE 20 VDD 21 WPRO 22 LED 23 V33_PAD 24 VCCAH5 Revision 1.0 9 Pin Assignments and Signal Descriptions SM3267 Datasheet 2.2 Signal Descriptions Table 1: SM3267 Signal Descriptions Pin No. Signal Type 1 RB0 I 2 F0_D0 I/O 3 F0_D1 I/O 4 F0_D2 I/O 5 F0_D3 I/O 6 VDD PWR 7 VCCIOF PWR 8 F0_DQS I/O 9 F0_D4 I/O 10 F0_D5 I/O 11 F0_D6 I/O 12 F0_D7 I/O 13 RB1 I 14 F0_NWE O 15 F0_NRE O 16 VCCIOF PWR 17 F0_CLE O 18 F0_ALE O 19 BCE I 20 VDD PWR 21 WPRO I 22 LED O 23 V33_PAD PWR 24 VCCAH5 PWR 25 VGNDA GND 26 V12A_PAD PWR 27 LX I/O 28 DCDC_GND GND 29 F0_CE0 O 30 F0_CE1 O 31 F0_CE2 O 32 F0_CE3 O 33 VCCIOF PWR 34 FNWP O Description Flash Ready/Busy Signal Flash Data Bus Bit 0 Flash Data Bus Bit 1 Flash Data Bus Bit 2 Flash Data Bus Bit 3 Core Power Flash I/O Power (3.3V/1.8V) Flash Data Strobe Flash Data Bus Bit 4 Flash Data Bus Bit 5 Flash Data Bus Bit 6 Flash Data Bus Bit 7 Flash Ready/Busy Signal Flash Write Enable (active low) Flash Read Enable (active low) Flash I/O Power (3.3V/1.8V) Flash Command Latch Enable Flash Address Latch Enable Bad Column Function Enable Core Power Chip Write Protect USB LED Indicator Regulator 3.3V Power Output Regulator 5V Power Input Ground for PLL PLL Power Connect to external inductor (DC-to-DC converter) Ground for DC-to-DC converter Flash Chip Enable 0 Flash Chip Enable 1 Flash Chip Enable 2 Flash Chip Enable 3 Flash I/O Power (3.3V/1.8V) Flash Write Protect (active low) Revision 1.0 10 Pin Assignments and Signal Descriptions Pin No. 35 36 37 38 39 40 41 42 43 44 45 46 47 48 Signal TESTN VDD XO XI VCCA DP DM VSSA TXN TXP VPP RXN RXP VGG Type I PWR O I PWR I/O I/O GND O O PWR I I GND Description Test Mode (active low) Core Power 24 MHz PHY Crystal Output 24 MHz PHY Crystal Input USB 2.0 PHY Power (3.3V) USB 2.0 Data Positive Pin USB 2.0 Data Negative Pin Ground for USB 2.0 PHY USB 3.0 TX Data Negative Pin USB 3.0 TX Data Positive Pin USB 3.0 PHY Power (1.2V) USB 3.0 RX Data Negative Pin USB 3.0 RX Data Positive Pin Ground for USB 3.0 PHY SM3267 Datasheet Revision 1.0 11 Pin Assignments and Signal Descriptions 3. Electrical Characteristics 3.1 DC Characteristics Table 2: Absolute Maximum Ratings Parameter Operating Temperature Storage Temperature Voltage with Respect to Ground Core Power Supply Voltage Regulator Power Supply Voltage 1.8V Flash I/O Supply Voltage 3.3V Flash I/O Supply Voltage USB 2.0 PHY 3.3V Input Voltage USB 3.0 PHY 1.2V Input Voltage PLL 1.2V Input Voltage Symbol TA TSTG VDD VCCAH5 VCCIOF VCCIOF VCCA VPP V12A_PAD Table 3: DC Characteristics Parameter Regulator Power Voltage Regulator Power Output Output High Voltage Output Low Voltage Input High Voltage Input Low Voltage Peak Voltage on All Lines All Input Leakage Current All Output Leakage Current Bus Line Capacitance Symbol VCCAH5 V33_PAD VOH VOL VIH VIL CL SM3267 Datasheet Min Max Unit 0 70 °C -55 +150 °C -0.3 +5.5 V 1.08 1.32 V 4.0 5.5 V 1.62 1.98 V 3.0 3.6 V 3.0 3.6 V 1.02 1.32 V 1.02 1.32 V Min Typ Max Unit 4.0 5.0 5.5 V 3.3 2.4 V 0.4 V 2.0 V 0.8 V -0.5 3.6 V -10 10 µA -10 10 µA 20 pF Revision 1.0 12 Electrical Characteristics 3.2 Flash Interface AC Characteristics 3.2.1 Legacy NAND Table 4: AC Timing Parameters for Legacy NAND Parameter Symbol CLE Setup Time tCLS CLE Hold Time tCLH CE Setup Time tCS CE Hold Time tCH ALE Setup Time tALS ALE Hold Time tALH WE Pulse Width tWP Data Setup Time tDS Data Hold Time tDH Write Cycle Time tWC WE High Hold Time tWH Read Cycle Time tRC RE High Hold Time tREH R/B ready to RE low tRR Note: tCK = system clock operation period. SM3267 Datasheet Min Max Unit 1 tCK 1 tCK >20 ns 1 tCK 1 tCK 1 tCK 1 tCK 1 tCK 1 tCK 2 tCK 1 tCK 2 tCK 1 tCK 5 tCK Revision 1.0 13 Electrical Characteristics Figure 4: Command Latch Cycle Timing SM3267 Datasheet Figure 5: Address Latch Cycle Timing Revision 1.0 14 Electrical Characteristics Figure 6: Input Data Latch Cycle Timing SM3267 Datasheet Figure 7: Serial Access Cycle after Read Revision 1.0 15 Electrical Characteristics 3.2.2 Toggle NAND Table 5: AC Timing Parameters for Toggle DDR NAND Parameter Symbol CLE/ALE Setup Time tCALS CLE/ALE Hold Time tCALH DQS Setup Time for Data Input Start tCDQSS CE Setup Time tCS CE Hold Time tCH Command/Address Setup Time tCAS Command/Address Hold Time tCAH Data Setup Time tDS Data Hold Time tDH Write Cycle Time tWC WE High Pulse Width tWH WE Low Pulse Width tWP Read Cycle Time tRC RE High Pulse Width tREH RE Low Pulse Width tRP Data Strobe Cycle Time tDSC DQS Input Low Pulse Width tDQSL DQS Input High Pulse Width tDQSH Read Preamble tRPRE Read Postamble tRPST Read Postamble Hold Time tRPSTH Write Preamble tWPRE Write Postamble tWPST Write Postamble Hold Time tWPSTH Min 1 1 > 100 > 20 >5 1 1 0.5 0.5 2 1 1 2 1 1 2 1 1 2 > 100 > 100 > 83 > 83 >5 SM3267 Datasheet Max Unit tCK tCK ns ns ns tCK tCK tCK tCK tCK tCK tCK tCK tCK tCK tCK tCK tCK tCK ns ns ns ns ns Revision 1.0 16 Electrical Characteristics Figure 8: Toggle NAND Command Latch Cycle Timing SM3267 Datasheet Figure 9: Toggle NAND Address Latch Cycle Timing (1) Revision 1.0 17 Electrical Characteristics Figure 10: Toggle NAND Address Latch Cycle Timing (2) SM3267 Datasheet Figure 11: Toggle NAND Output Data (Write) Cycle Timing Revision 1.0 18 Electrical Characteristics Figure 12: Toggle NAND Input Data (Read) Cycle Timing SM3267 Datasheet Revision 1.0 19 Electrical Characteristics 4. Package Information 4.1 48-Pin QFN Package Outline Top View Bottom View SM3267 Datasheet Side View SYMBOL MIN NOM MAX SYMBOL MIN NOM MAX Notes: A 0.80 0.85 0.90 D2 4.40 4.50 4.60 1. All dimensions are in Millimeters. 2. Dimensioning and tolerancing conform A1 0 0.02 0.05 E 5.90 6.00 6.10 to ASME Y14.5M-1994. A3 0.203 REF E2 4.40 4.50 4.60 3. Refer to JEDEC Standard MO-220 b 0.15 0.20 0.25 e 0.40 BSC issue “K” WJJE. 4. Leadframe material is OLIN194 and D 5.90 6.00 6.10 L 0.30 0.40 0.50 thickness is 0.203 mm (8 Mil). Revision 1.0 20 Package Information 4.2 48-Pin E-LQFP Package Outline SM3267 Datasheet SYMBOL MIN A --- A1 0.05 A2 1.35 b 0.17 b1 0.17 c 0.09 c1 0.09 D 8.9 D1 6.9 D2 3.9 E 8.9 E1 6.9 NOM ----1.40 0.22 0.20 ----9.0 7.0 4.0 9.0 7.0 MAX SYMBOL MIN NOM MAX Notes: 1.60 E2 3.9 4.0 4.1 1. Dimension D1 and E1 do not include 0.15 e 0.50 BSC mold protrusion. Allowable protrusion 1.45 L 0.45 0.60 0.75 is 0.25 mm per side D1 and E1 are 0.27 L1 1.00 REF maximum plastic body size dimension 0.23 R1 0.08 --- --- including mold mismatch. 2. Dimension b does not include dambar 0.20 R2 0.08 --- 0.20 protrusion. Allowable dambar 0.16 Y --- --- 0.075 protrusion shall not cause the lead 9.1  0° 3.5° 7° width to exceed the maximum b 7.1 1 0° --- --- dimension by more than 0.08 mm. 4.1 2 11° 12° --- 3. All dimensions are in millimeters. 9.1 3 11° 12° 13° 4. Exposed pad 4.0 x 4.0 mm. 7.1 Revision 1.0 21 Package Information 4.3 Top Marking Figure 13: Top Marking of 48-Pin QFN IC Revision Pin 1 Indicator Assembly Location SM3267L -XX TW Figure 14: Top Marking of 48-Pin E-LQFP SM3267 Datasheet L QFN 6x6 mm Package Date Code (YYWW) Wafer Lot Number Internal Code Wafer Lot Number Assembly Location Pin 1 Indicator SM3267Q XX TAIWAN Q LQFP 7x7 mm Package XX IC Revision Date Code (YYWW) Internal Code Revision 1.0 22 Package Information 5. Product Ordering Information Table 6: Ordering Information Ordering Number Operating Temperature SM326LX070000-XX 0°C ~ 70°C SM326QX070000-XX 0°C ~ 70°C Package Type 48-pin QFN 48-pin E-LQFP Note: The suffix “XX” denotes the IC revision. SM3267 Datasheet Dimension 6 x 6 x 0.9 (mm) 7 x 7 x 1.4 (mm) Revision 1.0 23 Product Ordering Information

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