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Cortex_M4技术参考手册

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Cortex_M4

Cortex_M4技术参考手册

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ARM CortexM4 Processor Revision r0p1 Technical Reference Manual Copyright 2009 2010 2013 ARM Limited All rights reserved ARM DDI 0439D ID061113 ARM CortexM4 Processor Technical Reference Manual Copyright 2009 2010 2013 ARM Limited All rights reserved Release Information The following changes have been made to this book Change History Date Issue Confidentiality Change 22 December 2009 2 March 2010 29 June 2010 11 June 2013 A B C D NonConfidential Restricted Access First release for r0p0 NonC......

ARM® Cortex™-M4 Processor Revision r0p1 Technical Reference Manual Copyright © 2009, 2010, 2013 ARM Limited. All rights reserved. ARM DDI 0439D (ID061113) ARM Cortex-M4 Processor Technical Reference Manual Copyright © 2009, 2010, 2013 ARM Limited. All rights reserved. Release Information The following changes have been made to this book. Change History Date Issue Confidentiality Change 22 December 2009 2 March 2010 29 June 2010 11 June 2013 A B C D Non-Confidential, Restricted Access First release for r0p0 Non-Confidential Non-Confidential Non-Confidential Second release for r0p0 First release for r0p1 Second release for r0p1 Proprietary Notice Words and logos marked with ® or ™ are registered trademarks or trademarks of ARM® in the EU and other countries, except as otherwise stated below in this proprietary notice. Other brands and names mentioned herein may be the trademarks of their respective owners. Neither the whole nor any part of the information contained in, or the product described in, this document may be adapted or reproduced in any material form except with the prior written permission of the copyright holder. The product described in this document is subject to continuous developments and improvements. All particulars of the product and its use contained in this document are given by ARM in good faith. However, all warranties implied or expressed, including but not limited to implied warranties of merchantability, or fitness for purpose, are excluded. This document is intended only to assist the reader in the use of the product. ARM shall not be liable for any loss or damage arising from the use of any information in this document, or any error or omission in such information, or any incorrect use of the product. Where the term ARM is used it means “ARM or any of its subsidiaries as appropriate”. Confidentiality Status This document is Non-Confidential. The right to use, copy and disclose this document may be subject to license restrictions in accordance with the terms of the agreement entered into by ARM and the party that ARM delivered this document to. Product Status The information in this document is Final (information on a developed product). Web Address http://www.arm.com ARM DDI 0439D ID061113 Copyright © 2009, 2010, 2013 ARM Limited. All rights reserved. Non-Confidential ii Contents ARM Cortex-M4 Processor Technical Reference Manual Chapter 1 Chapter 2 Chapter 3 Preface About this book ........................................................................................................... vi Feedback .................................................................................................................... ix Introduction 1.1 1.2 1.3 1.4 1.5 1.6 About the processor ................................................................................................. 1-2 Features ................................................................................................................... 1-3 Interfaces ................................................................................................................. 1-4 Configurable options ................................................................................................ 1-5 Product documentation ............................................................................................ 1-6 Product revisions ..................................................................................................... 1-9 Functional Description 2.1 2.2 About the functions .................................................................................................. 2-2 Interfaces ................................................................................................................. 2-5 Programmers Model 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 About the programmers model ................................................................................ 3-2 Modes of operation and execution ........................................................................... 3-3 Instruction set summary ........................................................................................... 3-4 System address map ............................................................................................. 3-14 Write buffer ............................................................................................................ 3-17 Exclusive monitor ................................................................................................... 3-18 Bit-banding ............................................................................................................. 3-19 Processor core register summary .......................................................................... 3-21 Exceptions ............................................................................................................. 3-23 ARM DDI 0439D ID061113 Copyright © 2009, 2010, 2013 ARM Limited. All rights reserved. Non-Confidential iii Chapter 4 Chapter 5 Chapter 6 Chapter 7 Chapter 8 Chapter 9 Chapter 10 Chapter 11 Contents System Control 4.1 4.2 4.3 About system control ............................................................................................... 4-2 Register summary .................................................................................................... 4-3 Register descriptions ............................................................................................... 4-5 Memory Protection Unit 5.1 5.2 5.3 About the MPU ........................................................................................................ 5-2 MPU functional description ...................................................................................... 5-3 MPU programmers model ........................................................................................ 5-4 Nested Vectored Interrupt Controller 6.1 6.2 6.3 About the NVIC ........................................................................................................ 6-2 NVIC functional description ..................................................................................... 6-3 NVIC programmers model ....................................................................................... 6-4 Floating Point Unit 7.1 7.2 7.3 About the FPU ......................................................................................................... 7-2 FPU Functional Description ..................................................................................... 7-3 FPU Programmers Model ........................................................................................ 7-9 Debug 8.1 8.2 8.3 About debug ............................................................................................................ 8-2 About the AHB-AP ................................................................................................... 8-6 About the Flash Patch and Breakpoint Unit (FPB) .................................................. 8-9 Data Watchpoint and Trace Unit 9.1 9.2 9.3 About the DWT ........................................................................................................ 9-2 DWT functional description ...................................................................................... 9-3 DWT Programmers Model ....................................................................................... 9-4 Instrumentation Trace Macrocell Unit 10.1 10.2 10.3 About the ITM ........................................................................................................ 10-2 ITM functional description ...................................................................................... 10-3 ITM programmers model ....................................................................................... 10-4 Trace Port Interface Unit 11.1 11.2 11.3 About the Cortex-M4 TPIU .................................................................................... 11-2 TPIU functional description .................................................................................... 11-3 TPIU programmers model ..................................................................................... 11-5 Appendix A Revisions ARM DDI 0439D ID061113 Copyright © 2009, 2010, 2013 ARM Limited. All rights reserved. Non-Confidential iv Preface This preface introduces the Cortex-M4 Technical Reference Manual (TRM). It contains the following sections: • • About this book on page vi. Feedback on page ix. ARM DDI 0439D ID061113 Copyright © 2009, 2010, 2013 ARM Limited. All rights reserved. Non-Confidential v
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zzqlord
是英文原版,内容不错,赞!
2020-02-07 11:30:24
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