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S5PV210三星原厂开发板使用说明

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标签: S5PV210

S5PV210

三星

三星

开发板

开发板

使用说明

使用说明

S5PV210三星原厂开发板使用说明

SMDK-V210_USER’S MANUAL_REV 0.0
Preliminary
User’s Manual
(SMDK S5PV210 Rev0.0)
Development Kit
for S5PV210
Dec 02, 2009
REV 0.0
SMDK-V210_USER’S MANUAL_REV 0.0
Important Notice
The information in this publication has been
carefully checked and is believed to be
entirely accurate at the time of publication.
Samsung assumes no responsibility,
however, for possible errors or omissions, or
for any consequences resulting from the use
of the information contained herein.
Samsung reserves the right to make
changes in its products or product
specifications with the intent to improve
function or design at any time and without
notice and is not required to update this
documentation to reflect such changes.
This publication does not convey to a
purchaser of semiconductor devices
described herein any license under the
patent rights of Samsung or others.
Samsung makes no warranty,
representation, or guarantee regarding the
suitability of its products for any particular
purpose, nor does Samsung assume any
liability arising out of the application or use
of any product or circuit and specifically
disclaims any and all liability, including
without limitation any consequential or
incidental damages.
S5PV210 RISC Microprocessor
SMDK S5PV210 User’s manual, Revision 0.0
Copyright
©
2008 Samsung Electronics Co.,Ltd.
All rights reserved. No part of this publication may be reproduced, stored in a retrieval system, or
transmitted in any form or by any means, electric or mechanical, by photocopying, recording, or
otherwise, without the prior written consent of Samsung Electronics Co.,Ltd.
Samsung Electronics Co., Ltd.
San #24 Nongseo-Dong, Giheung-Gu
Yongin-City Gyeonggi-Do, Korea
446-711
"Typical" parameters can and do vary in
different applications. All operating
parameters, including "Typicals" must be
validated for each customer application by
the customer's technical experts.
Samsung products are not designed,
intended, or authorized for use as
components in systems intended for surgical
implant into the body, for other applications
intended to support or sustain life, or for any
other application in which the failure of the
Samsung product could create a situation
where personal injury or death may occur.
Should the Buyer purchase or use a
Samsung product for any such unintended
or unauthorized application, the Buyer shall
indemnify and hold Samsung and its officers,
employees, subsidiaries, affiliates, and
distributors harmless against all claims,
costs, damages, expenses, and reasonable
attorney fees arising out of, either directly or
indirectly, any claim of personal injury or
death that may be associated with such
unintended or unauthorized use, even if
such claim alleges that Samsung was
negligent regarding the design or
manufacture of said product
Home Page:
http://www.samsungsemi.com/
E-Mail:
mobilesol.cs@samsung.com
Printed in the Republic of Korea
SMDK-V210_USER’S MANUAL_REV 0.0
Revision History
Rev.
No
0.00
Description of Change
- Initial Release (SMDK S5PV210
Rev0.00)
Refer to
Author(s)
AP
development
Effective Date
(MM/DD/YY)
Dec, 02, 2009
SMDK-V210_USER’S MANUAL_REV 0.0
Table of Contents
1
2
INTRODUCTION ............................................................................................6
1.1
SYSTEM OVERVIEW......................................................................................................... 6
1.2
SMDK S5PV210 FEATURES.............................................................................................. 8
SMDK S5PV210 REAL VIEW ...............................................................................9
2.1
SMDK S5PV210 CPU BOARD REAL VIEW..................................................................... 9
2.2
SMDK S5PV210 BASE BOARD REAL VIEW .................................................................11
2.3
SMDK S5PV210 LCD BOARD REAL VIEW ...................................................................13
CIRCUIT DESCRIPTION .................................................................................. 13
3.1
POWER DISTRIBUTION TREE ........................................................................................13
3.2
FUNCTIONAL BLOCK DIAGRAM..................................................................................16
SMDK S5PV210 SYSTEM CONFIGURATIONS........................................................... 17
4.1
PLL CLOCK SOURCE SELECTION.................................................................................20
4.2
BOOT MODE SELECTION ...............................................................................................20
4.2.1
Switch Configuration..................................................................................................20
4.3
CONFIGURATION SWITCH DESCRIPTION IN CPU BOARD .....................................21
4.3.1
CFG3: SELECTION FOR CS#4,#5 ...........................................................................21
4.3.2
J2: SELECTION for Interrupt of Ext. OneNAND .....................................................21
CFG2: Configuration of MMC slot 0 ..........................................................................22
4.3.3
4.3.4
CFG1: TSI I/F..............................................................................................................22
4.3.5
J3: PSHOLD selection .................................................................................................22
JP1: JIG ON selection..................................................................................................22
4.3.6
4.4
CONFIGURATION SWITCH DESCRIPTION IN BASE BOARD...................................24
4.4.1
CFGB1: SROM BANK0 CHIP SELECTOR ..............................................................24
4.4.2
CFGB2: SROM BANK1 CHIP SELECTOR ..............................................................24
4.4.3
CFGB3: SROM BANK2 CHIP SELECTOR ..............................................................24
4.4.4
CFGB4: SROM BANK3 CHIP SELECTOR ..............................................................24
4.4.5
CFGB5: SROM BANK4 CHIP SELECTOR ..............................................................25
4.4.6
CFGB6: SROM BANK5 CHIP SELECTOR ..............................................................25
4.4.7
CF,MODEM,CAM_B,KEY,MHL,SROM ADDR SWITCHING...............................25
4.4.8
CFGB10: Audio Port ...................................................................................................26
4.4.9
CFGB11: Audio Codec(WM8580) Master clock selection .........................................26
4.4.10
CFGB12: Audio Device Input/Output Connection.....................................................27
4.4.11
CFGB13: UART/IrDA Connection .............................................................................27
4.5
LED & SWITCH Description ..............................................................................................27
4.5.1
LED description...........................................................................................................27
4.5.2
Switch description .......................................................................................................28
SMDK Daughter Board .................................................................................. 29
5.1
External OneNAND .............................................................................................................29
5.1.1
Real view .....................................................................................................................29
5.1.2
Schematic.....................................................................................................................29
5.2
CSI Daughter Board.............................................................................................................29
5.2.1
Real view .....................................................................................................................29
5.2.2
Schematic.....................................................................................................................30
5.3
DSI Daughter Board.............................................................................................................30
5.3.1
Real view .....................................................................................................................31
5.3.2
Schematic.....................................................................................................................31
SMDK SCHEMATIC REVISION HISTORY ................................................................ 32
SMDK SCHEMATIC ....................................................................................... 32
3
4
5
6
7
SMDK-V210_USER’S MANUAL_REV 0.0
Figure List
Figure 1 S5PV210 Functional Block Diagram ...............................................................7
Figure 2 S5PV210 CPU BOARD TOP VIEW ...................................................................9
Figure 3 S5PV210 CPU BOARD BOTTOM VIEW ............................................................ 10
Figure 5 S5PV210 BASE BOARD BOTTOM VIEW ........................................................... 12
Figure 6 S5PV210 LCD BOARD TOP VIEW.................................................................. 13
Figure 7 S5PV210 BASE BOARD POWER DISTRIBUTION TREE ........................................... 14
Figure 8 S5PV210 CPU BOARD POWER DISTRIBUTION TREE ............................................ 15
Figure 9 S5PV210 SMDK FUNCTIONAL BLOCK DIAGRAM................................................. 16
Figure 10 External OneNAND ............................................................................... 29
Figure 11 CSI Daughter Board .............................................................................. 30
Figure 12 DSI Daughter Board .............................................................................. 31
Figure 13 Camera module......................................
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