ML505/ML506/ML507
ML505/ML506/M
Evaluation Platform
L507 Evaluation
Platform
User Guide [optional]
UG347 (v3.1.1) October 7, 2009 [optional]
R
R
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the right, at its sole discretion, to change the Documentation without notice at any time. Xilinx assumes no obligation to correct any errors
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Revision History
The following table shows the revision history for this document.
Date
11/29/06
12/01/06
Version
1.0
1.1
Initial Xilinx release.
Added
“44. Soft Touch Landing Pad,” page 48
Corrected
Table 1-6, page 21
Added
Table 1-13, page 26
Added new paragraph to
“36. VGA Input Video Codec,” page 37
01/09/06
1.2
Enhanced
Table 1-3, page 19
Corrected
Table 1-31, page 47
Updated document to include ML506 board
Corrected
Table 1-31, page 47
02/16/07
2.0
Enhanced
Figure 1-5, page 34
Expanded
“26. AC Adapter and Input Power Switch/Jack,” page 34
Added
Figure B-1, page 57
Updated
“Features,” page 11
03/21/07
2.1
Swapped
Table 1-3, page 19
with
Table 1-24, page 42
for better placement of information
Updated description for
Table 1-25, page 43
Updated
Table 1-31, page 47
(see table notes)
04/17/07
06/28/07
10/30/07
2.2
2.3
2.4
Corrected GTP/GTX tile location in
Table 1-24, page 42
Corrected J5 pin 28 in
Table 1-11, page 25
Updated
Table 1-31, page 47
for XAUI/SRIO support
Update
Appendix C, “References”Table 1-11, page 25
Added sections on
“MIG Compliance,” page 18
and
“45. System Monitor,” page 49
Revision
ML505/ML506/ML507 Evaluation Platform
www.xilinx.com
UG347 (v3.1.1) October 7, 2009
Date
05/19/08
Version
3.0
Revision
Updated document to include ML507 board.
Added notes for
Figure 1-7, page 39
and
Table 1-21, page 39.
Updated
Appendix C, “References.”
Updated link in
Appendix C, “References.”
Updated
Appendix A, “Board Revisions.”
Added content to
“17. System ACE and CompactFlash Connector,” page 28
and
“Configuration Options,” page 53.
Updated Platform Flash memory to Platform Flash
PROM throughout.
Minor typographical edit.
07/21/08
3.0.1
11/10/08
10/07/09
3.1
3.1.1
UG347 (v3.1.1) October 7, 2009
www.xilinx.com
ML505/ML506/ML507 Evaluation Platform
ML505/ML506/ML507 Evaluation Platform
www.xilinx.com
UG347 (v3.1.1) October 7, 2009
Table of Contents
Preface: About This Guide
Guide Contents
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Additional Documentation
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Additional Support Resources
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Typographical Conventions
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7
7
8
8
Online Document . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Additional Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11
13
13
14
Overview
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Related Xilinx Documents
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Detailed Description
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
1. Virtex-5 FPGA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Configuration
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I/O Voltage Rails
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Digitally Controlled Impedance
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2. DDR2 SODIMM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
MIG Compliance
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DDR2 Memory Expansion
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DDR2 Clock Signal
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DDR2 Signaling
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3. Differential Clock Input and Output with SMA Connectors . . . . . . . . . . . . . . . . . .
4. Oscillators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5. LCD Brightness and Contrast Adjustment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6. GPIO DIP Switches (Active-High). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7. User and Error LEDs (Active-High) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
8. User Pushbuttons (Active-High) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
9. CPU Reset Button (Active-Low) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10. XGI Expansion Headers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Differential Expansion I/O Connectors
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Single-Ended Expansion I/O Connectors
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Other Expansion I/O Connectors
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
11. Stereo AC97 Audio Codec . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
12. RS-232 Serial Port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
13. 16-Character x 2-Line LCD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
14. IIC Bus with 8-Kb EEPROM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
15. DVI Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
16. PS/2 Mouse and Keyboard Ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
17. System ACE and CompactFlash Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
18. ZBT Synchronous SRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
19. Linear Flash Chips . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
20. Xilinx XC95144XL CPLD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
21. 10/100/1000 Tri-Speed Ethernet PHY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
22. USB Controller with Host and Peripheral Ports . . . . . . . . . . . . . . . . . . . . . . . . . . . .
23. Xilinx XCF32P Platform Flash PROM Configuration Storage Devices . . . . . . . . .
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ML505/ML506/ML507 Evaluation Platform
UG347 (v3.1.1) October 7, 2009
www.xilinx.com
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