Series 5000 Chip Data Book
®
005-0199-01A
Echelon, L
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, L
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ARK
, LonTalk, Neuron, 3120, 3150,
LNS, ShortStack, LonMaker, and the Echelon logo are
trademarks of Echelon Corporation registered in the United
States and other countries. 3170 and FTXL are trademarks of
Echelon Corporation.
Other brand and product names are trademarks or
registered trademarks of their respective holders.
Smart Transceivers, Neuron Chips, and other OEM Products
were not designed for use in equipment or systems which
involve danger to human health or safety or a risk of
property damage and Echelon assumes no responsibility or
liability for use of the Smart Transceivers or Neuron Chips in
such applications.
Parts manufactured by vendors other than Echelon and
referenced in this document have been described for
illustrative purposes only, and may not have been tested
by Echelon. It is the responsibility of the customer to
determine the suitability of these parts for each
application.
ECHELON MAKES AND YOU RECEIVE NO WARRANTIES OR
CONDITIONS, EXPRESS, IMPLIED, STATUTORY OR IN ANY
COMMUNICATION WITH YOU, AND ECHELON SPECIFICALLY
DISCLAIMS ANY IMPLIED WARRANTY OF MERCHANTABILITY
OR FITNESS FOR A PARTICULAR PURPOSE.
Except as expressly permitted herein, no part of this
publication may be reproduced, stored in a retrieval system,
or transmitted, in any form or by any means, electronic,
mechanical, photocopying, recording, or otherwise, without
the prior written permission of Echelon Corporation.
Printed in the United States of America.
Copyright © 1996, 2009 Echelon Corporation.
Echelon Corporation
www.echelon.com
ii
Welcome
Echelon’s FT 5000 Free Topology Smart Transceiver is the successor to Echelon’s FT 3120
®
Smart Transceiver and FT 3150
®
Smart Transceiver. Likewise, Echelon’s Neuron
®
5000
Processor is the successor to the Neuron 3120 Chip and Neuron 3150 Chip.
Combined with the Echelon high-performance FT-X3 Communications Transformer, the FT
5000 Smart Transceiver sets new benchmarks for performance, robustness, and low cost.
Ideal for use in L
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®
devices designed for building, industrial, transportation, home,
and utility automation applications, FT 5000 Smart Transceivers can be used in both new
product designs and as a means of cost reducing existing devices.
The FT 5000 Smart Transceivers includes a network transceiver that is fully compatible with
the TP/FT-10 channel. The free topology transceiver supports polarity insensitive cabling
using a star, bus, daisy chain, loop, or combined topologies. This flexibility frees the installer
from the need to adhere to a strict set of wiring rules. Free topology wiring reduces the time
and expense of device installation by allowing the wiring to be installed in the most
expeditious and cost-effective manner. It also simplifies network expansion by eliminating
restrictions on wire routing, splicing, and device placement.
The Neuron 5000 Processor has the same performance, robustness, and low cost as the FT
5000 Smart Transceiver, but you can use it with a number of different types of network
transceivers so that you can integrate different channel types (such as the TP/XF-1250
channel) into a L
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network.
Together, the FT 5000 Smart Transceiver and the Neuron 5000 Processor are part of a
family of products, collectively known as Series 5000 chips.
This document provides detailed technical specifications for the electrical interfaces,
mechanical interfaces, and operating environment characteristics for the FT 5000 Smart
Transceiver and Neuron 5000 Processor. In some cases, example vendor sources are
included to simplify the task of integrating a Series 5000 chip with application electronics.
You can find contact information for the vendor sources listed in Appendix Error! Reference
source not found.,
Vendor Contact Information
, on page 153.
This manual does not describe Echelon’s Power Line Smart Transceivers. For more
information about that technology, see the
PL 3120 / PL 3150 / PL 3170 Power Line Smart
Transceiver Data Book
(005-0193-01A).
Audience
This manual provides specifications and user instructions for engineers who develop
applications and devices that use FT 5000 Smart Transceivers or Neuron 5000 Processors,
and for users of network interfaces based on the FT Smart Transceivers or Neuron Chips.
What’s New for Echelon’s Smart Transceivers and
Neuron Chips
Echelon’s FT 5000 Smart Transceiver and Neuron 5000 Processor include many new features
and functions compared with Echelon’s FT 3120 Smart Transceiver, Neuron 3120 Chip, FT
3150 Smart Transceiver, and Neuron 3150 Chip. This section describes some of the major
new features and functions of the Series 5000 chips.
Series 5000 Chip Data Book
iii
3.3 V Operation
Series 5000 chips operate with a 3.3 V power supply.
Series 3100 chips require a 5 V power supply.
New Memory Architecture
Series 5000 chips have a new memory architecture, for both the external memory interface
and the internal on-chip memory. The external memory interface for external non-volatile
memory is a serial interface using either the SPI or I
2
C protocol. The internal on-chip
memory includes 64 KB of RAM, of which 44 KB is user-accessible. Series 5000 chips have
no on-chip ROM or flash memory. Instead, they rely on external non-volatile memory for
user application code and data. The default system firmware image is contained in on-chip
ROM, but newer images can be contained in the external non-volatile memory, which allows
the system firmware to be upgraded as necessary.
FT 3120 Smart Transceivers and Neuron 3120 chips have no external non-volatile memory,
but instead have up to 8 KB of on-chip flash memory. FT 3150 Smart Transceivers and
Neuron 3150 Chips use a parallel external memory interface for external non-volatile
memory. Series 3100 chips include 2 to 4 KB of RAM and 16 KB of ROM. User application
code and data is loaded into the internal flash for 3120 devices and into external non-volatile
memory for 3150 devices. The system firmware is contained in on-chip ROM for Series 3100
chips.
Performance Enhancements
Series 5000 chips support an internal system clock speed of up to 80 MHz. The internal
system clock speed is user-adjustable from 5 MHz to 80 MHz, based on the device’s hardware
template maintained by the NodeBuilder FX Development Tool or Mini FX Evaluation Kit.
The external crystal frequency for all Series 5000 devices is 10 MHz.
Series 3100 chips support an internal system clock speed that is one-half of the frequency of
the external crystal or oscillator. For example, an FT 3120-E4P40 Smart Transceiver has an
internal system clock speed of 20 MHz based on an external input clock rate of 40 MHz. The
internal system clock speed is not user-adjustable.
Interrupt Support
Series 5000 chips support hardware user interrupts in addition to the support provided
through I/O models. The Neuron C language includes new keywords to manage hardware
user interrupts for application programs.
Series 3100 chips do not support hardware user interrupts. However, for the Series 3100
power line chips, certain I/O models include interrupt support.
Hardware Multiply and Divide
Series 5000 chips support new Neuron assembly language instructions for multiplication and
division. These instructions use hardware multiply and divide functions to provide improved
performance for 8-bit multiplication and division. The older software multiplication and
division system functions are still supported.
Series 3100 chips have no hardware multiply and divide functions, and rely on system
software multiplication and division system functions.
Support for 254 Network Variables
Series 5000 chips use system firmware version 18, which supports up to 254 network
variables for Neuron hosted devices (that is, devices without a host microprocessor).
iv
Series 3100 chips with system firmware version 15 or earlier support up to 62 network
variables for Neuron hosted devices. Series 3100 chips with system firmware version 16 or
later support up to 254 network variables. You must use the NodeBuilder FX Development
Tool to take advantage of 254 network variables.
Smaller Package
Series 5000 chips are packaged as a 7 mm by 7 mm 48-pin quad flat no leads (QFN) chip.
Series 3100 chips come in several package types, including 32-pin small-outline integrated
circuit (SOIC), 44-pin thin quad flat package (TQFP), and 64-pin plastic quad flat package
(PQFP).
Additional I/O Model Support
Series 5000 chips include improved hardware support for the Serial Peripheral Interface
(SPI) and Serial Communication Interface (SCI) serial I/O models, which provides increased
performance for devices that use these interfaces. Series 5000 chips also support all of the
I/O models previously supported only by PL 3120 Smart Transceivers and PL 3150 Smart
Transceivers, including the Infrared Pattern model, Magcard Bitstream model, SCI (UART)
model, and SPI model. In addition, Series 5000 devices support a new I/O model, the
Stretched Triac model, which improves usability and performance for triac devices.
Series 3100 free topology chips do not include hardware support for the SPI and SCI (UART)
serial I/O models, although Series 3100 power line do provide hardware support for these I/O
models.
Related Documentation
Table 1 lists related Echelon documentation that can be useful when designing or using
Series 5000 chips with L
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devices and L
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networks. The table includes
documentation for the NodeBuilder FX Development Tool and the Mini FX Evaluation Kit,
the primary development tools for L
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devices. It also lists related products, such as
the FTXL™ transceiver and ShortStack
®
Micro Server, which are both host-based
L
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devices. All of these manuals are available from the Echelon Web site
(www.echelon.com).
Table 1. Related Documentation
Title
FT 5000 EVB Hardware Guide
Part Number
078-0390-01A
Description
This manual describes the hardware
for the FT 5000 EVB evaluation
boards that are included with the
NodeBuilder FX/FT Development
Tool and the Mini FX/FT Evaluation
Kit.
Series 5000 Chip Data Book
v
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