Kung 关于脉动阵列的设计
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66 IEEE TRANSACTIONS ON COMPUTERS VOL c34 NO 1 JANUARY 1985 The Design of Optimal Systolic Arrays GUOJIE LI STUDENT MEMBER IEEE AND BENJAMIN W WAH MEMBER IEEE Abstract Conventional design of systolic arrays is based on the mapping of an algorithm onto an interconnection of processing elements in a VLSI chip This mapping is done in an ad hoc manner and the resulting configilation usually represents a feasible but suboptimal design In this paper systolic arrays are characterized by three classes ......
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