The SRL16E was introduced in the Virtex® FPGA architecture and is included in allvariants of the Spartan®-3 family. It is an alternate operating mode of a Look-Up Tablein which it becomes a 16-bit shift register as shown in Figure 1. The added capabilitythis configuration provides can lead to dramatic improvements in performance andcost savings to your design. However, the operation of this mode is not obvious, andan understanding of the underlying structure of an SRL16E is necessary to maximizethe benefits available from this configuration. The information and examplesin this White Paper will help you gain this understanding.
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