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【ST】STM32F4:ARM Cortex-M4高性能MCU

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  • 日期: 2018-06-13
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标签: STM32F4

STM32F4是由ST(意法半导体)开发的一种高性能微控制器。其采用了90 纳米的NVM 工艺和ART(自适应实时存储器加速器,Adaptive Real-Time MemoryAccelerator™)。

智能电表

智能电表是智能电网的智能终端,它已经不是传统意义上的电能表,智能电表除了具备传统电能表基本用电量的计量功能以外,为了适应智能电网和新能源的使用它还具有双向多种费率计量功能、用户端控制功能、多种数据传输模式的双向数据通信功能、防窃电功能等智能化的功能,智能电表代表着未来节能型智能电网最终用户智能化终端的发展方向。

ST

ST,也即意法半导体,是全球最大的半导体公司之一 , 以业内最广泛的产品组合著称,凭借多元化的技术、尖端的设计能力、知识产权组合、合作伙伴战略和高效的制造能力,意法半导体通过提供创新型半导体解决方案为不同电子应用领域的客户提供服务。

STM32F4:ARM  Cortex-M4高性能MCU

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STM32F401xB STM32F401xC ARM CortexM4 32b MCUFPU 105 DMIPS 256KB Flash64KB RAM 10 TIMs 1 ADC 11 comm interfaces Datasheet production data Features Core ARM 32bit CortexM4 CPU with FPU Adaptive realtime accelerator ART Accelerator allowing 0wait state execution from Flash memory frequency up to 84 MHz memory protection unit 105 DMIPS 125 DMIPSMHz Dhrystone 21 and DSP instructions Memories Up to 256 Kbytes of Flash memory Up to 64 Kbytes of SRAM Clock reset and supply management 17 V P......

STM32F401xB STM32F401xC ARM Cortex-M4 32b MCU+FPU, 105 DMIPS, 256KB Flash/64KB RAM, 10 TIMs, 1 ADC, 11 comm. interfaces Datasheet - production data Features • Core: ARM® 32-bit Cortex™-M4 CPU with FPU, Adaptive real-time accelerator (ART Accelerator™) allowing 0-wait state execution from Flash memory, frequency up to 84 MHz, memory protection unit, 105 DMIPS/ 1.25 DMIPS/MHz (Dhrystone 2.1), and DSP instructions • Memories – Up to 256 Kbytes of Flash memory – Up to 64 Kbytes of SRAM • Clock, reset and supply management – 1.7 V (PDR OFF) or 1.8 V (PDR ON) to 3.6 V application supply and I/Os – POR, PDR, PVD and BOR – 4-to-26 MHz crystal oscillator – Internal 16 MHz factory-trimmed RC – 32 kHz oscillator for RTC with calibration – Internal 32 kHz RC with calibration • Power consumption – Run: 137 µA/MHz (peripheral off) – Stop (Flash in Stop mode, fast wakeup time): 42 µA typ @ 25 °C; 65 µA max @25 °C – Stop (Flash in Deep power down mode, slow wakeup time): down to 10 µA typ@ 25 °C; 28 µA max @25 °C – Standby: 2.4 µA @25 °C / 1.7 V without RTC; 12 µA @85 °C @1.7 V – VBAT supply for RTC: 1 µA @25 °C • 1×12-bit, 2.4 MSPS A/D converter: up to 16 channels • General-purpose DMA: 16-stream DMA controllers with FIFOs and burst support • Up to 10 timers: up to six 16-bit, two 32-bit timers up to 84 MHz, each with up to 4 IC/OC/PWM or pulse counter and quadrature (incremental) encoder input, two watchdog timers (independent and window) WLCSP49 (3 x 3 mm) UFQFPN48 (7 × 7 mm) FBGA LQFP100 (14 × 14 mm) LQFP64 (10 × 10 mm) UFBGA100 (7 x 7 mm) • Debug mode – Serial wire debug (SWD) & JTAG interfaces – Cortex-M4 Embedded Trace Macrocell™ • Up to 81 I/O ports with interrupt capability – All IO ports 5 V tolerant – Up to 78 fast I/Os up to 42 MHz • Up to 11 communication interfaces – Up to 3 × I2C interfaces (1Mbit/s, SMBus/PMBus) – Up to 3 USARTs (2 x 10.5 Mbit/s, 1 x 5.25 Mbit/s), ISO 7816 interface, LIN, IrDA, modem control) – Up to 4 SPIs (up to 42 Mbits/s at fCPU MHz), SPI2 and SPI3 with muxed full- duplex I2S to achieve audio class accuracy via internal audio PLL or external clock = 84 – SDIO interface • Advanced connectivity – USB 2.0 full-speed device/host/OTG controller with on-chip PHY • CRC calculation unit • 96-bit unique ID • RTC: subsecond accuracy, hardware calendar Table 1. Device summary Reference STM32F401xB STM32F401CB, STM32F401RB, STM32F401VB STM32F401xC STM32F401CC, STM32F401RC, STM32F401VC Part number September 2013 This is information on a product in full production. DocID024738 Rev 2 1/130 www.st.com Contents Contents STM32F401xB STM32F401xC 1 2 3 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Compatibility with STM32F4 family . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2.1 Functional overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 ARM® Cortex™-M4 with FPU core with embedded Flash and SRAM . . . 15 3.1 Adaptive real-time memory accelerator (ART Accelerator™) . . . . . . . . . 15 3.2 3.3 Memory protection unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Embedded Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 3.4 3.5 CRC (cyclic redundancy check) calculation unit . . . . . . . . . . . . . . . . . . . 16 Embedded SRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 3.6 Multi-AHB bus matrix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3.7 3.8 DMA controller (DMA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3.9 Nested vectored interrupt controller (NVIC) . . . . . . . . . . . . . . . . . . . . . . . 18 3.10 External interrupt/event controller (EXTI) . . . . . . . . . . . . . . . . . . . . . . . . . 18 3.11 Clocks and startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3.12 Boot modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 3.13 Power supply schemes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 3.14 Power supply supervisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Internal power supply supervisor enabled . . . . . . . . . . . . . . . . . . . . . . . 19 Internal power supply supervisor disabled . . . . . . . . . . . . . . . . . . . . . . . 20 Voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Regulator ON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Regulator OFF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Regulator ON/OFF and internal power supply supervisor availability . . 24 3.15 Real-time clock (RTC) and backup registers . . . . . . . . . . . . . . . . . . . . . . 25 3.16 Low-power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 3.17 VBAT operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 3.18 Timers and watchdogs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 3.18.1 Advanced-control timers (TIM1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 3.18.2 General-purpose timers (TIMx) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 3.14.1 3.14.2 3.14.3 3.14.4 3.14.5 3.14.6 2/130 DocID024738 Rev 2 STM32F401xB STM32F401xC Contents 4 5 6 3.18.3 Independent watchdog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 3.18.4 Window watchdog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 3.18.5 SysTick timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 3.19 Inter-integrated circuit interface (I²C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 3.20 Universal synchronous/asynchronous receiver transmitters (USART) . . 29 3.21 Serial peripheral interface (SPI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Inter-integrated sound (I2S) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 3.22 3.23 Audio PLL (PLLI2S) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 3.24 Secure digital input/output interface (SDIO) . . . . . . . . . . . . . . . . . . . . . . . 31 3.25 Universal serial bus on-the-go full-speed (OTG_FS) . . . . . . . . . . . . . . . . 31 3.26 General-purpose input/outputs (GPIOs) . . . . . . . . . . . . . . . . . . . . . . . . . . 31 3.27 Analog-to-digital converter (ADC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 3.28 Temperature sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 3.29 Serial wire JTAG debug port (SWJ-DP) . . . . . . . . . . . . . . . . . . . . . . . . . . 32 3.30 Embedded Trace Macrocell™ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Pinouts and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Memory mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 6.1 Parameter conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 Minimum and maximum values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 6.1.1 Typical values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 6.1.2 6.1.3 Typical curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 Loading capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 6.1.4 Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 6.1.5 6.1.6 Power supply scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 6.1.7 Current consumption measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 6.3.1 VCAP1/VCAP2 external capacitors . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 6.3.2 6.3.3 Operating conditions at power-up / power-down (regulator ON) . . . . . . 62 Operating conditions at power-up / power-down (regulator OFF) . . . . . 63 6.3.4 6.3.5 Embedded reset and power control block characteristics . . . . . . . . . . . 63 6.2 6.3 DocID024738 Rev 2 3/130 4 Contents STM32F401xB STM32F401xC 6.3.6 Supply current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 6.3.7 Wakeup time from low-power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 6.3.8 External clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 6.3.9 Internal clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 6.3.10 PLL characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81 6.3.11 PLL spread spectrum clock generation (SSCG) characteristics . . . . . . 83 6.3.12 Memory characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84 EMC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86 6.3.13 6.3.14 Absolute maximum ratings (electrical sensitivity) . . . . . . . . . . . . . . . . . 88 I/O current injection characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89 6.3.15 I/O port characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90 6.3.16 6.3.17 NRST pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94 TIM timer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95 6.3.18 Communications interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 6.3.19 6.3.20 12-bit ADC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104 Temperature sensor characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 110 6.3.21 VBAT monitoring characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110 6.3.22 6.3.23 Embedded reference voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110 SD/SDIO MMC card host interface (SDIO) characteristics . . . . . . . . . 111 6.3.24 6.3.25 RTC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112 7 8 9 Package characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113 7.1 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .113 WLCSP49, 7 x 7 mm, 0.4 mm pitch wafer level chip size package . . . 114 7.1.1 UFQFPN48, 7 x 7 mm, 0.5 mm pitch package . . . . . . . . . . . . . . . . . . 116 7.1.2 7.1.3 LQFP64, 10 x 10 mm, 64-pin low-profile quad flat package . . . . . . . . 119 LQFP100, 14 x 14 mm, 100-pin low-profile quad flat package . . . . . . 122 7.1.4 7.1.5 UFBGA100, 7 x 7 mm, 0.5 mm pitch package . . . . . . . . . . . . . . . . . . 125 Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127 Reference document . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127 7.2.1 7.2 Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129 4/130 DocID024738 Rev 2 STM32F401xB STM32F401xC List of tables List of tables Table 22. Table 21. Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Table 2. STM32F401xB/STM32F401xC features and peripheral counts . . . . . . . . . . . . . . . . . . . . . 11 Table 3. Regulator ON/OFF and internal power supply supervisor availability. . . . . . . . . . . . . . . . . 24 Table 4. Timer feature comparison. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Table 5. Comparison of I2C analog and digital filters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Table 6. USART feature comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Table 7. Legend/abbreviations used in the pinout table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 Table 8. STM32F401xB/STM32F401xC pin definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 Table 9. Alternate function mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 Table 10. STM32F401xB/STM32F401xC register boundary addresses . . . . . . . . . . . . . . . . . . . . . . 52 Table 11. Voltage characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 Table 12. Current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 Table 13. Thermal characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 Table 14. General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 Features depending on the operating power supply range . . . . . . . . . . . . . . . . . . . . . . . . 61 Table 15. Table 16. VCAP1/VCAP2 operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 Table 17. Operating conditions at power-up / power-down (regulator ON) . . . . . . . . . . . . . . . . . . . . 62 Table 18. Operating conditions at power-up / power-down (regulator OFF). . . . . . . . . . . . . . . . . . . . 63 Embedded reset and power control block characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 63 Table 19. Typical and maximum current consumption, code with data processing (ART Table 20. accelerator disabled) running from SRAM - VDD =1.8V . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 Typical and maximum current consumption, code with data processing (ART accelerator disabled) running from SRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 Typical and maximum current consumption in run mode, code with data processing (ART accelerator enabled except prefetch) - VDD @ 1.8V . . . . . . . . . . . . . . . . . . . . . . . . 66 Typical and maximum current consumption in run mode, code with data processing running from flash memory (ART accelerator enabled except prefetch) . . . . . . . . . . . . . . 67 Typical and maximum current consumption in run mode, code with data processing running from flash memory (ART accelerator disabled) . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 Typical and maximum current consumption in run mode, code with data processing (ART accelerator enabled with prefetch) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 Table 26. Typical and maximum current consumption in Sleep mode . . . . . . . . . . . . . . . . . . . . . . . . 68 Table 27. Typical and maximum current consumptions in Stop mode - VDD=1.8V . . . . . . . . . . . . . . 69 Table 28. Typical and maximum current consumption in Stop mode . . . . . . . . . . . . . . . . . . . . . . . . . 69 Table 29. Typical and maximum current consumption in Standby mode - VDD=1.8V . . . . . . . . . . . . 69 Table 30. Typical and maximum current consumption in Standby mode . . . . . . . . . . . . . . . . . . . . . . 70 Table 31. Typical and maximum current consumptions in VBAT mode. . . . . . . . . . . . . . . . . . . . . . . . 70 Table 32. Switching output I/O current consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72 Table 33. Peripheral current consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 Low-power mode wakeup timings(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74 Table 34. Table 35. High-speed external user clock characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 Table 36. Low-speed external user clock characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 Table 37. HSE 4-26 MHz oscillator characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77 Table 38. LSE oscillator characteristics (fLSE = 32.768 kHz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78 Table 39. HSI oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 Table 40. LSI oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 Table 41. Main PLL characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81 Table 42. PLLI2S (audio PLL) characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 Table 23. Table 24. Table 25. DocID024738 Rev 2 5/130 6
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