The DS90CR483A transmitter converts 48 bits of CMOS/TTLdata into eight LVDS (Low Voltage Differential Signaling) datastreams. A phase-locked transmit clock is transmitted in parallelwith the data streams over a ninth LVDS link. Every cycleof the transmit clock 48 bits of input data are sampled andtransmitted. The DS90CR484A receiver converts the LVDSdata streams back into 48 bits of CMOS/TTL data. At a transmitclock frequency of 112MHz, 48 bits of TTL data aretransmitted at a rate of 672Mbps per LVDS data channel. Usinga 112MHz clock, the data throughput is 5.38Gbit/s (672Mbytes/s).
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