Techwell
8-CH WD1 (960H)/D1 Compatible Video Decoders
and Audio Codecs
TW2968
Features
Video Decoder
•
WD1 (960H) and D1 compatible video decoding
operation and it is programmable each channel
•
NTSC (M, 4.43) and PAL (B, D, G, H, I, M, N, N
combination), PAL (60) support with automatic
format detection
•
Software selectable analog inputs allows any of 2
CVBS per one video ADC
Audio Codec
•
Integrated ten audio ADCs processing and one
audio DAC
•
Provides multi-channel audio mixed analog output
•
Support I2S/DSP Master/Slave interface for
record output and playback input
•
PCM 8/16-bit and u-Law/A-Law 8-bit for audio
word length
•
Programmable audio sample rate that covers
popular frequencies of 8/16/32/44.1/48kHz
•
Built-in analog anti-alias filter
•
Four 10-bit ADCs and analog clamping circuit for
CVBS input
•
Fully programmable static gain or automatic gain
control for the Y channel
•
Programmable white peak control for CVBS
channel
•
4-H adaptive comb filter Y/C separation
•
PAL delay line for color phase error correction
•
Image enhancement with peaking and CTI
•
Digital sub-carrier PLL for accurate color decoding
•
Digital Horizontal PLL for synchronization
processing and pixel sampling
•
Advanced synchronization processing and sync
detection for handling non-standard and weak
signal
•
Programmable hue, brightness, saturation,
contrast, sharpness
•
Automatic color control and color killer
•
ITU-R 656 like YCbCr (4:2:2) output or time
multiplexed output with 36/72/144MHz for WD1
or 27/54/108MHz for D1 format
Miscellaneous
•
Embedded PTZ Tx pulse generation
•
Two-wire MPU serial bus interface
•
Integrated clock PLL for 144/108MHz clock
output
•
Power save and Power down mode
•
Low power consumption
•
Single 27MHz crystal for all standards and both
WD1 and D1 format
•
3.3V tolerant I/O
•
1.0V/3.3V power supply
•
128-pin LQFP package (pin compatible with
TW2964 128-LQFP version)
1
FN7942.0.
Sep 21, 2012
1-888-INTERSIL or 1-888-468-3774
| Copyright Intersil Americas Inc. 2012. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
TW2968
VIN1
ADC
4H Comb
Video Decoder
4H Comb
Video Decoder
4H Comb
Video Decoder
4H Comb
Video Decoder
4H Comb
Video Decoder
4H Comb
Video Decoder
4H Comb
Video Decoder
4H Comb
Video Decoder
VD1[7:0]
VD2[7:0]
VD3[7:0]
VD4[7:0]
MPP1/PTZADD0
MPP2/PTZADD1
MPP3/PTZADD2
MPP4/PTZDAT
CLKPO
XTO
XTI
CLKNO
SCLK
SDAT
IRQ
VIN3
ADC
VIN4
ADC
VIN5
ADC
VIN7
ADC
VIN8
ADC
AIN1
ADC
4H Comb
Decimation Filter
Video Decoder
4H Comb
Decimation Filter
Video Decoder
4H Comb
Decimation Filter
Video Decoder
4H Comb
Decimation Filter
Video Decoder
4H Comb
Decimation Filter
Video Decoder
AIN2
ADC
AIN3
ADC
AIN4
AIN_AUX1
(AIN51)
ADC
ADC
AIN5
ADC
4H Comb
Decimation Filter
Video Decoder
4H Comb
Decimation Filter
Video Decoder
4H Comb
Decimation Filter
Video Decoder
4H Comb
Decimation Filter
Video Decoder
4H Comb
Decimation Filter
Video Decoder
I2S/DSP
Interface
AIN6
ADC
Host
Interface
Clock PLL
Clock
Generator
VIN6
ADC
MPP
COAXITRON
Interface
Mux
Interface
VIN2
ADC
AIN7
ADC
AIN8
AIN_AUX2
(AIN52)
ADC
ACLKR
ASYNR
ADATR
ADATM
ACLKP
ASYNP
ADATP
ALINKO
ALINKI
AOUT
DAC
Interpolation Filter
FIGURE 1. TW2968 VIDEO BLOCK DIAGRAM
2
Cascade
Interface
ADC
TW2968
Ordering Information
PART
NUMBER
TW2968-LA1-CR
(Note 1)
NOTE:
1.
These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding
compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS
compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J
STD-020.
PART
MARKING
TW2968 LA1-CR
PACKAGE
(Pb-free)
128 Lead LQFP (14mmx14mm)
PKG.
DWG. #
3
TW2968
Table of Contents
8-CH WD1 (960H)/D1 Compatible Video Decoders and
Audio Codecs...........................................................................1
Video Decoder .............................................................................1
Audio Codec ................................................................................1
Miscellaneous..............................................................................1
Ordering Information ..................................................................3
Table of Contents ........................................................................4
Video Decoder .............................................................................8
Video Decoder Overview .....................................................8
Analog Front End .....................................................................8
Sync Processor ........................................................................8
Y/C Separation.........................................................................8
Color Demodulation .................................................................8
Automatic Chroma Gain Control ..........................................9
Color Killer ............................................................................9
Automatic standard detection ..............................................9
Component Processing .........................................................10
Sharpness...........................................................................10
Color Transient Improvement ............................................10
Video Output Format .............................................................11
Total Pixel Per Horizontal Line...........................................11
Channel ID ..........................................................................11
Video Loss Output ..............................................................12
ITU-R BT.656 like Format ..................................................12
Two Channel ITU-R BT.656 Time-multiplexed Format with
54/72MHz ...........................................................................13
Four Channel 960H Time-division-multiplexed Format with
108/144MHz .......................................................................14
Output Enabling Act ...........................................................15
Video Output Channel Selection........................................15
Extra Sync Output ..............................................................15
Audio Codec...........................................................................18
Audio Clock Master/Slave mode .......................................20
Audio Detection ..................................................................20
Multi-Chip Operation ..........................................................21
Serial Audio Interface .........................................................25
Audio Clock Slave Mode Data Output Timing...................29
ACLKP/ASYNP Slave Mode Data Input Timing ...............31
Audio Clock Generation .....................................................33
Audio Clock Auto Setup .....................................................36
Two-wire Serial Bus Interface................................................36
Interrupt Interface ...................................................................39
Clock PLL ...............................................................................39
XTI Clock Input.......................................................................40
PTZ Tx pulse generation .......................................................41
Anti-alias filter
...................................................................42
Decimation filter ..................................................................42
Chroma Band Pass Filter Curves ......................................43
Luma Notch Filter Curve for NTSC and PAL ....................43
Chrominance Low-Pass Filter Curve.................................44
Peaking Filter Curves .........................................................45
Audio Decimation Filter Response ........................................46
Control Register .....................................................................47
PAGE MODE Register Map ..............................................47
PAGE0 Register Map.........................................................47
PAGE1 Register Map.........................................................53
PAGE2 Register Map.........................................................56
Register Descriptions .............................................................58
Page Access ..........................................................................58
0x40 – Page Mode Register ..............................................58
Page0 Registers ....................................................................58
0x00(VIN1)/0x10(VIN2)/0x20(VIN3)/0x30(VIN4) – Video
Status Register ...................................................................58
0x01(VIN1)/0x11(VIN2)/0x21(VIN3)/0x31(VIN4) –
BRIGHTNESS Control Register ........................................59
0x02(VIN1)/0x12(VIN2)/0x22(VIN3)/0x32(VIN4) –
CONTRAST Control Register ............................................59
0x03(VIN1)/0x13(VIN2)/0x23(VIN3)/0x33(VIN4) –
SHARPNESS Control Register ......................................... 59
0x04(VIN1)/0x14(VIN2)/0x24(VIN3)/0x34(VIN4) – Chroma
(U) Gain Register ............................................................... 59
0x05(VIN1)/0x15(VIN2)/0x25(VIN3)/0x35(VIN4) – Chroma
(V) Gain Register ............................................................... 60
0x06(VIN1)/0x16(VIN2)/0x26(VIN3)/0x36(VIN4) – Hue
Control Register ................................................................. 60
0x07(VIN1)/0x17(VIN2)/0x27(VIN3)/0x37(VIN4) –
Cropping Register, High .................................................... 60
0x08(VIN1)/0x18(VIN2)/0x28(VIN3)/0x38(VIN4) – Vertical
Delay Register, Low........................................................... 60
0x09(VIN1)/0x19(VIN2)/0x29(VIN3)/0x39(VIN4) – Vertical
Active Register, Low .......................................................... 61
0x0A(VIN1)/0x1A(VIN2)/0x2A(VIN3)/0x3A(VIN4) –
Horizontal Delay Register, Low ......................................... 61
0x0B(VIN1)/0x1B(VIN2)/0x2B(VIN3)/0x3B(VIN4) –
Horizontal Active Register, Low ........................................ 61
0x0C(VIN1)/0x1C(VIN2)/0x2C(VIN3)/0x3C(VIN4) –
Macrovision Detection ....................................................... 62
0x0D(VIN1)/0x1D(VIN2)/0x2D(VIN3)/0x3D(VIN4) – Chip
STATUS II .......................................................................... 62
0x0E(VIN1)/0x1E(VIN2)/0x2E(VIN3)/0x3E(VIN4) –
Standard Selection............................................................. 63
0x0F(VIN1)/0x1F(VIN2)/0x2F(VIN3)/0x3F(VIN4) –
Standard Recognition ........................................................ 64
0x56(VIN1/VIN2/VIN3/VIN4) – HASYNC ......................... 65
0x57(VIN1)/0X58(VIN2)/0X59(VIN3)/0X5A(VIN4) –
HBLEN ............................................................................... 65
0x68(VIN1/VIN2/VIN3/VIN4) – HZOOM_HI ..................... 66
0x69(VIN1)/0X6A(VIN2)/0X6B(VIN3)/0X6C(VIN4) –
HZOOM_LO....................................................................... 66
0xA0(VIN1)/0xA1(VIN2)/0xA2(VIN3)/0xA3(VIN4) – NT5066
0xA4(VIN1)/0xA5(VIN2)/0xA6(VIN3)/0xA7(VIN4) – ID
Detection Control ............................................................... 67
0xAA(VIN1/VIN2/VIN3/VIN4) – Video AGC Control ........ 67
0xAB(VIN1)/0xAC(VIN2)/0XAD(VIN3)/0XAE(VIN4) –
Video AGC Control ............................................................ 68
0xC4(VIN1)/0xC5(VIN2)/0xC6(VIN3)/0xC7(VIN4) – H
monitor ............................................................................... 68
0x4F – TEST_OUTSEL Register ...................................... 69
0x51 – FBITINV ................................................................. 70
0x52 – Audio DAC Control Register ................................. 71
0x53 – VADC_CKPOL ...................................................... 72
0x54 – Audio ADC Control 1 ............................................. 73
0x55 – VIN1/2/3/4 Video INPUT anti-aliasing filter selection73
0x5B – CLOCK OUTPU PIN DRIVE selection................. 74
0x5C– BGCTL ................................................................... 74
0x5D – VIN2 Miscellaneous Control II on BGCTL=1 ....... 75
0x5E – VIN3 Miscellaneous Control II on BGCTL=1 ....... 76
0x5F – VIN4 Miscellaneous Control II on BGCTL=1........ 77
0x60 – CLOk pll Control 1 ................................................. 78
0x61 – VIDEO Clock Select ............................................. 79
0x62 – O36M/MPPOE ....................................................... 79
0x63 – Channel ID 12 ........................................................ 80
0x64 – Channel ID 34 ........................................................ 80
0x65 – Channel ID 56 ........................................................ 80
0x66 – Channel ID 78 ........................................................ 80
0x67 – HZST ..................................................................... 80
0x6D – D1 NMGAIN/SHCOR .......................................... 81
0x6E – D1 Clamp Position Register................................. 81
0x6F – VIDEO Bus Tri-state Control ................................ 81
0x70 – Audio Clock Control .............................................. 82
0x71 – Digital Audio Input Control ..................................... 83
0x72 – Mix Ratio Value 1................................................... 84
0x72 – Mix Ratio Value 2................................................... 85
0x73 – A51DET_ENA....................................................... 86
0x74 – Status of Audio 51 Detection ................................ 86
4
TW2968
0x7B – ADATM I2S Output Select ....................................87
0x7C – ADATM I2S Output Select ....................................87
0x7D – AIN51/52/53/54 Record Output ............................88
0x7E – A5OUTOFF............................................................89
0x80 – Software Reset Control Register ...........................90
0x81 – Analog Control Register .........................................91
0x82 – Analog Control ReGister2 ......................................91
0x83 – Control Register I ...................................................92
0x84 – Color Killer Hysteresis Control Register ................92
0x85 – Vertical Sharpness .................................................93
0x86 – Coring Control Register..........................................93
0x87 – Clamping Gain........................................................93
0x88 – Individual AGC Gain...............................................93
0x89 – Audio Fs Mode Control ..........................................94
0x8A – White Peak Threshold ...........................................94
0x8B– Clamp level .............................................................95
0x8C– Sync Amplitude.......................................................95
0x8D – Sync Miss Count Register .....................................95
0x8E – WD1 Clamp Position Register...............................95
0x8F – Vertical Control I .....................................................96
0x90 – Vertical Control II ....................................................96
0x91 – Color Killer Level Control .......................................96
0x92 – Comb Filter Control ................................................97
0x93 – VSAVE1..................................................................97
0x94 – Miscellaneous Control I ..........................................97
0x95 – LOOP Control Register ..........................................98
0x96 – Miscellaneous Control II .........................................99
0x97 – CLAMP MODE .................................................... 100
0x98 – HSLOWCTL ........................................................ 100
0x99 – HSBEGIN ............................................................ 100
0x9A – HSEND................................................................ 100
0x9B – OVSDLY ............................................................. 101
0x9C – OVSEND............................................................. 101
0x9E – NOVID ................................................................. 102
0x9F – Clock Output Delay Control Register ................. 103
0xA8 – HFLT12 ............................................................... 103
0xA9 – HFLT34 ............................................................... 103
0xAF – Vertical Peaking Level Control 12 ...................... 104
0xB0 – Vertical Peaking Level Control 34 ...................... 104
0xB1 – TESTVNUM ........................................................ 105
0xB2 – VDLOSS Output ................................................. 106
0xB3 – Audio ADC Digital Input Offset Control ............. 106
0xB4 – Audio ADC Digital Input Offset Control .............. 106
0xB5 – Audio ADC Digital Input Offset Control .............. 107
0xB6 – Audio ADC Digital Input Offset Control .............. 107
0xB7 – Audio ADC Digital Input Offset Control .............. 107
0x75 – Audio ADC Digital Input Offset Control.............. 107
0x76 – Audio ADC Digital Input Offset Control............... 107
0xB8 – Analog Audio ADC Digital Output Value ............ 108
0xB9 – Analog Audio ADC Digital Output Value ............ 108
0xBA – Analog Audio ADC Digital Output Value ........... 108
0xBB – Analog Audio ADC Digital Output Value ........... 108
0xBC – Analog Audio ADC Digital Output Value ........... 108
0x77 – Analog Audio ADC Digital Output Value ........... 109
0x78 – Analog Audio ADC Digital Output Value ............ 109
0xBD – Adjusted Analog Audio ADC Digital Input Value109
0xBE – Adjusted Analog Audio ADC Digital Input Value 109
0xBF – Adjusted Analog Audio ADC Digital Input Value 110
0xC0 – Adjusted Analog Audio ADC Digital Input Value 110
0xC1 – Adjusted Analog Audio ADC Digital Input Value 110
0x79 – Adjusted Analog Audio ADC Digital Input Value110
0x7A – Adjusted Analog Audio ADC Digital Input Value 110
0xC8 – MPP Output Mode Control ................................. 111
0xC9 – MPP Pin Output Mode Control .......................... 112
0xCB –POLMPP ............................................................. 113
0xCC – H960EN.............................................................. 114
0xCD – O36M.................................................................. 115
0xCE – Analog Power Down Control ............................. 116
0xCF – Serial Mode Control............................................ 117
0xD0, 0xD1, 0x7F - Analog Audio Input Gain ................ 118
0xD2 – Number of Audio to be Recorded....................... 119
0xD3, 0xD4, 0xD5, 0xD6, 0xD7, 0xD8, 0xD9, 0xDA –
Sequence of Audio to be Recorded ................................ 120
0xDB –Master Control ..................................................... 121
0xDC –u-Law/A-Law Output and Mix Mute Control ....... 122
0xDD – Mix Ratio Value .................................................. 122
0xDE – Mix Ratio Value................................................... 122
0xDF – Analog Audio Output Gain................................. 123
0xE0 – Mix Output Selection 1 ....................................... 123
0xE0 – Mix Output Selection 2 ....................................... 124
0xE1 – Audio Detection Period and Audio Detection
Threshold ......................................................................... 125
0xE2 – Audio Detection Threshold................................. 126
0xE3 – Audio Detection Threshold................................. 126
0xE4 – YDLY12 .............................................................. 126
0xE5 – YDLY34 .............................................................. 126
0xE7 – Video output mode ............................................. 127
0xE8 – VD1 output CH12 select .................................... 128
0xE9 – VD1 output CH34 select .................................... 128
0xEA – VD2 output CH12 select .................................... 129
0xEB – VD2 output CH34 select .................................... 129
0xEC – VD3 output CH12 select .................................... 130
0xED – VD3 output CH34 select .................................... 130
0xEE – VD4 output CH12 select .................................... 131
0xEF – VD4 output CH34 select .................................... 131
0xF0 – Audio Clock Increment ....................................... 132
0xF1 – Audio Clock Increment ....................................... 132
0xF2 – Audio Clock Increment ....................................... 132
0xF3 – Audio Clock Number .......................................... 133
0xF4 – Audio Clock Number .......................................... 133
0xF5 – Audio Clock Number .......................................... 133
0xF6 – Serial Clock Divider ............................................ 133
0xF7 – Left/Right Clock Divider ...................................... 133
0xF8 – Audio Clock Control ............................................ 134
0xF9 – Video Miscellaneous Function Control .............. 135
0xFA – Output Enable Control and Clock Output Control136
0xFB – Clock Polarity Control......................................... 137
0xFC – Enable Video and Audio Detection ................... 138
0xFD – Status of Video and Audio Detection ................ 138
0xFE – Device ID and Revision ID Flag......................... 139
0xFF – Device ID and Revision ID Flag ......................... 139
Page1 Registers .................................................................. 139
0x00(VIN5)/0x10(VIN6)/0x20(VIN7)/0x30(VIN8) – Video
Status Register................................................................. 140
0x01(VIN5)/0x11(VIN6)/0x21(VIN7)/0x31(VIN8) –
BRIGHTNESS Control Register...................................... 140
0x02(VIN5)/0x12(VIN6)/0x22(VIN7)/0x32(VIN8) –
CONTRAST Control Register ......................................... 140
0x03(VIN5)/0x13(VIN6)/0x23(VIN7)/0x33(VIN8) –
SHARPNESS Control Register ....................................... 141
0x04(VIN5)/0x14(VIN6)/0x24(VIN7)/0x34(VIN8) – Chroma
(U) Gain Register ............................................................. 141
0x05(VIN5)/0x15(VIN6)/0x25(VIN7)/0x35(VIN8) – Chroma
(V) Gain Register ............................................................. 141
0x06(VIN5)/0x16(VIN6)/0x26(VIN7)/0x36(VIN8) – Hue
Control Register ............................................................... 142
0x07(VIN5)/0x17(VIN6)/0x27(VIN7)/0x37(VIN8) –
Cropping Register, High .................................................. 142
0x08(VIN5)/0x18(VIN6)/0x28(VIN7)/0x38(VIN8) – Vertical
Delay Register, Low......................................................... 142
0x09(VIN5)/0x19(VIN6)/0x29(VIN7)/0x39(VIN8) – Vertical
Active Register, Low ........................................................ 142
0x0A(VIN5)/0x1A(VIN6)/0x2A(VIN7)/0x3A(VIN8) –
Horizontal Delay Register, Low ....................................... 143
0x0B(VIN5)/0x1B(VIN6)/0x2B(VIN7)/0x3B(VIN8) –
Horizontal Active Register, Low ...................................... 143
0x0C(VIN5)/0x1C(VIN6)/0x2C(VIN7)/0x3C(VIN8) –
Macrovision Detection ..................................................... 144
0x0D(VIN5)/0x1D(VIN6)/0x2D(VIN7)/0x3D(VIN8) – Chip
STATUS II ........................................................................ 144
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