热搜关键词: 电路基础ADC数字信号处理封装库PLC

pdf

步进电机驱动器

  • 1星
  • 2015-11-05
  • 133.34KB
  • 需要2积分
  • 1次下载
标签: 驱动器

驱动器

一种用于步进电机的驱动器

文档内容节选

Features Floating channel designed for bootstrap operation Fully operational to 600V Tolerant to negative transient voltage dVdt immune Data Sheet No PD60046S IR2104S PbF HALFBRIDGE DRIVER Product Summary VOFFSET 600V max IO VOUT 130 mA 270 mA 10 20V 520 ns tonoff typ 680 150 ns Deadtime typ Gate drive supply range from 10 to 20V Undervoltage lockout 33V 5V and 15V input logic compatible Crossconduction prevention logic Internally set deadtime High side output in phase with input Sh......

Data Sheet No. PD60046-S
IR2104
(S) & (PbF)
HALF-BRIDGE DRIVER
Features
Floating channel designed for bootstrap operation
Fully operational to +600V
Tolerant to negative transient voltage
dV/dt immune
Gate drive supply range from 10 to 20V
Undervoltage lockout
3.3V, 5V and 15V input logic compatible
Cross-conduction prevention logic
Internally set deadtime
High side output in phase with input
Shut down input turns off both channels
Matched propagation delay for both channels
Also available LEAD-FREE
Product Summary
V
OFFSET
I
O
+/-
V
OUT
t
on/off
(typ.)
Deadtime (typ.)
600V max.
130 mA / 270 mA
10 - 20V
680 & 150 ns
520 ns
Packages
Description
The IR2104(S) are high voltage, high speed power
8 Lead SOIC
MOSFET and IGBT drivers with dependent high and low
8 Lead PDIP
IR2104S
side referenced output channels. Proprietary HVIC and
IR2104
latch immune CMOS technologies enable ruggedized
monolithic construction. The logic input is compatible with standard CMOS or LSTTL output, down to 3.3V logic.
The output drivers feature a high pulse current buffer stage designed for minimum driver cross-conduction. The
floating channel can be used to drive an N-channel power MOSFET or IGBT in the high side configuration which
operates from 10 to 600 volts.
Typical Connection
up to 600V
V
CC
V
CC
IN
SD
V
B
HO
V
S
LO
TO
LOAD
IN
SD
COM
(Refer to Lead Assignment for correct pin configuration) This/These diagram(s) show electrical
connections only. Please refer to our Application Notes and DesignTips for proper circuit board layout.
www.irf.com
1
IR2104
(S) & (PbF)
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage
parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are
measured under board mounted and still air conditions.
Symbol
V
B
V
S
V
HO
V
CC
V
LO
V
IN
dV
s
/dt
P
D
Rth
JA
T
J
T
S
T
L
Definition
High side floating absolute voltage
High side floating supply offset voltage
High side floating output voltage
Low side and logic fixed supply voltage
Low side output voltage
Logic input voltage (IN &
SD
)
Allowable offset supply voltage transient
Package power dissipation @ T
A
+25°C
Thermal resistance, junction to ambient
Junction temperature
Storage temperature
Lead temperature (soldering, 10 seconds)
(8 lead PDIP)
(8 lead SOIC)
(8 lead PDIP)
(8 lead SOIC)
Min.
-0.3
V
B
- 25
V
S
- 0.3
-0.3
-0.3
-0.3
-55
Max.
625
V
B
+ 0.3
V
B
+ 0.3
25
V
CC
+ 0.3
V
CC
+ 0.3
50
1.0
0.625
125
200
150
150
300
Units
V
V/ns
W
°C/W
°C
Recommended Operating Conditions
The Input/Output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the
recommended conditions. The V
S
offset rating is tested with all supplies biased at 15V differential.
Symbol
V
B
V
S
V
HO
V
CC
V
LO
V
IN
T
A
Definition
High side floating supply absolute voltage
High side floating supply offset voltage
High side floating output voltage
Low side and logic fixed supply voltage
Low side output voltage
Logic input voltage (IN &
SD
)
Ambient temperature
Min.
V
S
+ 10
Note 1
V
S
10
0
0
-40
Max.
V
S
+ 20
600
V
B
20
V
CC
V
CC
125
Units
V
°C
Note 1: Logic operational for V
S
of -5 to +600V. Logic state held for V
S
of -5V to -V
BS
. (Please refer to the Design Tip
DT97-3 for more details).
2
www.irf.com
IR2104
(S) & (PbF)
Dynamic Electrical Characteristics
V
BIAS
(V
CC
, V
BS
) = 15V, C
L
= 1000 pF and T
A
= 25°C unless otherwise specified.
Symbol
ton
toff
tsd
tr
tf
DT
MT
Definition
Turn-on propagation delay
Turn-off propagation delay
Shutdown propagation delay
Turn-on rise time
Turn-off fall time
Deadtime, LS turn-off to HS turn-on &
HS turn-on to LS turn-off
Delay matching, HS & LS turn-on/off
Min. Typ. Max. Units Test Conditions
400
680
150
160
100
50
520
820
220
220
170
90
650
60
ns
V
S
= 0V
V
S
= 600V
Static Electrical Characteristics
V
BIAS
(V
CC
, V
BS
) = 15V and T
A
= 25°C unless otherwise specified. The V
IN
, V
TH
and I
IN
parameters are referenced to
COM. The V
O
and I
O
parameters are referenced to COM and are applicable to the respective output leads: HO or LO.
Symbol
V
IH
V
IL
V
SD,TH+
V
SD,TH-
V
OH
V
OL
I
LK
I
QBS
I
QCC
I
IN+
I
IN-
V
CCUV+
V
CCUV-
I
O+
I
O-
Definition
Logic “1” (HO) & Logic “0” (LO) input voltage
Logic “0” (HO) & Logic “1” (LO) input voltage
SD input positive going threshold
SD input negative going threshold
High level output voltage, V
BIAS
- V
O
Low level output voltage, V
O
Offset supply leakage current
Quiescent V
BS
supply current
Quiescent V
CC
supply current
Logic “1” input bias current
Logic “0” input bias current
V
CC
supply undervoltage positive going
threshold
V
CC
supply undervoltage negative going
threshold
Output high short circuit pulsed current
Output low short circuit pulsed current
Min. Typ. Max. Units Test Conditions
3
3
8
7.4
130
270
30
150
3
8.9
8.2
210
360
0.8
0.8
100
100
50
55
270
10
1
9.8
V
9
mA
V
O
= 0V
PW
10
µs
V
O
= 15V
PW
10
µs
µA
mV
V
V
CC
= 10V to 20V
V
CC
= 10V to 20V
V
CC
= 10V to 20V
V
CC
= 10V to 20V
I
O
= 0A
I
O
= 0A
V
B
= V
S
= 600V
V
IN
= 0V or 5V
V
IN
= 0V or 5V
V
IN
= 5V
V
IN
= 0V
www.irf.com
3
IR2104
(S) & (PbF)
Functional Block Diagram
VB
HV
LEVEL
SHIFT
Q
PULSE
FILTER
R
S
VS
HO
IN
PULSE
GEN
DEAD TIME &
SHOOT-THROUGH
PREVENTION
UV
DETECT
VCC
SD
LO
COM
Lead Definitions
Symbol Description
IN
Logic input for high and low side gate driver outputs (HO and LO), in phase with HO
Logic input for shutdown
High side floating supply
High side gate drive output
High side floating supply return
Low side and logic fixed supply
Low side gate drive output
Low side return
SD
V
B
HO
V
S
V
CC
LO
COM
Lead Assignments
1
2
3
4
VCC
IN
SD
COM
VB
HO
VS
LO
8
7
6
5
1
2
3
4
VCC
IN
SD
COM
VB
HO
VS
LO
8
7
6
5
8 Lead PDIP
8 Lead SOIC
IR2104
4
IR2104S
www.irf.com
IR2104
(S) & (PbF)
IN
IN
(LO)
50%
50%
SD
IN
(HO)
ton
tr
90%
toff
90%
tf
HO
LO
LO
HO
Figure 1. Input/Output Timing Diagram
10%
10%
Figure 2. Switching Time Waveform Definitions
50%
50%
SD
50%
IN
tsd
90%
HO
LO
90%
HO
DT
10%
DT
LO
Figure 3. Shutdown Waveform Definitions
90%
10%
Figure 4. Deadtime Waveform Definitions
IN
(LO)
50%
50%
IN
(HO)
LO
HO
10%
MT
90%
MT
LO
HO
Figure 5. Delay Matching Waveform Definitions
www.irf.com
5
展开预览

猜您喜欢

评论

登录/注册

意见反馈

求资源

回顶部

推荐内容

热门活动

热门器件

随便看看

 
EEWorld订阅号

 
EEWorld服务号

 
汽车开发圈

电子工程世界版权所有 京B2-20211791 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号 Copyright © 2005-2024 EEWORLD.com.cn, Inc. All rights reserved
×