Abstract — Good understanding of power loss in a high frequencysynchronous buck converter is important for design optimizationof both power MOSFET and circuit itself. Most of the MOSFETpower losses are relatively easy to quantify. The exception is thepower loss associated with Cdv/dt induced turn on of the low-sideMOSFET (synchronous rectifier). This paper characterizes theCdv/dt induced power loss in two ways. First, detailed devicecharacterization, in-circuit testing, and modeling are used for acomparative loss calculation. This method requires specializedtest equipment and is rather complicated and time consuming. Asimple method is then introduced to very accurately quantify theCdv/dt loss. With this method, the impacts of the Cdv/dt powerloss on synchronous buck converters at different operationconditions can be readily assessed. The impacts of Cdv/dtinduced turn on different applications are addressed.
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