Part Ⅰ Circuits Models1 Introduction2 Background3 Hardware ModelingPart Ⅱ Architectural-Level Synthesis and Optimization4 Architectural-Level Synthesis and Optimization5 Scheduling Algorithms6 Resource Sharing and BindingPart Ⅲ Logic-Level Synthesis and Optimization7 Two-Level Synthesis and Optimization8 Multiple-Level Combinational Logic Optimization9 Sequential Logic Optimization10 Cell-Library BindingPart Ⅳ Conclusions11 State of the Art and Future Treods
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