Top module name : SHIFTER (File name : SHIFTER.v)2. Input pins: SHIFT [3:0], IN [15:0], SIGN, RIGHT.3. Output pins: OUT [15:0].4. Input signals generated from test pattern are latched in one cycle and aresynchronized at clock rising edge.5. The SHIFT signal describes the shift number. The shift range is 0 to 15.6. When the signal RIGHT is high, it shifts input data to right. On the other hand, itshifts input data to left.7. When the signal SIGN is high, the input data is a signed number and it shifts withsign extension. However, the input data is an unsigned number if the signal SIGNis low.8. You can only use following gates in Table I and need to include the delayinformation (Tplh, Tphl) in your design.
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