Study of Signal and Power Integrity Challenges in High-Speed Memory IO Designs

Dan_Oh_Study  of  Signal  and  Power  Integrity  Challenges  in  High-Speed  Memory  IO  Designs  Using  Single-Ended  Signaling  Schemes

文档内容节选

DesignCon 2008 Study of Signal and Power Integrity Challenges in High Speed Memory IO Designs Using SingleEnded Signaling Schemes Dan Oh Rambus Inc dohrambuscom Woopoung Kim Rambus Inc JoongHo Kim Rambus Inc John Wilson Rambus Inc Ralf Schmitt Rambus Inc Chuck Yuan Rambus Inc Lei Luo Rambus Inc Jade Kizer Rambus Inc John Eble Rambus Inc Fred Ware Rambus Inc Abstract In contrast to most chiptochip IO interfaces that use differential signaling the mainstream......