pdf

CMOS RF Characteristics

  • 1星
  • 日期: 2017-10-30
  • 大小: 182.64KB
  • 所需积分:1分
  • 下载次数:0
  • favicon收藏
  • rep举报
  • free评论
标签: RF

射频(RF)是Radio Frequency的缩写,表示可以辐射到空间的电磁频率,频率范围从300KHz~300GHz之间。射频简称RF射频就是射频电流,它是一种高频交流变化电磁波的简称。每秒变化小于1000次的交流电称为低频电流,大于10000次的称为高频电流,而射频就是这样一种高频电流。

CMOS

CMOS是Complementary Metal Oxide Semiconductor(互补金属氧化物半导体)的缩写。它是指制造大规模集成电路芯片用的一种技术或用这种技术制造出来的芯片。是电脑主板上的一块可读写的RAM芯片。因为可读写的特性,所以在电脑主板上用来保存BIOS设置完电脑硬件参数后的数据,这个芯片仅仅是用来存放数据的。另外,CMOS同时可指互补式金氧半元件及制程。因此时至今日,虽然因为工艺原因,都叫做CMOS,但是CMOS在三个应用领域,呈现出迥然不同的外观特征:一是用于计算机信息保存,CMOS作为可擦写芯片使用,在这个领域,用户通常不会关心CMOS的硬件问题,而只关心写在CMOS上的信息,也就是BIOS的设置问题,其中提到最多的就是系统故障时拿掉主板上的电池,进行CMOS放电操作,从而还原BIOS设置。二是在数字影像领域,CMOS作为一种低成本的感光元件技术被发展出来,市面上常见的数码产品,其感光元件主要就是CCD或者CMOS,尤其是低端摄像头产品,而通常高端摄像头都是CCD感光元件。三是在更加专业的集成电路设计与制造领域。

CMOS  RF  Characteristics

文档内容节选

Journal of the Korean Physical Society Vol 40 No 1 January 2002 pp 4548 RF Characteristics of 018m CMOS Transistors Kwangseok Han Jeonghu Han Minkyu Je and Hyungcheol Shin Department of Electrical Engineering and Computer Science Korea Advanced Institute of Science and Technology Taejon 305701 Received 11 February 2001 In this work the highfrequency performance of a 018m CMOS device has been analyzed with various multinger layouts and biases to nd the optimal condition The optimal bias condition......

Journal of the Korean Physical Society, Vol. 40, No. 1, January 2002, pp. 45∼48 RF Characteristics of 0.18-µm CMOS Transistors Kwangseok Han,∗ Jeong-hu Han, Minkyu Je and Hyungcheol Shin Department of Electrical Engineering and Computer Science, Korea Advanced Institute of Science and Technology, Taejon 305-701 (Received 11 February 2001) In this work, the high-frequency performance of a 0.18-µm CMOS device has been analyzed with various multi-finger layouts and biases to find the optimal condition. The optimal bias condition to maximize the cutoff frequency (fT ) and the maximum oscillation frequency (fmax) have been found to be equal to that required to maximize the transconductance (gm). At this bias condition, fT tends to be maximized with a small number of fingers. It has been found that fmax strongly depends on the gate resistance. Finally, the de-embedding effects on cutoff frequency are presented. PACS numbers: 85.30.De I. INTRODUCTION The strongly emerging wireless communication mar- ket needs device technologies that are capable of pro- ducing high product volumes at extremely low cost [1]. III-V compound semiconductor devices, which in- clude MESFET’s, HEMT’s, and HBT’s, have been used in microwave electronic circuits because of good high- frequency performance [2]. However, these devices are limited to a specific area due to high fabrication cost. On the other hand, due to the continuous reduction of minimum channel length in CMOS technologies, CMOSs have become candidates for RF applications. By us- ing CMOS devices in IF and RF modules in wireless communication systems, we can integrate the system in a single chip. Consequently, substantial research is in progress today to investigate and increase the perfor- mance of CMOS devices for RF applications. By using a layout optimization technique, which reduces the para- sitic components, we can obtain good RF characteristics for MOSFETs [3]. In this paper, we present the cutoff frequency (fT ) and the maximum oscillation frequency (fmax) characteristics of 0.18-µm MOSFETs with vari- ous layouts. II. MEASUREMENT Multi-finger type MOSFETs were laid out with a common-source configuration. Scattering parameters were measured in devices with various unit finger lengths (Lf ). Measurements of the scattering parameters were carried out in the frequency range of 0.5∼50 GHz by ∗ E-mail: kwhan@inca.kaist.ac.kr; Fax: +82-42-869-8590 using on-wafer RF probes and a HP8510C vector net- work analyzer (VNA). The power level of the incident wave was -10 dBm. A ground-signal-ground (GSG) pad was used. System calibration with an ISS (impedance- standard substrate) was done to extend the reference plane to the probe tips. Two-step de-embedding, which includes open and short de-embedding, was performed. III. RESULTS AND DISCUSSION Figure 1 shows the measured scattering parameters of an nMOSFET with W = 5 × 20 µm and L = 0.18 µm in the Smith chart. The magnitude of S21 was larger Fig. 1. Measured scattering parameters of an nMOSFET in the frequency range of 0.5∼50 GHz. The power level of incident wave was -10 dBm. -45- -46- Journal of the Korean Physical Society, Vol. 40, No. 1, January 2002 Fig. 2. fT was extracted by using a linear regression. In this nMOSFET device, fT was 60 GHz at Vg=1.2 V and Vd=2.0 V than unity, which showed that the transistor amplifies the input power. H21, the forward current gain, on a dB scale degraded linearly with logarithm of the frequency, as shown in Fig. 2. The cutoff frequency (fT ) is ex- tracted at the point where H21 becomes unity. For this nMOSFET (W = 5 × 10 µm and L = 0.18 µm), fT was 60 GHz. Figure 3 shows the dependencies of the transconduc- tance (gm) and the fT as functions of the drain cur- rent in nMOSFETs and pMOSFETs. The drain voltage was fixed to 2 V. The gate voltage was changed from 0.6 V and 2 V. The transconductance develops a dis- tinct maximum at a certain bias. The reduced gm at low bias is a result of the large thickness of the channel near the weak inversion condition while mobility degradation lowers gm at high fields [4]. The mobility degradation in nMOSFETs was obviously more pronounced than in pMOSFETs within the bias boundaries. The fT shows a similar strong bias dependency since it relates to gm as (1) fT = gm/2πCgg , Fig. 4. Dependency of fT on the number of fingers. fT decreases as the number of fingers increases with the same total width. where Cgg is the total capacitance at the gate node. fT and gm have a maximum value at Vg=1.2 V for Vd=2 V in nMOSFETs. In the saturation region, fT changes slightly with drain bias. Figure 4 shows the extracted fT of nMOSFETs as a function of the number of finger at the same total de- vice width and optimum bias condition of Vg=1.2 V and Vd=2 V. As the number of fingers increases, fT degrades because of an increase in the number of gate contact pads and, hence, in the total value of Cgb indicated in the inset of Fig. 5 [5]. Since intrinsic parts of devices with large widths become large compared to the par- asitic Cgb, devices with large total widths have higher cutoff frequencies at same number of fingers. Figure 6 shows the de-embedding effect on fT . Open de-embedding, which subtracts the pad capacitance and forward coupling, has a considerable effect on fT . The cutoff frequency of intrinsic devices was two times larger than that of devices with pad parasitics, which indicated that the pad capacitance was comparable to that of an intrinsic device. However, since fT itself is nearly inde- Fig. 3. Dependency of fT on the drain current in an nMOSFET and a pMOSFET. The fT curve has the same shape as the gm curve. Fig. 5. Schematic of the multi-finger layout. The capaci- tance Cgb increases as the number of fingers increases, which degrades the cutoff frequency (fT ). RF Characteristics of 0.18-µm CMOS Transistors – Kwangseok Han et al. -47- Fig. 6. This figure shows the de-embedding effect on fT . Since fT is nearly independent of the series resistance, short de-embedding has little effect on fT . Fig. 8. MSG and MAG in 0.18-µm nMOSFETs with dif- ferent finger lengths. pendent of the series resistance, short de-embedding has no significant effect on fT . Figure 7(a) shows the maximum stable gain (MSG) and maximum available gain (MAG) as a function of the frequency in devices with channel lengths from 1 µm to 0.16 µm. The maximum oscillation frequency (fmax) is extracted at the point where MAG becomes unity [6]. For the nMOSFET with a channel length of 0.6 µm, fmax was 21 GHz. Figure 7(b) shows the fT and the fmax versus channel length in nMOFETs. As the channel length scales down, fT increases because gm increases and Cgg decreases. Figure 8 shows MSG and MAG in 0.18-µm nMOS- FETs with different numbers of fingers with the same to- tal device width of 100 µm. The MAG was only observed in the device with eight fingers in the measurement range up to 50 GHz, which indicated that the device had the smallest fmax. The value of fmax can be approximately expressed as follows: fmax =(cid:113)fT /(8πRgCgd) , (2) where Cgd is the drain-to-gate capacitance and Rg is the gate resistance. The gate resistance (Rg) is a dominant parameter governing fmax with the layout variation of the gate fingers in MOSFETs. Rg can be expressed sim- ply as Rg = RSW/(n2L), where RS is the polysilicon sheet resistance, L is the gate length, W is the total gate width, and n is the number of gate fingers. Although the device with small number of fingers has a higher fT , the gate resistance (Rg) dominantly degrades the maximum oscillation frequecy. IV. CONCLUSIONS We have shown that 0.18-µm nMOSFETs have cutoff frequencies from 50 GHz to 80 GHz for different lay- out conditions and 0.18-µm pMOSFETs have a 40 GHz cutoff frequecny with a total width of 100 µm and unit finger length of 5 µm, which indicates that submicron MOSFETs are possible candidate for RF applications. fT and fmax decreased and increased, respectively, with number increase of the fingers. Fig. 7. (a) Maximum stable gain (MSG) and maximum available gain (MAG) for different channel lengths and (b) the cutoff frequency (fT ) and maximum oscillation frequency (fmax) as functions of the channel length. -48- Journal of the Korean Physical Society, Vol. 40, No. 1, January 2002 ACKNOWLEDGMENTS This work was supported by the National Program for Tera-level Nano Devices through the Ministry of sci- ence and Technology. The authors also thank the Anam Semiconductor for device fabrication. REFERENCES [1] K.-H. Baek, G.M. Lim, S.D. Cho, Y.C. Kim, H.C. Kim, S.K. Kim, D.J. Kim and D.M. Kim, J. Korean Phys. Soc. 37, S915 (2000). [2] S.-J. Maeng, J.-K. Mum, M.-G. Kim, J.-J. Lee and J.-L. Lee, J. Korean Phys. Soc. 30, S117 (1997). [3] S.P. Voinigescu, S.W. Tarasewicz, T. MacElwee and J. Ilowski, in IEDM Tech. Dig., pp. 721-724, 1995. [4] J.N. Burghartz, M. Hargrove, C.S. Webster, R.A. Groves, M. Keene, K.A. Jenkins, R. Logan and E. Nowak, IEEE Trans. on Electron Devices 47, 864 (2000). [5] E.Morifuji, H.S. Momose, T. Ohguro, T. Yoshitomi, H. Kimijima, F. Matsutka, M. Kinugawa, Y. Katsumata and H. Iwai, in Symp. VLSI Technology Dig. Tech. Papers, pp. 163-164, 1999. [6] G. Gonzalez, Microwave Transistor Amplifiers: Analysis and Design (Prentice-Hall, 1984)
更多简介内容

推荐帖子

评论

登录/注册

意见反馈

求资源

回顶部

About Us 关于我们 客户服务 联系方式 器件索引 网站地图 最新更新 手机版 版权声明

北京市海淀区知春路23号集成电路设计园量子银座1305 电话:(010)82350740 邮编:100191

电子工程世界版权所有 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号 Copyright © 2005-2021 EEWORLD.com.cn, Inc. All rights reserved
$(function(){ var appid = $(".select li a").data("channel"); $(".select li a").click(function(){ var appid = $(this).data("channel"); $('.select dt').html($(this).html()); $('#channel').val(appid); }) })
×