As a result of technology trends towards multi-gigahertz
processors, the I/O system is becoming a critical bottleneck
for many applications. Interrupts are a major aspect
of most device drivers. Characterizing interrupt performance
and its relation to architectural trends is important
for understanding and improving I/O subsystem performance.
Kernel instrumentation in combination with performance
counters is able to overcome the limitations of
microbenchmarks when measuring interrupts. A comparative
analysis of a range of IA-32 based systems reveals
that interrupt handler code exhibits only a low degree of
instruction-level parallelism. Consequently, the trend towards
deeper processor pipelines and smaller caches to
maximize clock frequency can be detrimental to interrupt
handling performance
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