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XS1-U8A-64-FB96 Datasheet

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标签： xmos

xmos

xCORE

xmos

Multicore

Multicore

Microcontrollers

Microcontrollers

ECU

ECU

汽车电子

汽车电子

xCORE  Multicore  Microcontrollers 

The  XS1-U  Series  is  a  comprehensive  range  of  32-bit  multicore  microcontrollers

that  brings  the  low  latency  and  timing  determinism  of  the  xCORE  architecture  to

mainstream  embedded  applications.  Unlike  conventional  microcontrollers,  xCORE

multicore  microcontrollers  execute  multiple  real-time  tasks  simultaneously.  Devices

consist  of  one  or  more  xCORE  tiles,  each  containing  between  four  and  eight

independent  xCORE  logical  processors.  Each  logical  core  can  execute  computational

code,  advanced  DSP  code,  control  software  (including  logic  decisions  and

executing  a  state  machine)  or  software  that  handles  I/O.

XS1-U8A-64-FB96 Datasheet
2013/04/16
XMOS © 2013, All Rights Reserved
Document Number: X6319,
XS1-U8A-64-FB96 Datasheet
1
Table of Contents
1
xCORE Multicore Microcontrollers
. . . . .
2
XS1-U8A-64-FB96 Features
. . . . . . . . .
3
Pin Configuration
. . . . . . . . . . . . . .
4
Signal Description
. . . . . . . . . . . . . .
5
Example Application Diagram
. . . . . . .
6
Product Overview
. . . . . . . . . . . . . .
7
xCORE Tile Resources
. . . . . . . . . . . .
8
Oscillator
. . . . . . . . . . . . . . . . . . .
9
Boot Procedure
. . . . . . . . . . . . . . . .
10 Memory
. . . . . . . . . . . . . . . . . . . .
11 USB PHY
. . . . . . . . . . . . . . . . . . . .
12 Analog-to-Digital Converter
. . . . . . . .
13 Supervisor Logic
. . . . . . . . . . . . . . .
14 Energy management
. . . . . . . . . . . .
15 JTAG
. . . . . . . . . . . . . . . . . . . . . .
16 Board Integration
. . . . . . . . . . . . . .
17 Example XS1-U8A-64-FB96 Board Designs
18 DC and Switching Characteristics
. . . . .
19 Package Information
. . . . . . . . . . . .
20 Ordering Information
. . . . . . . . . . . .
Appendices
. . . . . . . . . . . . . . . . . . . . .
A
Configuring the device
. . . . . . . . . . .
B
Processor Status Configuration
. . . . . .
C
xCORE Tile Configuration
. . . . . . . . .
D
Digital Node Configuration
. . . . . . . . .
E
Analogue Node Configuration
. . . . . . .
F
USB PHY Configuration
. . . . . . . . . . .
G
ADC Configuration
. . . . . . . . . . . . .
H
Deep sleep memory Configuration
. . . .
I
Oscillator Configuration
. . . . . . . . . .
J
Real time clock Configuration
. . . . . . .
K
Power control block Configuration
. . . .
L
Associated Design Documentation
. . . .
M
Related Documentation
. . . . . . . . . . .
N
Revision History
. . . . . . . . . . . . . . .
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91
TO OUR VALUED CUSTOMERS
It is our intention to provide you with accurate and comprehensive documentation for the hardware and
software components used in this product. To subscribe to receive updates, visit
http://www.xmos.com/.
XMOS Ltd. is the owner or licensee of the information in this document and is providing it to you “AS IS” with
no warranty of any kind, express or implied and shall have no liability in relation to its use. XMOS Ltd. makes
no representation that the information, or any particular implementation thereof, is or will be free from any
claims of infringement and again, shall have no liability in relation to any such claims.
XMOS and the XMOS logo are registered trademarks of XMOS Ltd in the United Kingdom and other countries,
and may not be used without written permission. Company and product names mentioned in this document
are the trademarks or registered trademarks of their respective owners.
X6319,
XS1-U8A-64-FB96 Datasheet
2
1 xCORE Multicore Microcontrollers
The XS1-U Series is a comprehensive range of 32-bit multicore microcontrollers
that brings the low latency and timing determinism of the xCORE architecture to
mainstream embedded applications. Unlike conventional microcontrollers, xCORE
multicore microcontrollers execute multiple real-time tasks simultaneously. De-
vices consist of one or more xCORE tiles, each containing between four and eight
independent xCORE logical processors. Each logical core can execute computa-
tional code, advanced DSP code, control software (including logic decisions and
executing a state machine) or software that handles I/O.
Because xCORE multicore microcontrollers are completely deterministic, you can
write software to implement functions that traditionally require dedicated hardware.
You can simulate your program like hardware, and perform static timing analysis
using the xTIMEcomposer development tools.
The devices include scheduling hardware that performs functions similar to those
of an RTOS; and hardware that connects the cores directly to I/O ports, ensuring not
only fast processing but extremely low latency. The use of interrupts is eliminated,
ensuring deterministic operation.
PLL
Security
OTP ROM
xTIME: schedulers
timers, clocks
SRAM
64KB
JTAG
debug
xCONNECT: channels, links
USB 2.0 PHY
xCORE logical core
xCORE logical core
xCORE logical core
xCORE logical core
xCORE logical core
xCORE logical core
xCORE logical core
xCORE logical core
xCORE logical core
xCORE logical core
xCORE logical core
xCORE logical core
xCORE logical core
xCORE logical core
PLL
Security
OTP ROM
xTIME: schedulers
timers, clocks
SRAM
64KB
JTAG
debug
xCONNECT
channels, links
xCONNECT
channels, links
I/O pins
Hardware
response
ports
Multichannel ADC
DC-DC PMIC
Figure 1:
XS1-U Series:
6-16 core
devices
XS1-U devices are available in a range of resource densities, package, performance
and temperature grades depending on your needs. XS1-U devices have up to
eight logical cores on a single xCORE tile, providing 500-700 MIPS, 28 GPIO, and
64Kbytes of SRAM.
X6319,
I/O pins
Hardware
response
ports
xCORE logical core
I/O pins
xCORE logical core
XS1-U8A-64-FB96 Datasheet
3
1.1
xSOFTip
xCORE devices are backed with tested and proven IP blocks from the xSOFTip
library, which allow you to quickly add interface and processor functionality such
as Ethernet, PWM, graphics driver, and audio EQ to your xCORE device.
xSOFTip blocks are written in high level languages and use xCORE resources
to implement given function. This means xSOFTip is software and brings the
associated benefits of easy maintenance and fast compilation time, while being
accessible to anyone with embedded C skills.
The graphical xSOFTip Explorer tool lets you browse available xSOFTip blocks
from our library, understand the resource usage, configure the blocks to your
specification, and estimates the right device for your design. It is included in xTIME-
composer Studio or available as a standalone tool from
xmos.com/downloads.
1.2
xTIMEcomposer Studio
Designing with XS1-U devices is simple thanks to the xTIMEcomposer Studio
development environment, which includes a highly efficient compiler, debugger
and device programming tools. Because xCORE devices operate deterministically,
they can be simulated like hardware within the development tools: uniquely in
the embedded world, xTIMEcomposer Studio therefore includes a static timing
analyzer, cycle-accurate simulator, and high-speed in-circuit instrumentation.
xTIMEcomposer can also be used to load the executable file onto the device and
debug it over JTAG, programmed it into flash memory on the board, or write it to
OTP memory on the device. The tools can also encrypt the flash image and write
the decrpytion key securely to OTP memory.
xTIMEcomposer can be driven from either a graphical development environ-
ment that will be familiar to any C programmer, or the command line. They
are supported on Windows, Linux and MacOS X and available at no cost from
xmos.com/downloads.
Information on using the tools is provided in a separate user guide,
X3766.
X6319,
XS1-U8A-64-FB96 Datasheet
4
2 XS1-U8A-64-FB96 Features
·
Eight-Core Multicore Microcontroller with Advanced Multi-Core RISC Architecture
•
Up to 500 MIPS shared between up to 8 real-time logical cores
•
Each logical core has:
— Guaranteed throughput of between
1
/
4
and
1
/
8
of tile MIPS
— 16x32bit dedicated registers
•
159 high-density 16/32-bit instructions
— All have single clock-cycle execution (except for divide)
— 32x32→64-bit MAC instructions for DSP, arithmetic and user-definable cryptographic
functions
·
USB PHY, fully compliant with USB 2.0 specification
·
12b 1MSPS 4-channel SAR Analog-to-Digital Converter
·
1 x LDO
·
2 x DC-DC converters and Power Management Unit
·
Watchdog Timer
·
Onchip clocks/oscillators
•
Crystal oscillator
•
20MHz/31kHz silicon oscillators
·
Programmable I/O
•
38 general-purpose I/O pins, configurable as input or output
•
Port sampling rates of up to 60 MHz with respect to an external clock
•
32 channel ends for communication with other cores, on or off-chip
·
Memory
•
64KB internal single-cycle SRAM for code and data storage
•
8KB internal OTP for application boot code
•
128 bytes Deep Sleep Memory
·
JTAG Module for On-Chip Debug
·
Security Features
•
Programming lock disables debug and prevents read-back of memory contents
•
AES bootloader ensures secrecy of IP held on external flash memory
·
Ambient Temperature Range
•
0 °C to 70 °C
·
Speed Grade
•
5: 500 MIPS
·
Power Consumption with USB running (typical)
•
300 mW (typical)
•
Sleep Mode: 500 µW
·
96-pin FBGA package 0.8 mm pitch
X6319,
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