A low power audio oversampling SigmaDelta digital-to-analog converter (DAC) with a three-level (+1, 0,-1) dynamic-element-matching (DEM) technique and an inter-symbol interference-free (ISI) output stage is presented. Solutions for design challenges such as ISI, clock jitter sensitivity, and out-of-band noise are presented. The converter is fabricated in a 0.18 mum CMOS process, occupies 0.55 mm2, achieves 108 dB dynamic range, -98 dB THD + N while consumes a total of 1.1 mW per channel at 1.8 V supply.
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