1
RFID Radio Circuit Design in CMOS
Minhong Mi, Ansoft Corp.
2
Outline
•
Overview of RFID Radios at System Level
•
Power Generation/Management Circuit
•
Recitifier, Charge-pump, Low-Drop Out (LDO) Voltage Regulator, Reset Circuit
•
Demodulator Circuit
•
Envelope Detector, Ring Oscillator, Comparator
•
Modulator Circuit
•
Bias Generator, Phase Modulator
•
Overall Radio Simulation and Verification
•
Input Impedance Simulation (under large signal condition)
•
System/Nexxim Co-sim (with deep-modulated ASK input)
•
Antenna Design
3
Overview of
RFID Radio Circuits
at System Level
4
Overview for RFID Radio
⎛
4
π
fd
Loss
[
dB
]
=
20 log
⎜
⎝
c
Antenna gain Gt=3dB
f=950MHz
Distance
d= 10m
Loss ~ 47 dB
Tag
⎞
⎟ −
10 log
Gt
−
10 log
Gr
⎠
Antenna gain Gr=1.64 dB
Base
station
EIRP = 4W
Tx Antenna Gain
3 dB
Rx Antenna Gain
1.64 dB
Frequency
950 MHz
Distance
10 meter
Speed of Light
3.00E+08 m/s
Loss
47.36 dB
Tx Power
46.43 dBm
Rx Power
-0.92 dBm
Receiving power
~ -1dBm
5
Overview for RFID Radio (2)
⎧
6 .25
µ
s
⎪
1
⋅
Tari
= ⎨
12 .5
µ
s
⎪
25
µ
s
⎩
CW >= 8*RTcal
RTcal
pivot
=
2
To get TRCal to calibrate for link
frequency (LF) when backscattering
LF
=
RTcal = 0
length
+ 1
length
Data Rate
Register
Waveform
shaper
(A/D)
DR
TRcal
Sent from reader !!
DR: Divide Ratio = 64/3 or 8
T
pri
=
Digital
Comparator
1
TRcal
=
= Link Period
LF
DR
ASK
input
Envelope
Detector
Counter
Tag1: f
osc1
Tag1: f
osc2
…
Tag1: f
osc3
Osc
process, environment variations
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