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SSD1306技术手册

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SSD1306技术手册SSD1306技术手册

SOLOMON SYSTECH
SEMICONDUCTOR TECHNICAL DATA
SSD1306
Advance Information
128 x 64 Dot Matrix
OLED/PLED Segment/Common Driver with Controller
This document contains information on a new product. Specifications and information herein are subject to change without
notice.
http://www.solomon-systech.com
SSD1306
Rev 1.5
P 1/64
Copyright
©
2010
Solomon Systech Limited
Aug 2010
Appendix: IC Revision history of SSD1306 Specification
Version
1.0
1.1
1 release
1.
2.
1.
2.
1.
2.
3.
4.
5.
1.
2.
Revise typo
Revise command table
Add Charge pump section
Add Advance graphic commands : 23h, D6h
Revise Section 8.10 Charge Pump Regulator
Revise Section 12 DC Characteristics
Revise min. t
AS
Address Setup Time in Table 13-2 to 5ns
Add Figure 10-7 Oscillator frequency setting
Update declaimer
Replace SSD1306Z by SSD1306Z2 and add SSD1306Z2 into ordering
information (P.7)
Add Power ON and OFF sequence with Charge Pump Application in section
8.9 (p.29)
Update Power on/off sequence with charge pump application in section 8.9
(p.29)
st
Change Items
Effective Date
3-Oct-07
29-Apr-08
1.2
07-Jul-09
1.3
07-May-10
1.4
13-Jul-10
1.5
1.
27-Aug-10
Solomon Systech
Aug 2010
P 2/64
Rev 1.5
SSD1306
CONTENTS
1
2
3
4
5
6
7
8
GENERAL DESCRIPTION .......................................................................................................7
FEATURES...................................................................................................................................7
ORDERING INFORMATION ...................................................................................................7
BLOCK DIAGRAM ....................................................................................................................8
DIE PAD FLOOR PLAN ............................................................................................................ 9
PIN ARRANGEMENT..............................................................................................................12
6.1
SSD1306TR1
PIN ASSIGNMENT
.......................................................................................................................... 12
PIN DESCRIPTION ..................................................................................................................14
FUNCTIONAL BLOCK DESCRIPTIONS.............................................................................16
8.1
MCU I
NTERFACE SELECTION
.............................................................................................................................. 16
8.1.1
MCU Parallel 6800-series Interface.......................................................................................................... 16
8.1.2
MCU Parallel 8080-series Interface.......................................................................................................... 17
8.1.3
MCU Serial Interface (4-wire SPI) ............................................................................................................ 18
8.1.4
MCU Serial Interface (3-wire SPI) ............................................................................................................ 19
8.1.5
MCU I
2
C Interface..................................................................................................................................... 20
8.2
C
OMMAND
D
ECODER
......................................................................................................................................... 23
8.3
O
SCILLATOR
C
IRCUIT AND
D
ISPLAY
T
IME
G
ENERATOR
..................................................................................... 23
8.4
FR
SYNCHRONIZATION
....................................................................................................................................... 24
8.5
R
ESET
C
IRCUIT
................................................................................................................................................... 24
8.6
S
EGMENT
D
RIVERS
/ C
OMMON
D
RIVERS
............................................................................................................ 25
8.7
G
RAPHIC
D
ISPLAY
D
ATA
RAM (GDDRAM)..................................................................................................... 26
8.8
SEG/COM D
RIVING BLOCK
............................................................................................................................... 27
8.9
P
OWER
ON
AND
OFF
SEQUENCE
........................................................................................................................ 28
8.9.1
Power ON and OFF sequence with External V
CC
...................................................................................... 28
8.9.2
Power ON and OFF sequence with Charge Pump Application................................................................. 29
8.10 C
HARGE
P
UMP
R
EGULATOR
............................................................................................................................... 30
9
10
COMMAND TABLE ................................................................................................................. 30
9.1
D
ATA
R
EAD
/ W
RITE
.......................................................................................................................................... 36
COMMAND DESCRIPTIONS ............................................................................................. 37
10.1 F
UNDAMENTAL
C
OMMAND
................................................................................................................................ 37
10.1.1 Set Lower Column Start Address for Page Addressing Mode (00h~0Fh) ................................................. 37
10.1.2 Set Higher Column Start Address for Page Addressing Mode (10h~1Fh) ................................................ 37
10.1.3 Set Memory Addressing Mode (20h).......................................................................................................... 37
10.1.4 Set Column Address (21h) ......................................................................................................................... 38
10.1.5 Set Page Address (22h).............................................................................................................................. 39
10.1.6 Set Display Start Line (40h~7Fh) .............................................................................................................. 39
10.1.7 Set Contrast Control for BANK0 (81h)...................................................................................................... 39
10.1.8 Set Segment Re-map (A0h/A1h) ................................................................................................................. 39
10.1.9 Entire Display ON (A4h/A5h) .................................................................................................................. 40
10.1.10
Set Normal/Inverse Display (A6h/A7h).................................................................................................. 40
10.1.11
Set Multiplex Ratio (A8h)....................................................................................................................... 40
10.1.12
Set Display ON/OFF (AEh/AFh) ........................................................................................................... 40
10.1.13
Set Page Start Address for Page Addressing Mode (B0h~B7h)............................................................. 40
10.1.14
Set COM Output Scan Direction (C0h/C8h).......................................................................................... 40
10.1.15
Set Display Offset (D3h) ........................................................................................................................ 40
10.1.16
Set Display Clock Divide Ratio/ Oscillator Frequency (D5h) ............................................................... 43
SSD1306
Rev 1.5
P 3/64
Aug 2010
Solomon Systech
10.1.17
Set Pre-charge Period (D9h) ................................................................................................................. 43
10.1.18
Set COM Pins Hardware Configuration (DAh)..................................................................................... 44
10.1.19
Set V
COMH
Deselect Level (DBh) ........................................................................................................... 46
10.1.20
NOP (E3h) ............................................................................................................................................. 46
10.1.21
Status register Read ............................................................................................................................... 46
10.1.22
Charge Pump Setting (8Dh)................................................................................................................... 46
10.2 G
RAPHIC
A
CCELERATION
C
OMMAND
................................................................................................................. 47
10.2.1 Horizontal Scroll Setup (26h/27h) ............................................................................................................. 47
10.2.2 Continuous Vertical and Horizontal Scroll Setup (29h/2Ah)..................................................................... 48
10.2.3 Deactivate Scroll (2Eh).............................................................................................................................. 49
10.2.4 Activate Scroll (2Fh).................................................................................................................................. 49
10.2.5 Set Vertical Scroll Area(A3h) .................................................................................................................... 49
10.3 A
DVANCE
G
RAPHIC
C
OMMAND
.......................................................................................................................... 50
10.3.1 Set Fade Out and Blinking (23h) ............................................................................................................... 50
10.3.2 Set Zoom In (D6h)...................................................................................................................................... 50
11
12
13
14
15
15.1
15.2
MAXIMUM RATINGS..........................................................................................................51
DC CHARACTERISTICS.....................................................................................................52
AC CHARACTERISTICS.....................................................................................................53
APPLICATION EXAMPLE..................................................................................................59
PACKAGE INFORMATION................................................................................................61
SSD1306TR1 D
ETAIL
D
IMENSION
..................................................................................................................... 61
SSD1306Z2 D
IE
T
RAY
I
NFORMATION
................................................................................................................ 63
Solomon Systech
Aug 2010
P 4/64
Rev 1.5
SSD1306
TABLES
T
ABLE
5-1 : SSD1306Z2 B
UMP
D
IE
P
AD
C
OORDINATES
.................................................................................................... 11
T
ABLE
6-1 : SSD1306TR1 P
IN
A
SSIGNMENT
T
ABLE
.......................................................................................................... 13
T
ABLE
7-1 : MCU B
US
I
NTERFACE
P
IN
S
ELECTION
............................................................................................................ 15
T
ABLE
8-1 : MCU
INTERFACE ASSIGNMENT UNDER DIFFERENT BUS INTERFACE MODE
...................................................... 16
T
ABLE
8-2 : C
ONTROL PINS OF
6800
INTERFACE
................................................................................................................. 16
T
ABLE
8-3 : C
ONTROL PINS OF
8080
INTERFACE
................................................................................................................. 18
T
ABLE
8-4 : C
ONTROL PINS OF
4-
WIRE
S
ERIAL INTERFACE
................................................................................................. 18
T
ABLE
8-5 : C
ONTROL PINS OF
3-
WIRE
S
ERIAL INTERFACE
................................................................................................. 19
T
ABLE
9-1: C
OMMAND
T
ABLE
........................................................................................................................................... 30
T
ABLE
9-2 : R
EAD
C
OMMAND
T
ABLE
................................................................................................................................. 36
T
ABLE
9-3 : A
DDRESS INCREMENT TABLE
(A
UTOMATIC
) ................................................................................................... 36
T
ABLE
10-1 : E
XAMPLE OF
S
ET
D
ISPLAY
O
FFSET AND
D
ISPLAY
S
TART
L
INE WITH NO
R
EMAP
.......................................... 41
T
ABLE
10-2 :E
XAMPLE OF
S
ET
D
ISPLAY
O
FFSET AND
D
ISPLAY
S
TART
L
INE WITH
R
EMAP
................................................ 42
T
ABLE
10-3 : COM P
INS
H
ARDWARE
C
ONFIGURATION
..................................................................................................... 44
T
ABLE
11-1 : M
AXIMUM
R
ATINGS
(V
OLTAGE
R
EFERENCED TO
VSS)................................................................................ 51
T
ABLE
12-1 : DC C
HARACTERISTICS
.................................................................................................................................. 52
T
ABLE
13-1 : AC C
HARACTERISTICS
.................................................................................................................................. 53
T
ABLE
13-2 : 6800-S
ERIES
MCU P
ARALLEL
I
NTERFACE
T
IMING
C
HARACTERISTICS
......................................................... 54
T
ABLE
13-3 : 8080-S
ERIES
MCU P
ARALLEL
I
NTERFACE
T
IMING
C
HARACTERISTICS
......................................................... 55
T
ABLE
13-4 : 4-
WIRE
S
ERIAL
I
NTERFACE
T
IMING
C
HARACTERISTICS
................................................................................ 56
T
ABLE
13-5 : 3-
WIRE
S
ERIAL
I
NTERFACE
T
IMING
C
HARACTERISTICS
................................................................................ 57
T
ABLE
13-6 :I
2
C I
NTERFACE
T
IMING
C
HARACTERISTICS
.................................................................................................... 58
SSD1306
Rev 1.5
P 5/64
Aug 2010
Solomon Systech
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文档解析

SSD1306是由Solomon Systech Limited开发的一款单芯片CMOS OLED/PLED驱动控制器，专为有机/聚合物发光二极管点阵图形显示系统设计。该芯片支持128x64像素的点阵显示，适用于共阴极OLED面板，具有高对比度和亮度控制功能。SSD1306内部集成了对比度控制、显示RAM和振荡器，减少了外部组件数量和功耗。它提供了256级亮度控制，支持多种MCU接口，包括6800/8000系列兼容的并行接口、I2C接口和串行外设接口。此外，SSD1306还具备硬件选择的多种显示功能，如屏幕连续滚动、内部充电泵调节器、可编程帧率和复用比、行列重映射以及片内振荡器。其工作温度范围广泛，从-40°C到85°C，适用于多种便携式应用，如手机子显示、MP3播放器和计算器等。产品规格和信息如有变更，不另行通知，用户可访问Solomon Systech官网获取最新信息。

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