1.0 INTRODUCTION .............................................52.0 ARCHITECTURE AND IMPLEMENTATION ...52.1 16-Mbyte Memory Pages, CIS and MemoryArray Decoder Logic....................................52.2 Selection and Command Logic.....................72.3 Address Extension Registers .......................72.4 Lower 24 Address Line Buffers ....................82.5 Data Transceiver..........................................83.0 CARD INFORMATION STRUCTURE (CIS) ....84.0 GENERAL DESIGN TRADEOFFCONSIDERATIONS .....................................105.0 GENERAL SYSTEM DESIGNCONSIDERATIONS .....................................116.0 SUMMARY ....................................................14APPENDIX A: Ordering Information .................15FIGURESFigure 1. > 64-Mbyte PC Card with 16-MbyteMemory Paging ..................................6
猜您喜欢
推荐内容
开源项目推荐 更多
热门活动
热门器件
用户搜过
随便看看
热门下载
热门文章
热门标签
评论