The MAX3636 is a highly flexible, precision phase-lockedloop (PLL) clock generator optimized for the next generationof network equipment that demands low-jitterclock generation and distribution for robust high-speeddata transmission. The device features subpicosecondjitter generation, excellent power-supply noise rejection,and pin-programmable LVDS/LVPECL output interfaces.The MAX3636 provides nine differential outputs and oneLVCMOS output, divided into three banks. The frequencyand output interface of each output bank can be individuallyprogrammed, making this device an ideal replacementfor multiple crystal oscillators and clock distributionICs on a system board, saving cost and space.
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