MSP430x13x, MSP430x14x
MIXED SIGNAL MICROCONTROLLER
SLAS272D – JULY 2000 – REVISED MARCH 2003
D
Low Supply-Voltage Range, 1.8 V . . . 3.6 V
D
Ultralow-Power Consumption:
D
Serial Communication Interface (USART),
Functions as Asynchronous UART or
Synchronous SPI Interface
– Two USARTs (USART0, USART1) —
MSP430x14x Devices
– One USART (USART0) — MSP430x13x
Devices
Family Members Include:
– MSP430F133:
8KB+256B Flash Memory,
256B RAM
– MSP430F135:
16KB+256B Flash Memory,
512B RAM
– MSP430F147:
32KB+256B Flash Memory,
1KB RAM
– MSP430F148:
48KB+256B Flash Memory,
2KB RAM
– MSP430F149:
60KB+256B Flash Memory,
2KB RAM
Available in 64-Pin Quad Flat Pack (QFP)
For Complete Module Descriptions, See the
MSP430x1xx Family User’s Guide,
Literature Number SLAU049
D
D
D
D
D
D
D
D
– Active Mode: 280
µA
at 1 MHz, 2.2V
– Standby Mode: 1.6
µA
– Off Mode (RAM Retention): 0.1
µA
Five Power-Saving Modes
Wake-Up From Standby Mode in 6
µs
16-Bit RISC Architecture,
125-ns Instruction Cycle Time
12-Bit A/D Converter With Internal
Reference, Sample-and-Hold and Autoscan
Feature
16-Bit Timer_B With Seven
Capture/Compare-With-Shadow Registers
16-Bit Timer_A With Three
Capture/Compare Registers
On-Chip Comparator
Serial Onboard Programming,
No External Programming Voltage Needed
Programmable Code Protection by Security
Fuse
D
D
D
description
The Texas Instruments MSP430 family of ultralow-power microcontrollers consist of several devices featuring
different sets of peripherals targeted for various applications. The architecture, combined with five low power
modes is optimized to achieve extended battery life in portable measurement applications. The device features
a powerful 16-bit RISC CPU, 16-bit registers, and constant generators that attribute to maximum code efficiency.
The digitally controlled oscillator (DCO) allows wake-up from low-power modes to active mode in less than 6
µs.
The MSP430x13x and the MSP430x14x series are microcontroller configurations with two built-in 16-bit timers,
a fast 12-bit A/D converter, one or two universal serial synchronous/asynchronous communication interfaces
(USART), and 48 I/O pins.
Typical applications include sensor systems that capture analog signals, convert them to digital values, and
process and transmit the data to a host system. The timers make the configurations ideal for industrial control
applications such as ripple counters, digital motor control, EE-meters, hand-held meters, etc. The hardware
multiplier enhances the performance and offers a broad code and hardware-compatible family solution.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
2000 – 2003, Texas Instruments Incorporated
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
1
MSP430x13x, MSP430x14x
MIXED SIGNAL MICROCONTROLLER
SLAS272D – JULY 2000 – REVISED MARCH 2003
AVAILABLE OPTIONS
PACKAGED DEVICES
TA
PLASTIC 64-PIN QFP
(PM)
MSP430F133IPM
MSP430F135IPM
MSP430F147IPM
MSP430F148IPM
MSP430F149IPM
–40°C to 85°C
pin designation, MSP430F133, MSP430F135
PM PACKAGE
(TOP VIEW)
DV
CC
P6.3/A3
P6.4/A4
P6.5/A5
P6.6/A6
P6.7/A7
V
REF+
XIN
XOUT/TCLK
Ve
REF+
V
REF–
/Ve
REF–
P1.0/TACLK
P1.1/TA0
P1.2/TA1
P1.3/TA2
P1.4/SMCLK
1
2
3
4
5
6
7
8
9
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
AV
CC
DV
SS
AV
SS
P6.2/A2
P6.1/A1
P6.0/A0
RST/NMI
TCK
TMS
TDI
TDO/TDI
XT2IN
XT2OUT
P5.7/TBoutH
P5.6/ACLK
P5.5/SMCLK
P5.4/MCLK
P5.3
P5.2
P5.1
P5.0
P4.7/TBCLK
P4.6
P4.5
P4.4
P4.3
P4.2/TB2
P4.1/TB1
P4.0/TB0
P3.7
P3.6
P3.5/URXD0
10
11
12
13
14
15
33
16
1718 19 20 21 22 23 24 25 26 27 28 29 30 31 32
2
P1.5/TA0
P1.6/TA1
P1.7/TA2
P2.0/ACLK
P2.1/TAINCLK
P2.2/CAOUT/TA0
P2.3/CA0/TA1
P2.4/CA1/TA2
P2.5/Rosc
P2.6/ADC12CLK
P2.7/TA0
P3.0/STE0
P3.1/SIMO0
P3.2/SOMI0
P3.3/UCLK0
P3.4/UTXD0
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
MSP430x13x, MSP430x14x
MIXED SIGNAL MICROCONTROLLER
SLAS272D – JULY 2000 – REVISED MARCH 2003
pin designation, MSP430F147, MSP430F148, MSP430F149
PM PACKAGE
(TOP VIEW)
DV
CC
P6.3/A3
P6.4/A4
P6.5/A5
P6.6/A6
P6.7/A7
V
REF+
XIN
XOUT/TCLK
Ve
REF+
V
REF–
/Ve
REF–
P1.0/TACLK
P1.1/TA0
P1.2/TA1
P1.3/TA2
P1.4/SMCLK
1
2
3
4
5
6
7
8
9
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
P5.6/ACLK
P5.5/SMCLK
P5.4/MCLK
P5.3/UCLK1
P5.2/SOMI1
P5.1/SIMO1
P5.0/STE1
P4.7/TBCLK
P4.6/TB6
P4.5/TB5
P4.4/TB4
P4.3/TB3
P4.2/TB2
P4.1/TB1
P4.0/TB0
P3.7/URXD1
P3.6/UTXD1
P3.5/URXD0
10
11
12
13
14
15
33
16
1718 19 20 21 22 23 24 25 26 27 28 29 30 31 32
P1.5/TA0
P1.6/TA1
P1.7/TA2
P2.0/ACLK
P2.1/TAINCLK
P2.2/CAOUT/TA0
P2.3/CA0/TA1
P2.4/CA1/TA2
P2.5/Rosc
P2.6/ADC12CLK
P2.7/TA0
P3.0/STE0
P3.1/SIMO0
P3.2/SOMI0
P3.3/UCLK0
P3.4/UTXD0
AV
CC
DV
SS
AV
SS
P6.2/A2
P6.1/A1
P6.0/A0
RST/NMI
TCK
TMS
TDI
TDO/TDI
XT2IN
XT2OUT
P5.7/TBoutH
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
3
MSP430x13x, MSP430x14x
MIXED SIGNAL MICROCONTROLLER
SLAS272D – JULY 2000 – REVISED MARCH 2003
functional block diagrams
MSP430x13x
XIN
XOUT/TCLK
DVCC
DVSS
AVCC
AVSS RST/NMI
P1
P2
P3
P4
P5
P6
Rosc
XT2IN
XT2OUT
Oscillator
System
Clock
ACLK
SMCLK
16 kB Flash
8 kB Flash
512B RAM
256B RAM
12 Bit ADC
8 Channels
<10
µs
Conv.
I/O Port 1/2
16 I/Os, With
Interrupt
Capability
I/O Port 3/4
16 I/Os
I/O Port 5
8 I/Os
I/O Port 6
8 I/Os
MCLK
Test
JTAG
CPU
Emulation
Module
Incl. 16 Reg.
MAB, 16 Bit
MAB, 4 Bit
MCB
MDB, 16 Bit
Bus
Conv
MDB, 8 Bit
4
TMS
TCK
TDI
TDO/TDI
ACLK
SMCLK
Watchdog
Timer
15 / 16 Bit
Timer_B3
3 CC-Reg.
Shadow
Reg.
Timer_A3
3 CC-Reg.
Power
on
Reset
Comparator
A
USART0
UART Mode
SPI Mode
MSP430x14x
XIN
XOUT/TCLK
DVCC
DVSS
AVCC
AVSS RST/NMI
P1
P2
P3
P4
P5
P6
Rosc
XT2IN
XT2OUT
Oscillator
System
Clock
ACLK
SMCLK
60 kB Flash
48 kB Flash
32 kB Flash
2 kB RAM
2 kB RAM
1 kB RAM
12 Bit ADC
8 Channels
<10
µs
Conv.
I/O Port 1/2
16 I/Os, With
Interrupt
Capability
I/O Port 3/4
16 I/Os
I/O Port 5
8 I/Os
I/O Port 6
8 I/Os
MCLK
Test
JTAG
CPU
Emulation
Module
Incl. 16 Reg.
MAB, 16 Bit
MAB, 4 Bit
MCB
MDB, 16 Bit
Bus
Conv
MDB, 8 Bit
4
TMS
TCK
TDI
TDO/TDI
Multiply
MPY, MPYS
MAC,MACS
8×8 Bit
8×16 Bit
16×8 Bit
16×16 Bit
Watchdog
Timer
ACLK
SMCLK
15 / 16 Bit
Timer_B7
7 CC-Reg.
Shadow
Reg.
Timer_A3
3 CC-Reg.
Power
on
Reset
Comparator
A
USART0
UART Mode
SPI Mode
USART1
UART Mode
SPI Mode
4
POST OFFICE BOX 655303
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DALLAS, TEXAS 75265
MSP430x13x, MSP430x14x
MIXED SIGNAL MICROCONTROLLER
SLAS272D – JULY 2000 – REVISED MARCH 2003
Terminal Functions
TERMINAL
NAME
AVCC
AVSS
DVCC
DVSS
P1.0/TACLK
P1.1/TA0
P1.2/TA1
P1.3/TA2
P1.4/SMCLK
P1.5/TA0
P1.6/TA1
P1.7/TA2
P2.0/ACLK
P2.1/TAINCLK
P2.2/CAOUT/TA0
P2.3/CA0/TA1
P2.4/CA1/TA2
P2.5/Rosc
P2.6/ADC12CLK
P2.7/TA0
P3.0/STE0
P3.1/SIMO0
P3.2/SOMI0
P3.3/UCLK0
P3.4/UTXD0
P3.5/URXD0
P3.6/UTXD1†
P3.7/URXD1†
P4.0/TB0
P4.1/TB1
P4.2/TB2
P4.3/TB3†
P4.4/TB4†
P4.5/TB5†
P4.6/TB6†
P4.7/TBCLK
P5.0/STE1†
P5.1/SIMO1†
P5.2/SOMI1†
P5.3/UCLK1†
P5.4/MCLK
P5.5/SMCLK
† 14x devices only
NO.
64
62
1
63
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
DESCRIPTION
Analog supply voltage, positive terminal. Supplies only the analog portion of the analog-to-digital converter.
Analog supply voltage, negative terminal. Supplies only the analog portion of the analog-to-digital converter.
Digital supply voltage, positive terminal. Supplies all digital parts.
Digital supply voltage, negative terminal. Supplies all digital parts.
General digital I/O pin/Timer_A, clock signal TACLK input
General digital I/O pin/Timer_A, capture: CCI0A input, compare: Out0 output
General digital I/O pin/Timer_A, capture: CCI1A input, compare: Out1 output
General digital I/O pin/Timer_A, capture: CCI2A input, compare: Out2 output
General digital I/O pin/SMCLK signal output
General digital I/O pin/Timer_A, compare: Out0 output
General digital I/O pin/Timer_A, compare: Out1 output
General digital I/O pin/Timer_A, compare: Out2 output/
General digital I/O pin/ACLK output
General digital I/O pin/Timer_A, clock signal at INCLK
General digital I/O pin/Timer_A, capture: CCI0B input/Comparator_A output
General digital I/O pin/Timer_A, compare: Out1 output/Comparator_A input
General digital I/O pin/Timer_A, compare: Out2 output/Comparator_A input
General-purpose digital I/O pin, input for external resistor defining the DCO nominal frequency
General digital I/O pin, conversion clock – 12-bit ADC
General digital I/O pin/Timer_A, compare: Out0 output
General digital I/O, slave transmit enable – USART0/SPI mode
General digital I/O, slave in/master out of USART0/SPI mode
General digital I/O, slave out/master in of USART0/SPI mode
General digital I/O, external clock input – USART0/UART or SPI mode, clock output – USART0/SPI mode
General digital I/O, transmit data out – USART0/UART mode
General digital I/O, receive data in – USART0/UART mode
General digital I/O, transmit data out – USART1/UART mode
General digital I/O, receive data in – USART1/UART mode
General-purpose digital I/O, capture I/P or PWM output port – Timer_B7 CCR0
General-purpose digital I/O, capture I/P or PWM output port – Timer_B7 CCR1
General-purpose digital I/O, capture I/P or PWM output port – Timer_B7 CCR2
General-purpose digital I/O, capture I/P or PWM output port – Timer_B7 CCR3
General-purpose digital I/O, capture I/P or PWM output port – Timer_B7 CCR4
General-purpose digital I/O, capture I/P or PWM output port – Timer_B7 CCR5
General-purpose digital I/O, capture I/P or PWM output port – Timer_B7 CCR6
General-purpose digital I/O, input clock TBCLK – Timer_B7
General-purpose digital I/O, slave transmit enable – USART1/SPI mode
General-purpose digital I/O slave in/master out of USART1/SPI mode
General-purpose digital I/O, slave out/master in of USART1/SPI mode
General-purpose digital I/O, external clock input – USART1/UART or SPI mode, clock output – USART1/SPI
mode
General-purpose digital I/O, main system clock MCLK output
General-purpose digital I/O, submain system clock SMCLK output
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