LVDS Owner’s Manual
A General Design Guide for National’s
Low Voltage Differential Signaling (LVDS)
and Bus LVDS Products
Moving Info
with
LVDS
2
nd
Edition
Revision 2.0 — Spring 2000
LVDS Owner’s Manual
Table of
Contents
CHAPTER 1.
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Introduction to LVDS
CHAPTER 2.
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
LVDS Advantages
CHAPTER 3.
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Selecting an LVDS Device /LVDS Families
CHAPTER 4.
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Designing with LVDS
CHAPTER 5.
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Cables, Connectors and Performance Testing
CHAPTER 6.
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Backplane Design Considerations and Bus LVDS
CHAPTER 7.
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
LVDS Evaluation Kits
CHAPTER 8
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
LVDS Reference
CHAPTER 9.
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
National’s LVDS Website
APPENDIX. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
Glossary
Index
Worldwide Sales Offices
LVDS Owner’s Manual
Introduction to LVDS
Chapter 1
1.0.0 INTRODUCTION TO LVDS
LVDS stands for Low Voltage Differential Signaling. It is a way to communicate data using a very low
voltage swing (about 350mV) differentially over two PCB traces or a balanced cable.
1.1.0 THE TREND TO LVDS
Consumers are demanding more realistic, visual information in the office and in the home. This is driving
the need to move video, 3-D graphics and photo-realistic image data from camera to PCs and printers
through LAN, phone, and satellite systems to home set top boxes and digital VCRs. Solutions exist
today to move this high-speed digital data both very short and very long distances: on a printed circuit
board (PCB) and across fiber or satellite networks. Moving this data from board-to-board or box-to-box,
however, requires an extremely high-performance solution that consumes a minimum of power, generates
little noise (must meet increasingly stringent FCC / CISPR EMI requirements), is relatively immune to noise
and is inexpensive. Unfortunately existing solutions are a compromise of these four basic ingredients:
performance, power, noise, and cost.
1.2.0 GETTING SPEED WITH LOW NOISE AND LOW POWER
LVDS is a low swing, differential signaling technology which allows single channel data transmission at
hundreds or even thousands of Megabits per second (Mbps). Its low swing and current-mode driver out-
puts create low noise and provide very low power consumption across frequency.
1.2.1 How LVDS Works
Driver
Current
Source
≈3.5mA
≈350mV
100Ω
Receiver
Simplified Diagram of LVDS Driver and Receiver Connected via 100Ω Differential Impedance Media
National’s LVDS outputs consist of a current source (nominal 3.5mA) which drives the differential pair line.
The basic receiver has high DC input impedance, so the majority of driver current flows across the 100Ω
termination resistor generating about 350mV across the receiver inputs. When the driver switches, it
changes the direction of current flow across the resistor, thereby creating a valid "one" or "zero" logic state.
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LVDS Owner’s Manual
1
1.2.2 Why Low Swing Differential?
The differential data transmission method used in LVDS is less susceptible to common-mode noise than
single-ended schemes. Differential transmission uses two wires with opposite current / voltage swings
instead of the one wire used in single-ended methods to convey data information. The advantage of the
differential approach is that if noise is coupled onto the two wires as common-mode (the noise appears
on both lines equally) and is thus rejected by the receivers which looks at only the difference between
the two signals. The differential signals also tend to radiate less noise than single-ended signals due to
the canceling of magnetic fields. And, the current-mode driver is not prone to ringing and switching
spikes, further reducing noise.
Because differential technologies such as LVDS reduce concerns about noise, they can use lower signal
voltage swings. This advantage is crucial, because it is impossible to raise data rates and lower power
consumption without using low voltage swings. The low swing nature of the driver means data can be
switched very quickly. Since the driver is also current-mode, very low — almost flat — power consump-
tion across frequency is obtained. Switching spikes in the driver are very small, so that I
CC
does not
increase exponentially as switching frequency is increased. Also, the power consumed by the load
(3.5mA x 350mV = 1.2mW) is very small in magnitude.
1.2.3 The LVDS Standard
LVDS is currently standardized by two different standards:
TIA / EIA (Telecommunications Industry Association/ Electronic Industries Association)
• ANSI/ TIA/ EIA-644 (LVDS) Standard
IEEE (Institute for Electrical and Electronics Engineering)
• IEEE 1596.3
The generic (multi-application) LVDS standard,
ANSI/ TIA/ EIA-644,
began in the TIA Data Transmission
Interface committee TR30.2. The ANSI/ TIA/ EIA standard defines driver output and receiver input charac-
teristics, thus it is an electrical-only standard. It does not include functional specifications, protocols or
even complete cable characteristics since these are application dependent. ANSI/ TIA/ EIA-644 is intended
to be reference by other standards that specify the complete interface (connectors, protocol, etc.). This
allows it to be easily adopted into many applications.
ANSI/ TIA/ EIA-644 (LVDS) Standard
Note: Actual datasheet specifications may be significantly better.
Parameter
V
OD
V
OS
∆V
OD
∆V
OS
|
SA
, |
SB
t
r
/t
f
|
IN
V
TH
V
IN
Description
Differential Output Voltage
Offset Voltage
|Change to V
OD
|
|Change to V
OS
|
Short Circuit Current
Output Rise/ Fall Times (≥200Mbps)
Output Rise/ Fall Times (<200Mbps)
Input Current
|Threshold Voltage|
Input Voltage Range
Min
247
1.125
Max
454
1.375
50
50
24
1.5
30% of t
ui
†
20
±100
2.4
Units
mV
V
|mV|
|mV|
|mA|
ns
ns
|µA|
mV
V
0.26
0.26
0
† tui is unit interval (i.e. bit width).
The ANSI/ TIA/ EIA standard notes a recommend a maximum data rate of 655Mbps (based on one set of
assumptions) and it also provides a theoretical maximum of 1.923Gbps based on a loss-less medium.
This allows the referencing standard to specify the maximum data rate required depending upon
required signal quality and media length/type. The standard also covers minimum media specifications,
failsafe operation of the receiver under fault conditions, and other configuration issues such as multiple
2
www.national.com/appinfo/lvds/
receiver operation. The ANSI/ TIA/ EIA-644 standard was approved in November 1995. National
Semiconductor held the editor position for this standard and chairs the sub committee responsible for
electrical TIA interface standards. Currently the 644 spec is being revised to include additional informa-
tion about multiple receiver operation. The revised (to be known as TIA-644-A) is expected to be balloted
upon in calendar year 2000.
The other LVDS standard is from an IEEE project. This standard came out of an effort to develop a stan-
dard for purposes such as linking processors in a multiprocessing system or grouping workstations into
a cluster. This Scalable Coherent Interface (SCI) program originally specified a differential ECL interface
that provided the high data rates required but did not address power concerns or integration.
The low-power SCI-LVDS standard was later defined as a subset of SCI and is specified in the IEEE 1596.3
standard. The SCI-LVDS standard also specifies signaling levels (electrical specifications) similar to the
ANSI/ TIA/ EIA-644 standard for the high-speed/ low-power SCI physical layer interface. The standard also
defines the encoding for packet switching used in SCI data transfers. The IEEE 1596.3 standard was
approved in March 1996. National Semiconductor chaired this standardization committee.
In the interest of promoting a wider standard, no specific process technology, medium, or power supply
voltages are defined by either standard. This means that LVDS can be implemented in CMOS, GaAs or
other applicable technologies, migrate from 5V to 3.3V to sub-3V supplies, and transmit over PCB traces
or cable, thereby serving a broad range of applications in many industry segments.
1.2.4 A Quick Comparison between Differential Signaling Technologies
Parameter
Differential Driver Output Voltage
Receiver Input Threshold
Data Rate
Parameter
Supply Current Quad Driver (no load, static)
Supply Current Quad Receiver (no load, static)
Propagation Delay of Driver
Propagation Delay of Receiver
Pulse Skew (Driver or Receiver)
*LVDS devices noted are DS90LV047A
/
048A
RS-422
±2 to ±5 V
±200mV
<30Mbps
RS-422
60mA (max)
23mA (max)
11ns (max)
30ns (max)
N/ A
PECL
±600-1000mV
±200-300mV
>400Mbps
PECL
32-65mA (max)
40mA (max)
4.5ns (max)
7.0ns (max)
500ps (max)
LVDS
±250-450mV
±100mV
>400Mbps
LVDS*
8.0mA
15mA (max)
1.7ns (max)
2.7ns (max)
400ps (max)
The chart above compares basic LVDS signaling levels with those of PECL and shows that LVDS has half
the voltage swing of PECL. LVDS swings are one-tenth of RS-422 and also traditional TTL/ CMOS levels.
Another voltage characteristic of LVDS is that the drivers and receivers do not depend on a specific
power supply, such as 5V. Therefore, LVDS has an easy migration path to lower supply voltages such as
3.3V or even 2.5V, while still maintaining the same signaling levels and performance. In contrast, tech-
nologies such as ECL or PECL have a greater dependence on the supply voltage, which make it difficult
to migrate systems utilizing these technologies to lower supply voltages.
1.2.5 Easy Termination
Whether the LVDS transmission medium consists of a cable or controlled impedance traces on a printed circuit
board, the transmission medium must be terminated to its characteristic differential impedance to complete the
current loop and terminate the high-speed (edge rates) signals. If the medium is not properly terminated,
signals reflect from the end of the cable or trace and may interfere with succeeding signals. Proper termination
also reduces unwanted electromagnetic emissions and provides the optimum signal quality.
To prevent reflections, LVDS requires a terminating resistor that is matched to the actual cable or PCB
traces differential impedance. Commonly 100Ω media and terminations are employed. This resistor
completes the current loop and properly terminates the signal. This resistor is placed across the differ-
ential signal lines as close as possible to the receiver input.
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LVDS Owner’s Manual
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