热搜关键词: 电路基础ADC数字信号处理封装库PLC

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飞思卡尔资料

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标签: 低功耗

低功耗

飞思卡尔

飞思卡尔

飞思卡尔KL系列低功耗单片机

Freescale Semiconductor, Inc.
Data Sheet: Technical Data
Document Number: KL02P32M48SF0
Rev 4 08/2014
Kinetis KL02 32 KB Flash
48 MHz Cortex-M0+ Based Microcontroller
Designed with efficiency in mind. Features a size efficient, ultra-
small package, energy efficient ARM Cortex-M0+ 32-bit
performance. Shares the comprehensive enablement and
scalability of the Kinetis family.
This product offers:
• Run power consumption down to 36 μA/MHz in very low
power run mode
• Static power consumption down to 2 μA with full state
retention and 4 μs wakeup
• Ultra-efficient Cortex-M0+ processor running up to 48 MHz
with industry leading throughput
• Memory option is up to 32 KB flash and 4 KB RAM
• Energy-saving architecture is optimized for low power with
90nm TFS technology, clock and power gating techniques,
and zero wait state flash memory controller
MKL02ZxxVFG4
MKL02ZxxVFK4
MKL02ZxxVFM4
16-pin QFN (FG)
3 x 3 x 0.65 Pitch 0.5
mm
24-pin QFN (FK)
4 x 4 x 1 Pitch 0.5 mm
32-pin QFN (FM)
5 x 5 x 1 Pitch 0.5 mm
Performance
• 48 MHz ARM
®
Cortex
®
-M0+ core
Memories and memory interfaces
• Up to 32 KB program flash memory
• Up to 4 KB SRAM
System peripherals
• Nine low-power modes to provide power optimization
based on application requirements
• COP Software watchdog
• SWD debug interface and Micro Trace Buffer
• Bit Manipulation Engine
Clocks
• 32 kHz to 40 kHz crystal oscillator
• Multi-purpose clock source
• 1 kHz LPO clock
Operating Characteristics
• Voltage range: 1.71 to 3.6 V
• Flash write voltage range: 1.71 to 3.6 V
• Temperature range (ambient): -40 to 105°C
Human-machine interface
• Up to 28 general-purpose input/output (GPIO)
Communication interfaces
• One 8-bit SPI module
• One low power UART module
• Two I2C module
Analog Modules
• 12-bit SAR ADC
• Analog comparator (CMP) containing a 6-bit DAC
and programmable reference input
Timers
• Two 2-channel Timer/PWM modules
• 16-bit low-power timer (LPTMR)
Security and integrity modules
• 80-bit unique identification number per chip
Freescale reserves the right to change the detail specifications as may be required to
permit improvements in the design of its products. © 2012–2014 Freescale
Semiconductor, Inc. All rights reserved.
Ordering Information
Part Number
Flash (KB)
MKL02Z8VFG4
MKL02Z16VFG4
MKL02Z32VFG4
MKL02Z16VFK4
MKL02Z32VFK4
MKL02Z16VFM4
MKL02Z32VFM4
8
16
32
16
32
16
32
Memory
SRAM (KB)
1
2
4
2
4
2
4
14
14
14
22
22
28
28
Maximum number of I\O's
Related Resources
Type
Selector Guide
Product Brief
Reference
Manual
Data Sheet
Chip Errata
Package
drawing
Description
The Freescale Solution Advisor is a web-based tool that features
interactive application wizards and a dynamic product selector.
Resource
Solution Advisor
The Product Brief contains concise overview/summary information to KL0XPB
1
enable quick evaluation of a device for design suitability.
The Reference Manual contains a comprehensive description of the
structure and function (operation) of a device.
The Data Sheet includes electrical characteristics and signal
connections.
The chip mask set Errata provides additional or corrective
information for a particular device mask set.
Package dimensions are provided in package drawings.
KL02P32M48SF0RM
1
KL02P32M48SF0
1
KINETIS_L_xN33H
2
QFN 16-pin: 98ASA00525D
1
QFN 24-pin: 98ASA00474D
1
QFN 32-pin: 98ASA00473D
1
1. To find the associated resource, go to
http://www.freescale.com
and perform a search using this term.
2. To find the associated resource, go to
http://www.freescale.com
and perform a search using this term with the “x”
replaced by the revision of the device you are using.
Figure 1
shows the functional modules in the chip.
2
Freescale Semiconductor, Inc.
Kinetis KL02 32 KB Flash, Rev4 08/2014.
Kinetis KL02 Family
ARM Cortex-M0+
Core
Debug
interfaces
Interrupt
controller
System
Internal
watchdog
BME
Memories and
Memory Interfaces
Program
flash
Clocks
Frequency-
locked loop
Low
frequency
oscillator
Internal
reference
clocks
RAM
MTB
Security
and Integrity
Internal
watchdog
Analog
Timers
Timers
2x2ch
Communication
Interfaces
I
2
C
x2
Low power
UART
x1
SPI
x1
Human-Machine
Interface (HMI)
GPIOs
with
interrupt
12-bit ADC
x1
Analog
comparator
x1
6-bit DAC
Low Power
Timer
Figure 1. Functional block diagram
Kinetis KL02 32 KB Flash, Rev4 08/2014.
3
Freescale Semiconductor, Inc.
Table of Contents
1 Ratings.................................................................................. 5
1.1 Thermal handling ratings............................................... 5
1.2 Moisture handling ratings...............................................5
1.3 ESD handling ratings..................................................... 5
1.4 Voltage and current operating ratings............................5
2 General................................................................................. 6
2.1 AC electrical characteristics...........................................6
2.2 Nonswitching electrical specifications............................6
2.2.1 Voltage and current operating requirements..... 7
2.2.2 LVD and POR operating requirements..............7
2.2.3 Voltage and current operating behaviors...........8
2.2.4 Power mode transition operating behaviors...... 9
2.2.5 Power consumption operating behaviors.......... 10
2.2.6 EMC radiated emissions operating behaviors... 15
2.2.7 Designing with radiated emissions in mind........16
2.2.8 Capacitance attributes.......................................16
2.3 Switching specifications.................................................16
2.3.1 Device clock specifications................................16
2.3.2 General switching specifications....................... 17
2.4 Thermal specifications................................................... 17
2.4.1 Thermal operating requirements....................... 17
2.4.2 Thermal attributes..............................................17
3 Peripheral operating requirements and behaviors................ 18
3.1 Core modules................................................................ 18
3.1.1 SWD electricals ................................................ 18
3.2 System modules............................................................ 20
3.3 Clock modules............................................................... 20
3.3.1 MCG specifications............................................20
3.3.2 Oscillator electrical specifications...................... 21
3.4 Memories and memory interfaces................................. 22
3.4.1 Flash electrical specifications............................ 22
3.5 Security and integrity modules.......................................24
3.6 Analog............................................................................24
3.6.1
3.6.2
ADC electrical specifications............................. 24
CMP and 6-bit DAC electrical specifications..... 27
3.7 Timers............................................................................29
3.8 Communication interfaces............................................. 29
3.8.1 SPI switching specifications.............................. 29
3.8.2 Inter-Integrated Circuit Interface (I2C) timing.... 33
3.8.3 UART.................................................................35
Dimensions........................................................................... 35
4.1 Obtaining package dimensions......................................35
Pinout.................................................................................... 35
5.1 KL02 signal multiplexing and pin assignments.............. 35
5.2 KL02 pinouts..................................................................37
Ordering parts....................................................................... 39
6.1 Determining valid orderable parts..................................39
Part identification...................................................................39
7.1 Description.....................................................................39
7.2 Format........................................................................... 40
7.3 Fields............................................................................. 40
7.4 Example.........................................................................40
Small package marking.........................................................41
Terminology and guidelines.................................................. 41
9.1 Definition: Operating requirement..................................41
9.2 Definition: Operating behavior....................................... 42
9.3 Definition: Attribute........................................................ 42
9.4 Definition: Rating........................................................... 42
9.5 Result of exceeding a rating.......................................... 43
9.6 Relationship between ratings and operating
requirements..................................................................43
4
5
6
7
8
9
9.7 Guidelines for ratings and operating requirements........44
9.8 Definition: Typical value.................................................44
9.9 Typical value conditions.................................................45
10 Revision history.....................................................................45
4
Freescale Semiconductor, Inc.
Kinetis KL02 32 KB Flash, Rev4 08/2014.
Ratings
1 Ratings
1.1 Thermal handling ratings
Table 1. Thermal handling ratings
Symbol
T
STG
T
SDR
Description
Storage temperature
Solder temperature, lead-free
Min.
–55
Max.
150
260
Unit
°C
°C
Notes
1
2
1. Determined according to JEDEC Standard JESD22-A103,
High Temperature Storage Life.
2. Determined according to IPC/JEDEC Standard J-STD-020,
Moisture/Reflow Sensitivity Classification for Nonhermetic
Solid State Surface Mount Devices.
1.2 Moisture handling ratings
Table 2. Moisture handling ratings
Symbol
MSL
Description
Moisture sensitivity level
Min.
Max.
3
Unit
Notes
1
1. Determined according to IPC/JEDEC Standard J-STD-020,
Moisture/Reflow Sensitivity Classification for Nonhermetic
Solid State Surface Mount Devices.
1.3 ESD handling ratings
Table 3. ESD handling ratings
Symbol
V
HBM
V
CDM
I
LAT
Description
Electrostatic discharge voltage, human body model
Electrostatic discharge voltage, charged-device
model
Latch-up current at ambient temperature of 105 °C
Min.
–2000
–500
–100
Max.
+2000
+500
+100
Unit
V
V
mA
Notes
1
2
3
1. Determined according to JEDEC Standard JESD22-A114,
Electrostatic Discharge (ESD) Sensitivity Testing Human
Body Model (HBM).
2. Determined according to JEDEC Standard JESD22-C101,
Field-Induced Charged-Device Model Test Method for
Electrostatic-Discharge-Withstand Thresholds of Microelectronic Components.
3. Determined according to JEDEC Standard JESD78,
IC Latch-Up Test.
Kinetis KL02 32 KB Flash, Rev4 08/2014.
5
Freescale Semiconductor, Inc.
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