The DS92LV18 Serializer/Deserializer (SERDES) pair transparentlytranslates a 18–bit parallel bus into a BLVDS serialstream with embedded clock information. This single serialstream simplifies transferring a 18-bit, or less, bus over PCBtraces and cables by eliminating the skew problems betweenparallel data and clock paths. It saves system cost by narrowingdata paths that in turn reduce PCB layers, cablewidth, and connector size and pins.
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