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D C B A 5 4 3 2 1 ALTERA Cyclone V SoC Development Education Board DE1SoC PAGE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 CONTENT Cover Page Block Diagram FPGA BANK 3 BANK 4 FPGA BANK 5 BANK 6 FPGA BANK 7 BANK 8 FPGA Clocks GND FPGA Configuration FPGA Decoupling FPGA Power USB Blaster II JTAG Chain GPIO 0 GPIO 1 SDRAM HPS QSPI Flash HPS DDR3 SDRAM PAGE 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 CONTENT ADV7123 VGA ADV7180 Video Decoder Audio CODEC 7Segment Display LED FPGA BUTTON Switch ADC PS2 IR T......
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