This book is a comprehensive guide to new DFT methods that will show the readers how to design a testable and quality product, drive down test cost, improve product quality and yield, and speed up time-to-market and time-to-volume.
· Most up-to-date coverage of design for testability. · Coverage of industry practices commonly found in commercial DFT tools but not discussed in other books. · Numerous, practical examples in each chapter illustrating basicVLSI test principles and DFT architectures. · Lecture slides and exercise solutions for all chapters are now available. · Instructors are also eligible for downloading PPT slide files and MSWORD solutions files from the manual website.
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In Praise of
VLSI Test Principles and Architectures: Design for Testability
Testing techniques for VLSI circuits are today facing many exciting and complex challenges.
In the era of large systems embedded in a single system-on-chip (SOC) and fabricated in
continuously shrinking technologies, it is important to ensure correct behavior of the whole
system. Electronic design and test engineers of today have to deal with these complex and
heterogeneous systems (digital, mixed-signal, memory), but few have the possibility to study
the whole field in a detailed and deep way. This book provides an extremely broad knowledge
of the discipline, covering the fundamentals in detail, as well as the most recent and advanced
concepts.
It is a textbook for teaching the basics of fault simulation, ATPG, memory testing, DFT and
BIST. However, it is also a complete testability guide for an engineer who wants to learn the
latest advances in DFT for soft error protection, logic built-in self-test (BIST) for at-speed
testing, DRAM BIST, test compression, MEMS testing, FPGA testing, RF testing, etc.
Michel Renovell,
Laboratoire d’Informatique, de Robotique et de Micro´ lectronique de
e
Montpellier (LIRMM), Montpellier, France
This book combines in a unique way insight into industry practices commonly found in
commercial DFT tools but not discussed in textbooks, and a sound treatment of the technical
fundamentals. The comprehensive review of future test technology trends, including self-
repair, soft error protection, MEMS testing, and RF testing, leads students and researchers
to advanced DFT research.
Hans-Joachim Wunderlich,
University of Stuttgart, Germany
Recent advances in semiconductor manufacturing have made design for testability (DFT)
an essential part of nanometer designs. The lack of an up-to-date DFT textbook that covers
the most recent DFT techniques, such as at-speed scan testing, logic built-in self-test (BIST),
test compression, memory built-in self-repair (BISR), and future test technology trends, has
created problems for students, instructors, researchers, and practitioners who need to master
modern DFT technologies. I am pleased to find a DFT textbook of this comprehensiveness
that can serve both academic and professional needs.
Andre Ivanov,
University of British Columbia, Canada
This is the most recent book covering all aspects of digital systems testing. It is a “must read”
for anyone focused on learning modern test issues, test research, and test practices.
Kewal K. Saluja,
University of Wisconsin-Madison
Design for testability (DFT) can no longer be considered as a graduate-level course. With
growing design starts worldwide, DFT must be also part of the undergraduate curricu-
lum. The book’s focus on VLSI test principles and DFT architectures, while deemphasizing
test algorithms, is an ideal choice for undergraduate education. In addition, system-on-
chip (SOC) testing is one among the most important technologies for the development of
ultra-large-scale integration (ULSI) devices in the 21st century. By covering the basic DFT
theory and methodology on digital, memory, as well as analog and mixed-signal (AMS) test-
ing, this book further stands out as one best reference book that equips practitioners with
testable SOC design skills.
Yihe Sun,
Tsinghua University, Beijing, China
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VLSI T
EST
P
RINCIPLES AND
A
RCHITECTURES
The Morgan Kaufmann Series in Systems on Silicon
Series Editor: Wayne Wolf, Princeton University
The rapid growth of silicon technology and the demands of applications are increasingly forcing
electronics designers to take a systems-oriented approach to design. This has led to new challenges
in design methodology, design automation, manufacture and test. The main challenges are to
enhance designer productivity and to achieve correctness on the first pass.
The Morgan Kaufmann
Series in Systems on Silicon
presents high-quality, peer-reviewed books authored by leading experts
in the field who are uniquely qualified to address these issues.
The Designer’s Guide to VHDL, Second Edition
Peter J. Ashenden
The System Designer’s Guide to VHDL-AMS
Peter J. Ashenden, Gregory D. Peterson, and Darrell A. Teegarden
Readings in Hardware/Software Co-Design
Edited by Giovanni De Micheli, Rolf Ernst, and Wayne Wolf
Modeling Embedded Systems and SoCs
Axel Jantsch
ASIC and FPGA Verification: A Guide to Component Modeling
Richard Munden
Multiprocessor Systems-on-Chips
Edited by Ahmed Amine Jerraya and Wayne Wolf
Comprehensive Functional Verification
Bruce Wile, John Goss, and Wolfgang Roesner
Customizable Embedded Processors: Design Technologies and Applications
Edited by Paolo Ienne and Rainer Leupers
Networks on Chips: Technology and Tools
Giovanni De Micheli and Luca Benini
Designing SOCs with Configured Cores: Unleashing the Tensilica Diamond Cores
Steve Leibson
VLSI Test Principles and Architectures: Design for Testability
Edited by Laung-Terng Wang, Cheng-Wen Wu, and Xiaoqing Wen
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