54LS113Dual JK Edge-Triggered Flip-FlopGeneral Des criptionThe 54LS113 offers individual J, K, Set and Clock inputs.When the clock goes HIGH the inputs are enabled and datamay be entered. The logic level of the J and K inputs maybe changed when the clock pulse is HIGH and the bistablewill perform according to the Truth Table as long as minimumsetup and hold times are observed. Input data is transferredto the outputs on the falling edge of the clock pulse.
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