Continuing advances in chip technology, such as the ability to place more
ransistors on the same die (together with increased operating speeds) have
opened new opportunities in embedded applications, breaking new ground in
he domains of communication, multimedia, networking and entertainment.
New consumer products, together with increased time-to-market pressures have
created the need for rapid exploration tools to evaluate candidate architectures
or System-On-Chip (SOC) solutions. Such tools will facilitate the introduction
of new products customized for the market and reduce the time-to-market for
such products.
While the cost of embedded systems was traditionally dominated by the
circuit production costs, the burden has continuously shifted towards the design
process, requiring a better design process, and faster turn-around time. In
he context of programmable embedded systems, designers critically need the
ability to explore rapidly the mapping of target applications to the complete
system. Moreover, in today’s embedded applications, memory represents a
major bottleneck in terms of power, performance, and cost.
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