Designing an efficient LTE-Advanced
modem architecture with
®
ARM Cortex™-R7 MPCore™ and
CEVA XC4000 processors
David Maidment - Mobile Segment Manager, ARM
Chris Turner - Senior Product Manager, ARM
Eyal Bergman – VP Product Marketing, Baseband &
Connectivity, CEVA Inc.
November 2012
Copyright © 2008 ARM Limited. All rights reserved.
The ARM logo is a registered trademark of ARM Ltd.
The CEVA logo is a registered trademark of CEVA,Inc.
All other trademarks are the property of their respective owners and are acknowledged
Page 1 of 13
Introduction
LTE (Long Term Evolution) is already gaining momentum as the world’s most rapidly deployed cellular
technology, giving mobile wireless broadband services to millions of users worldwide. Consumers are increasingly
looking for always on, always connected mobile experience delivering high data rate services on small form factor
mobile devices whilst at the same time expecting long battery life to minimize recharge cycles. To meet this ever
growing demand for mobile data, the LTE standard has been extended to offer higher throughputs and greater
efficiencies for mobile operators to offer these services. LTE-Advanced represents the next generation mobile
broadband, and in turn throws the challenge to the designers to create highly power efficient mobile devices capable
of delivering these services. ARM, the leading supplier of embedded processors, physical IP and inter-connect
fabric, along with CEVA, Inc. the leading supplier of embedded DSP cores propose a joint analysis looking at the
design considerations that are required to realize the next generation of mobile wireless broadband devices.
This paper sets out by examining 3GPP release 10 standard (referred hereafter as LTE-A) which was ratified in
March 2011 and is in turn driving the latest generation of user equipment designs. After looking at the standard we
then develop an understanding of the particular design challenges in managing the constraints of throughput, low
latency and low power consumption by presenting an industry leading solution which combines the high performing
yet extremely power efficient technologies delivered today by ARM and CEVA.
Finally, and by way of a conclusion, we also look at wider system level design such as power saving modes, debug
and trace along with the support of multi-mode operation which has become an essential feature given the wide and
diverse adoption of wireless standards worldwide addressing not only LTE-A and LTE but also HSPA+, TD-
SCDMA and other wireless technologies.
What is LTE-Advanced?
The LTE (Long-Term Evolution) standard was first ratified by 3GPP in Release-8 at December 2008 and was
conceived to provide wireless broadband access using an entirely packet based protocol and was the basis for the
first wave of LTE equipment. LTE has now been adopted by over 347 carriers in 104 countries (Ref GSA)
including such territories as USA, Japan, Korea and China to name but a few,making it the fastest adopted wireless
technology in history.
The wide adoption of LTE is thanks in part to the flexibility of the standard to accommodate disperse requirements
from network operators worldwide. LTE is the first standard having the potential to become a unified global
standard for mobile by converging different 3G and 4G networks into a common 4G platform. With licensed
spectrum becoming an increasingly valuable commodity, LTE brings the ability to deploy mobile wireless
broadband in a wide range of spectrum blending. Coupled with its spectral aggregation flexibility, LTE was also
specified to include advanced signal processing techniques designed to increase its spectral efficiency of the
transmission channel i.e. the bits/second/Hz that the channel can carry with a reasonable error rate. Techniques such
as OFDMA and SC-OFDM modulations, advanced Forward Error Correction (FEC), various MIMO techniques
(Multi-antenna systems) and re-transmission schemes like ARQ and H-ARQ are all combined to give the system a
robust and efficient use of the limited available spectrum. These advanced technologies all demand high levels of
signal processing and as such demand careful design in order to minimize power consumption (battery life) and
maximize performance, both in terms of high throughput and reliable signal reception.
The continued evolution of LTE has been driven by consumer demand for higher bandwidth broadband connections
(e.g. watching streaming video), lower latency connections (e.g. gaming applications) along with the need to deploy
spectrum in a more optimized and efficient manner to allow network operators to maximize their return on
Copyright © 2012 CEVA Inc. All rights reserved.
The ARM logo is a registered trademark of ARM Limited.
The CEVA logo is a registered trademark of CEVA,Inc.
All other trademarks are the property of their respective owners and are acknowledged
Page 2 of 13
investment. This trend is expected to continue during the next five years and Cisco projects an 18-Fold growth in
mobile internet data traffic from 2011 to 2016 [1].
LTE-Advanced relates to the latest version of 3GPP standard, release 10 and beyond. This standard builds upon the
existing LTE Release 8 standard and maintains backward compatibility. A number of new features have been added
to LTE-Advanced that allow the requirements outlined above to be met, and crucially it also conforms to the formal
definition of a 4G wireless technology as mandated by the ITU. The new features that are of particular interest for
the purposes of this paper are: carrier aggregation, multi-layer MIMO and system considerations for high throughput
such as HARQ buffer access and system interconnect. Both the carrier aggregation and multi-layer MIMO allow
dramatic increase in throughput and also bring new signal processing demands to the digital baseband.
There have been several public announcements in recent months from network operators stating their intent to
support LTE-Advanced features in the 2013 timeframe. These include AT&T Mobility and Sprint in the USA, with
KT Telecom in Korea and DoCoMo in Japan also considering adopting the technology as an upgrade to their
commercial LTE networks..
Table 1 below shows the 3GPP UE class definition as defined in Release 10 of the standard. As can be seen, there
are a broad range of classes that allow the equipment manufacturer to offer products depending upon end
applications and markets. It is generally regarded that although Cat-8 (UE Category 8) profile has the high
throughput headlines that capture the market attention, in reality it will be very difficult to deploy this in reality as it
requires up to 100MHz of bandwidth (LTE networks are currently deployed in 10MHz to 20MHz) – something no
individual operator has access to today. Looking from a more pragmatic standpoint and for the purposes of this
paper we will instead elect to look at the UE Cat-7 requirements, a use case which is expected to be widely adopted.
UE
category
Data rate
(DL/UL)
[Mbps]
DL
Max. num. of
DL-SCH
TBbits
per TTI
UL
Max. num.
of UL-SCH
TB bits per
TTI
Max. num. of
DL-SCH bits
per TB
per TTI
Total num. of
soft channel
bits
Max.
num. of
spatial
layers
Max. num.
of UL-SCH
bits
per TB
per TTI
5,160
25,456
51,024
51,024
75,376
51,024
Support
for
64QAM
1
2
3
4
5
6
10/5
50/25
100/50
150/50
300/75
300/50
10,296
51,024
102,048
150,752
299,552
301,504
10,296
51,024
75,376
75,376
149,776
149,776
(4 layers)
75,376
(2 layers)
149,776
(4 layers)
75,376
(2 layers)
299,856
250,368
1,237,248
1,237,248
1,827,072
3,667,200
3,654,144
1
2
2
2
4
2 or 4
*1
5,160
25,456
51,024
51,024
75,376
51,024
No
No
No
No
Yes
No
7
300/100
301,504
2 or 4
3,654,144
102,048
51,024
No
8
3000/1500
2,998,560
35,982,720
8
1,497,760
149,776
Yes
Table 1 – LTE UE Class Types
Copyright © 2012 CEVA Inc. All rights reserved.
The ARM logo is a registered trademark of ARM Limited.
The CEVA logo is a registered trademark of CEVA,Inc.
All other trademarks are the property of their respective owners and are acknowledged
Page 3 of 13
Diagram 1 – User Equipment Top Level Block Diagram
The above block diagram shows a simplified representation of how an LTE-Advanced modem would connect within
a Smartphone design and provides context setting for the modem design discussed in this white paper
The LTE-Advanced modem consists of receive and transmit signal processing chains which serve the radio interface
via a wideband RF transceiver IC. The signal processing is divided into layers as defined in the 3GPP specification,
with layer 1 providing all of the low level signal conditioning concerned with the successful transmission and
reception of the signal. Typical functions in Layer 1 include: forward error correction, interleaving and bit stream
manipulation, constellation-modulation, MIMO encoding, OFDM signal modulation, and RFIC signal conditioning.
All of the Layer 1 functions described fall within the domain of the CEVA processor with a need for control and
management functions to be implemented on an ARM CPU.
Upper layer processing is performed in the ARM Cortex-R7 processor and is represented by Layers 2 and 3 in the
above diagram. The ARM Cortex processor will typically perform functions such as Medium Access Control
(MAC), Packet Data Convergence Protocol (PDCP), Radio Link Control (RLC) and Radio Resource Management
(RRM). The ARM Cortex-R7 processor interfaces to the applications processor which is running the rich OS such
as Android.
Copyright © 2012 CEVA Inc. All rights reserved.
The ARM logo is a registered trademark of ARM Limited.
The CEVA logo is a registered trademark of CEVA,Inc.
All other trademarks are the property of their respective owners and are acknowledged
Page 4 of 13
Overview of the ARM Cortex-R7 processor
Cortex-R real-time processors offer the requisite high performance, deterministic response time and excellent energy
efficiency that is required for 3.9G/LTE and 4G/LTE-Advance baseband tasks. Their ability to deliver the advanced
compute performance for high throughput/low latency wireless systems coupled with advanced low power design
makes them the leading choice in modem designs.
Features of the Cortex-R7 processor that are particularly relevant to LTE-Advanced baseband architecture as
follows:
High Performance: Cortex-R7 processor provides 2.53 DMIPS/MHz, which meets the most demanding
baseband processing requirements.
Coherency: Cortex-R7 processor contain a Snoop Control Unit(SCU) which automatically maintains
coherency between modem data fed into memory and the processors’ data cache. This can save
considerable software overhead as well as provision for coherency between the two processors.
Low-Latency Peripheral Port (LLPP): An additional AXI bus port specifically purposed for fast control of
modem hardware without being blocked by large data transactions on the main AXI bus.
Low-Latency RAM (LLRAM): An area of memory used to hold critical software and data such as Interrupt
Service Routines (ISR) that can be executed almost immediately without waiting for main AXI bus
transactions to finish and/or for the ISR to be fetched into level-1 cache.
Tightly-Coupled Memory (TCM): A limited (128 KB) memory resource for the most critical code and data
that can be accessed without the latency incurred by an AXI bus port. This provides for the highest level of
deterministic response to real-time hardware such as an LTE L1 physical layer.
Integrated Generic Interrupt Controller (GIC): Allows flexible interrupt distribution and rapid interrupts
between the processors e.g. routing from air interface/CEVA domain to ARM.
Low-latency interrupt mode: An interrupt mode particular to the Cortex-R processor family which takes
interrupts in as few as 20 cycles e.g. for time critical air frame processing.
Asymmetric Multi-Processing (AMP): Whilst the Cortex-R7 processor supports Symmetric Multi-
Processing (SMP), there is also provision for configuring the Quality of Service (QoS) within the SCU
block such that each processor can have priority of access to a select range of memory and I/O addresses,
and not be blocked by the other processor.
Diagram 2 – ARM Cortex-R7 Block Diagram
Copyright © 2012 CEVA Inc. All rights reserved.
The ARM logo is a registered trademark of ARM Limited.
The CEVA logo is a registered trademark of CEVA,Inc.
All other trademarks are the property of their respective owners and are acknowledged
Page 5 of 13
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