下载中心>资源分类>应用技术>人工智能>Non-Volatile In-Memory Computing by Spintronics

pdf

Non-Volatile In-Memory Computing by Spintronics

1星
2021-01-07
2.2MB
需要1积分
2次下载

文档简介
猜您喜欢
用户评论0

标签： Spintronics 内存计算非易失存储

《Non-Volatile In-Memory Computing by Spintronics》

作者：Hao Yu，Leibin Ni，Yuhao Wang

Exa-scale computing needs to re-examine the existing hardware platform that can support intensive data-oriented computing. Since the main bottleneck is from memory, we aim to develop an energy-efficient in-memory computing platform in this book. First, the models of spin-transfer torque magnetic tunnel junction and racetrack memory are presented. Next, we show that the

spintronics could be a candidate for future data-oriented computing for storage, logic, and interconnect. As a result, by utilizing spintronics, in-memory-based computing has been applied for data encryption and machine learning. e implementations of in-memory AES, Simon cipher, as well as interconnect are explained in details. In addition, in-memory-based machine learning

and face recognition are also illustrated in this book.

Non-Volatile In-Memory

Computing by Spintronics

Hao Yu

Nanyang Technological University, Singapore

Leibin Ni

Nanyang Technological University, Singapore

Yuhao Wang

Synopsis, California, USA

SYNTHESIS LECTURES ON EMERGING ENGINEERING

TECHNOLOGIES #8

Morgan

cLaypool publishers

Non-Volatile In-Memory Computing by Spintronics

Hao Yu, Leibin Ni, and Yuhao Wang

www.morganclaypool.com

ISBN: 9781627052948

ISBN: 9781627056441

paperback

ebook

DOI 10.2200/S00736ED1V01Y201609EET008

A Publication in the Morgan & Claypool Publishers series

SYNTHESIS LECTURES ON EMERGING ENGINEERING TECHNOLOGIES

Lecture #8

Series Editor: Kris Iniewski,

Redlen Technologies, Inc.

Series ISSN

Print 2381-1412 Electronic 2381-1439

ABSTRACT

Exa-scale computing needs to re-examine the existing hardware platform that can support inten-

sive data-oriented computing. Since the main bottleneck is from memory, we aim to develop an

energy-eﬃcient in-memory computing platform in this book. First, the models of spin-transfer

torque magnetic tunnel junction and racetrack memory are presented. Next, we show that the

spintronics could be a candidate for future data-oriented computing for storage, logic, and inter-

connect. As a result, by utilizing spintronics, in-memory-based computing has been applied for

data encryption and machine learning. e implementations of in-memory AES, Simon cipher,

as well as interconnect are explained in details. In addition, in-memory-based machine learning

and face recognition are also illustrated in this book.

KEYWORDS

Spintronics, in-memory computing, non-volatile memory, logic-memory integra-

tion, data encryption, AES, machine learning, data analytics, hardware accelerator

Contents

Preface

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Introduction

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1.1

1.2

Memory Wall . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Traditional Semiconductor Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

1.2.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

1.2.2 Nano-scale Limitations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Non-volatile Spintronic Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

1.3.1 Basic Magnetization Process . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

1.3.2 Magnetization Damping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

1.3.3 Spin-transfer Torque . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

1.3.4 Magnetization Dynamics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

1.3.5 Domain Wall Propagation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Traditional Memory Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Non-volatile In-memory Computing Architecture . . . . . . . . . . . . . . . . . . . . . . . 25

References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

1.3

1.4

1.5

1.6

Non-volatile Spintronic Device and Circuit

. . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.1

SPICE Formulation with New Nano-scale NVM Devices . . . . . . . . . . . . . . . . 31

2.1.1 Traditional Modiﬁed Nodal Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

2.1.2 New MNA with Non-volatile State Variables . . . . . . . . . . . . . . . . . . . . . 33

STT-MTJ Device and Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

2.2.1 STT-MTJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

2.2.2 STT-RAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

2.2.3 Topological Insulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

Domain Wall Device and Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

2.3.1 Magnetization Reversal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51

2.3.2 MTJ Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53

2.3.3 Domain Wall Propagation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53

2.3.4 Circular Domain Wall Nanowire . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54

2.2

2.3

2.4

2.5

2.6

2.7

Spintronic Storage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57

2.4.1 Spintronic Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57

2.4.2 Spintronic Readout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57

Spintronic Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61

2.5.1 XOR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61

2.5.2 Adder . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63

2.5.3 Multiplier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64

2.5.4 LUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64

Spintronic Interconnect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65

2.6.1 Coding-based Interconnect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65

2.6.2 Domain Wall-based Encoder/Decoder . . . . . . . . . . . . . . . . . . . . . . . . . . 68

2.6.3 Performance Evaluation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72

References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74

In-memory Data Encryption

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.1

In-memory Advanced Encryption Standard . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81

3.1.1 Fundamental of AES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81

3.1.2 Domain Wall Nanowire-based AES Computing . . . . . . . . . . . . . . . . . . . 83

3.1.3 Pipelined AES by Domain Wall Nanowire . . . . . . . . . . . . . . . . . . . . . . . 92

3.1.4 Performance Evaluation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97

Domain Wall-based SIMON Block Cipher . . . . . . . . . . . . . . . . . . . . . . . . . . . 102

3.2.1 Fundamental of SIMON Block Cipher . . . . . . . . . . . . . . . . . . . . . . . . . 103

3.2.2 Hardware Stages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103

3.2.3 Round Counter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103

3.2.4 Control Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105

3.2.5 Key Expansion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105

3.2.6 Encryption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106

3.2.7 Performance Evaluation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106

References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108

3.2

3.3

In-memory Data Analytics

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

111

4.1

In-memory Machine Learning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111

4.1.1 Extreme Learning Machine . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111

4.1.2 MapReduce-based Matrix Multiplication . . . . . . . . . . . . . . . . . . . . . . . 112

4.1.3 Domain Wall-based Hardware Mapping . . . . . . . . . . . . . . . . . . . . . . . . 113

4.1.4 Performance Evaluation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116

In-memory Face Recognition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121

4.2

展开预览

猜您喜欢

上传者

: sigma; 查看他的其他资源

TI 文字链专区

举报人：
被举报人：	sigma
举报的资源分：	1
* 类型：
	请您提供公司营业执照和软件相关版权到service@eeworld.com.cn
* 详细原因：

Non-Volatile In-Memory Computing by Spintronics

文档简介

评论

汽车 模拟

汽车模拟