The '197 ripple counter contains divide-by-two and divideby-eight sections which can be combined to form a modulo-16 binary counter. State changes are initiated by the fallingedge of the clock. The '197 has a Master Reset (MR) inputwhich overrides all other inputs and asynchronously forcesall outputs LOW. A Parallel Load input (PL) overridesclocked operations and asynchronously loads the data onthe Parallel Data inputs (Pn) into the flip-flops. This presetfeature makes the circuit usable as a programmable counter.The circuit can also be used as a 4-bit latch, loadingdata from the Parallel Data inputs when PL is LOW andstoring the data when PL is HIGH.
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