《Advanced Electronic Design Automation -Examples of VHDL Descriptions》-
Author: Ian Elliott of Northumbria University
包含以下几个分类的设计实例的代码，共67个例子
Combinational Logic
Counters
Shift Registers
Memory
State Machines
Registers
Systems
ADC and DAC
Arithmetic
Combinational Logic
l Exclusive-OR Gate (Dataflow style)
l Exclusive-OR Gate (Behavioural style)
l Exclusive-OR Gate (Structural style)
l Miscell aneous Logic Gates
l Three-input Majority Voter
l Magnitude Comparator
l Quad 2-input Nand (74x00)
l BCD to Seven Segment Decoder
l Dual 2-to-4 Decoder
l Octal Bus Transceiver
l Quad 2-input OR
l 8-bit Identity Comparator
l Hamming Encoder
l Hamming Decoder
l 2-to-4 Decoder with Testbench and Configuration
l Multiplexer 16-to-4 using Selected Signal Assignment Statement
l Multiplexer 16-to-4 using Conditional Signal Assignment Statement
l Multiplexer 16-to-4 using if-then-elsif-else Statement
l M68008 Address Decoder
l Highest Priority Encoder
l N-input AND Gate
Counters
l Counter using a Conversion Function
l Generated Binary Up Counter
l Counter using Multiple Wait Statements
l Synchronous Down Counter with Parallel Load
l Mod-16 Counter using JK Flip-flops
l Pseudo Random Bit Sequence Generator
l Universal Counter/Register
l n-Bit Synchronous Counter
Shift Registers
l Universal Shift Register/Counter
l TTL164 Shift Register
l Behavioural description of an 8-bit Shift Register
l Structural Description of an 8-bit Shift Register
Memory
l ROM-based Waveform Generator
l A First-in First-out Memory
l Behavioural model of a 16-word, 8-bit Random Access Memory
l Behavioural model of a 256-word, 8-bit Read Only Memory
State Machines
l Classic 2-Process State Machine and Test Bench
l State Machine using Variable
l State Machine with Asynchronous Reset
l Pattern Detector FSM with Test Bench
l State Machine with Moore and Mealy outputs
l Moore State Machine with Explicit State encoding
l Mealy State Machine with Registered Outputs
l Moore State Machine with Concurrent Output Logic
Systems
l Pelican Crossing Controller
l Simple Microprocessor System
l Booth Multiplier
l Lottery Number Generator
l Digital Delay Unit
l Chess Clock
ADC and DAC
l Package defining a Basic Analogue type
l 16-bit Analogue to Digital Converter
l 16-bit Digital to Analogue Converter
l 8-bit Analogue to Digital Converter
l 8-bit Unipolar Successive Approximation ADC
Examples of VHDL Descriptions
Arithmetic
l 8-bit Unsigned Multiplier
l n-bit Adder using the Generate Statement
l A Variety of Adder Styles
l Booth Multiplier
Registers
l Universal Register
l Octal D-Type Register with 3-State Outputs
l Quad D-Type Flip-flop
l 8-bit Register with Synchronous Load and Clear
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