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FPGA资源专题（六）源码集锦

为什么要学习FPGA？
FPGA从诞生以来经历了从配角到主角的转变，FPGA主要用于取代复杂的逻辑电
路，现在重点强调平台概念，当集成数字信号处理器、嵌入式处理器、高速串行和其它高端技术后，从而被应用到更多的领域，正因为其飞速的发展，让更多学FPGA的人看到了希望，其广阔的前景正是我们选择的原因之一。
（1）广阔的发展前景
2）更多的就业机会
（3）更大的技术发展空间
3.如何学习FPGA？
（1）掌握FPGA的编程语言
（2）一个易学易用的硬件平台是成功的一半
（3）技术的巩固和升华
综上所述，我们只有了解了什么是FPGA，为什么要学习FPGA，怎么学习FPGA后，我们才能非常有目的、有计划地学习和掌握这门技术。
基于上述，我们整理掉了这个FPGA系列专题，目的是为了帮助大家搜集更多的FPGA学习资源，使大家能够花费更少的力气，获得更多的学习机会。

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FPGA资源专题（六）源码集锦文档列表

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从零开始走进FPGA-例程汇总: 标签：FPGA 例程; 积分：1 类型：源码上传者：tiankai001上传时间：2013-04-23; 简介：从零开始走进FPGA-例程汇总

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fpga很有价值的27实例: 标签：TI; 积分：1 类型：应用文档上传者：chen8710上传时间：2013-05-11; 简介：fpga很有价值的27实例

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28个FPGA应用开发代码实例: 标签：28个FPGA应用开发代码实例; 积分：1 类型：源码上传者：论文帝上传时间：2013-07-01; 简介：28个FPGA应用开发代码实例

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一个项目工程fpga-dm9000a: 标签：fpga dm9000a; 积分：1 类型：源码上传者：tourlet上传时间：2013-11-06; 简介：一个项目工程，硬件包含XINLINX FPGA，配置FLASH，串口，SDRAM,与以太网芯片DM9000A，实现数据采集，以太网传输，电路验证完全正确，请放心使用，SPARTAN 3E 的BGA引脚320个，不容易布板，可以参考使用的。要FPGA实现网络通信也可以参考电路，B因为产品升级了所以公开原来的电路的。

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国外的开源FPGA挖矿开源代码(纯搬运): 标签：FPGA; 积分：1 类型：源码上传者：论文帝上传时间：2013-07-01; 简介：Open-Source-FPGA-Bitcoin-Miner-master .....................................\.gitignore .....................................\LICENSE.txt .....................................\README.md .....................................\boards .....................................\......\DE2_115 .....................................\......\.......\DE2_115.qsf .....................................\......\.......\DE2_115.sdc .....................................\......\README.md .....................................\cores .....................................\.....\README.md .....................................\.....\crc .....................................\.....\...\crc32.v .....................................\.....\...\crc32_tb.v .....................................\.....\...\simulate.sh .....................................\.....\cyclone_iv_pll .....................................\.....\..............\hashing_pll.v .....................................\.....\unoptimized .....................................\.....\...........\README.md .....................................\.....\...........\sha-256-functions.v .....................................\.....\...........\sha256_transform.v .....................................\.....\unoptimized_virtual_wire_top.v .....................................\.....\virtual_wire .....................................\.....\............\virtual_wire.v .....................................\projects .....................................\........\3C120_uart_comm_Test .....................................\........\....................\3C120_uart_comm_Test.qpf .....................................\........\....................\3C120_uart_comm_Test.qsf .....................................\........\....................\README.md .....................................\........\....................\constraints .....................................\........\....................\...........\3C120.sdc .....................................\........\....................\hdl .....................................\........\....................\...\3C120_uart_comm_Test.v .....................................\........\....................\...\main_pll.v .....................................\........\....................\stp1.stp .....................................\........\....................\working .....................................\........\....................\.......\.gitignore .....................................\........\BeMicro .....................................\........\.......\README.md .....................................\........\.......\fpgaminer.qpf .....................................\........\.......\fpgaminer.qsf .....................................\........\.......\fpgaminer.sdc .....................................\........\.......\src .....................................\........\.......\...\fpgaminer_top.v .....................................\........\DE2_115_NIOS_Ethernet_Test .....................................\........\..........................\.gitignore .....................................\........\..........................\README.md .....................................\........\..........................\software .....................................\........\..........................\........\fpgaminer_controller .....................................\........\..........................\........\....................\main.c .....................................\........\..........................\........\....................\socket.c .....................................\........\..........................\........\....................\socket.h .....................................\........\..........................\........\....................\stdint.h .....................................\........\..........................\........\....................\w5100.c .....................................\........\..........................\........\....................\w5100.h .....................................\........\..........................\src .....................................\........\..........................\...\.gitignore .....................................\........\..........................\...\fpgaminer_top.v .....................................\........\DE2_115_Unoptimized_Pipelined .....................................\........\.............................\README.md .....................................\........\.............................\fpgaminer.qpf .....................................\........\.............................\fpgaminer.qsf .....................................\........\DE2_115_makomk_mod .....................................\........\..................\README.md .....................................\........\..................\fpgaminer.qpf .....................................\........\..................\fpgaminer.qsf .....................................\........\..................\fpgaminer.sdc .....................................\........\..................\fpgaminer_top.v .....................................\........\..................\main_pll.v .....................................\........\..................\sha256_transform.v .....................................\........\DE2_115_makomk_serial .....................................\........\.....................\EP4CE115F29.bsd .....................................\........\.....................\README.md .....................................\........\.....................\fpgaminer.qsf .....................................\........\.....................\fpgaminer.svf .....................................\........\.....................\fpgaminer_top.v .....................................\........\.....................\hexdisp_de2.v .....................................\........\.....................\main_pll.v .....................................\........\.....................\miner.py .....................................\........\.....................\program.sh .....................................\........\.....................\quartus_output .....................................\........\.....................\..............\fpgaminer.sof .....................................\........\.....................\serial.v .....................................\........\.....................\sha256_transform.v .....................................\........\DE2_70_Unoptimized_Pipelined .....................................\........\............................\README.md .....................................\........\............................\fpgaminer.qpf .....................................\........\............................\fpgaminer.qsf .....................................\........\............................\fpgaminer.sdc .....................................\........\............................\main_pll.v .....................................\........\KC705_experimental .....................................\........\..................\.gitignore .....................................\........\..................\KC705_experimental.data .....................................\........\..................\.......................\constrs_1 .....................................\........\..................\.......................\.........\designprops.xml .....................................\........\..................\.......................\.........\fileset.xml .....................................\........\..................\.......................\.........\usercols.xml .....................................\........\..................\.......................\hw .....................................\........\..................\.......................\..\hwsession_1.xml .....................................\........\..................\.......................\runs

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基于Quartus II FPGA/CPLD数字系统设计实例（VHDL源代码文件）: 标签：FPGA QUARTUS II CPLD VHDL源代码; 积分：1 类型：应用文档上传者：mamselc上传时间：2013-09-22; 简介：　　本资料是关于基于Quartus II FPGA/CPLD数字系统设计实例（VHDL源代码文件），需要的可以自己下载。

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电子设计大赛作品_音频信号分析仪的FPGA源码(一等奖): 标签：电子设计大赛作品_音频信号分析仪的FPGA源码一等奖; 积分：1 类型：应用文档上传者：crazyjackson上传时间：2014-03-05; 简介：电子设计大赛作品_音频信号分析仪的FPGA源码(一等奖)

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FPGA资源优化和代码优化: 标签：FPGA资源优化代码优化; 积分：1 类型：应用文档上传者：tangtest2012上传时间：2013-10-28; 简介：FPGA资源优化和代码优化，很好的资料。推荐

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基于FPGA的测频测相代码: 标签：测频测相; 积分：5 类型：源码上传者：abc123ljx6上传时间：2014-11-17; 简介：详细讲述了测频测相的VERILOG程序代码

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FPGA教学资源，包括几十个教学实验程序，主芯片为EP2C8Q208C8: 标签：教学教学资源资源包括教学; 积分：1 类型：源码上传者：论文帝上传时间：2013-07-01; 简介：4.1DECODER_3_8\decoder_3_8.qar ..2ENCODER_8_3\encoder_8_3.qar ..3Hex7S_s\Hex7S_s.qar ..4Hex7S_d\Hex7S_d.qar ..5MUX_4\MUX_4.qar ..6COMPARE\COMPARE.qar ..7ADDER_4\ADDER_4.qar ..8ADD_SUB_4\ADD_SUB_4.qar 5.1D_FF\D_FF.qar ..2REG\REG.qar ..3SHIFT_R\SHIFT_R.qar ..4 COUNTER\COUNTER.qar ..5 FRE_D\FRE_D.qar ..6SEQDET\SEQDET.qar 6.1vga\vga.qar ..2OLED\cyc2_cii51008.pdf .......\Driver IC for VGF160128.pdf .......\oled.qar .......\QT00-D07049-1H-001_VGF160128B-S001产品规格书_A00.pdf ..3PS_mouse\manage_data.qar ...........\PS2鼠标接口控制器实验演示操作步骤.doc ..4PS2_keyboard\ps2_keyboard.qar ..5UART-RS232\UART.qar ..6sd_core\sd_core.qar ..........\stp1.stp ..........\说明.txt ..7Audio_Interface_TCP\Audio_Interface_TCP.qar 7.1ROM\sinwave.qar ..2SRAM\sram_ctrl.qar ..3Flash\test_norflash.qar ..4FIFO\FIFO.qar 8.1digit_clock\clock.qar ..2light_LAMP\auto_button.bmp .............\congratulations.bmp .............\failure.bmp .............\light.bmp .............\maker.bmp .............\mouse_ps2.qar .............\name.bmp .............\number.bmp .............\play_button.bmp .............\set_button.bmp .............\说明.txt ..3SOUND_REC_PLY_TCP\SOUND_REC_PLY.qar ....................\录放音实验指导书TCP.doc 9.1SOPC\EP3C16_SOPC.qar .......\software\.metadata\.lock .......\........\.........\.log .......\........\.........\.plugins\com.altera.nj.ui\dialog_settings.xml .......\........\.........\........\org.eclipse.cdt.core\.log .......\........\.........\........\....................\hello_world_0.1249266605281.pdom .......\........\.........\........\....................\hello_world_0_syslib.1249266604781.pdom .......\........\.........\........\................make.core\.log .......\........\.........\........\.........................\hello_world_0.sc .......\........\.........\........\.........................\hello_world_0_syslib.sc .......\........\.........\........\.........................\specs.c .......\........\.........\........\.........................\specs.cpp .......\........\.........\........\.....................ui\dialog_settings.xml .......\........\.........\........\................ui\dialog_settings.xml .......\........\.........\........\.............ore.resources\.history\3f\e06c8b8dd57f001e185ab4fd38f06b60 .......\........\.........\........\..........................\........\7c\f022898dd57f001e185ab4fd38f06b60 .......\........\.........\........\..........................\........\8c\419bd73cd87f001e185ab4fd38f06b60 .......\........\.........\........\..........................\........\a7\409bd73cd87f001e185ab4fd38f06b60 .......\........\.........\........\..........................\........\..\f0f1fd19d87f001e185ab4fd38f06b60 .......\........\.........\........\..........................\........\c6\10e4de8dd57f001e185ab4fd38f06b60 .......\........\.........\........\..........................\........\d1\1055e18dd57f001e185ab4fd38f06b60 .......\........\.........\........\..........................\........\.a\11e4de8dd57f001e185ab4fd38f06b60 .......\........\.........\........\..........................\........\ee\e16c8b8dd57f001e185ab4fd38f06b60 .......\........\.........\........\..........................\.projects\hello_world_0\.indexes\33\history.index .......\........\.........\........\..........................\.........\.............\........\af\history.index .......\........\.........\........\..........................\.........\.............\........\properties.index .......\........\.........\........\..........................\.........\............._syslib\.indexes\33\history.index .......\........\.........\........\..........................\.........\....................\........\af\history.index .......\........\.........\........\..........................\.........\....................\........\properties.index .......\........\.........\........\..........................\.root\.indexes\history.version .......\........\.........\........\..........................\.....\........\properties.index .......\........\.........\........\..........................\.....\........\properties.version .......\........\.........\........\..........................\.....\1.tree .......\........\.........\........\..........................\.safetable\org.eclipse.core.resources .......\........\.........\........\..................untime\.settings\org.eclipse.cdt.debug.core.prefs .......\........\.........\........\........................\.........\org.eclipse.cdt.managedbuilder.core.prefs .......\........\.........\........\........................\.........\org.eclipse.cdt.ui.prefs .......\........\.........\........\........................\.........\org.eclipse.core.resources.prefs .......\........\.........\........\........................\.........\org.eclipse.ui.editors.prefs .......\........\.........\........\........................\.........\org.eclipse.ui.ide.prefs .......\........\.........\........\........................\.........\org.eclipse.ui.prefs .......\........\.........\........\............debug.core\.launches\hello_world_0 Nios II HW configuration.launch .......\........\.........\........\..................ui\launchConfigurationHistory.xml .......\........\.........\........\............ui.ide\dialog_settings.xml .......\........\.........\........\...............workbench\dialog_settings.xml .......\........\.........\........\........................\workbench.xml .......\........\.........\version.ini .......\........\hello_world_0\.cdtbuild .......\........\.............\.cdtproject .......\........\.............\.project .......\........\.............\.settings\org.eclipse.cdt.core.prefs .......\........\.............\.........\org.eclipse.cdt.managedbuilder.core.prefs .......\........\.............\application.stf .......\........\.............\Debug\cfi_flash_0.flash .......\........\.............\.....\generated_app.sh

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xilinx公司FPGA的基于tcl的sdc语法分析代码分享: 标签：tcl sdc; 积分：2 类型：应用文档上传者：zy2112上传时间：2014-05-09; 简介：基于TCL的SDC约束文件语法分享

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FPGA和VHDL的全过程和源码: 标签：FPGA和VHDL的全过程和源码; 积分：1 类型：应用文档上传者：solarelec上传时间：2014-03-05; 简介：FPGA和VHDL的全过程和源码，有助你对FPGA和VHDL的认识和学习！

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FPGA实验源码: 标签：FPGA; 积分：1 类型：源码上传者：k030941503上传时间：2012-12-27; 简介：该FPGA实验代码为VHDL码，与空间中上传的以文档配套

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芯创电子手把手教你学习FPGA—代码规范篇: 标签：手把手教你学习FPGA—代码规范篇; 积分：4 类型：教程及课件上传者：majinzhu上传时间：2013-04-20; 简介：希望看完对你写代码的规范有帮助

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Verilog实例源代码，打牢你FPGA开发基础: 标签：examples; 积分：1 类型：应用文档上传者：nkyqsl上传时间：2013-09-29; 简介： examples王金明：《 Verilog HDL 程序设计教程》【例 3.1】4 位全加器module adder4(cout,sum,ina,inb,cin); output[3:0] sum; output cout; input[3:0] ina,inb; input cin; assign {cout,sum}=ina+inb+cin; endmodule【例 3.2】4 位计数器module count4(out,reset,clk); output[3:0] out; input reset,clk; reg[3:0] out; always @(posedge clk) begin if (reset) else end endmodule out

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FPGA例程包14例资料: 标签：FPGA例程包14例资料; 积分：1 类型：应用文档上传者：莫妮卡上传时间：2013-09-28; 简介：FPGA例程包14例资料

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基于FPGA任意频率波形发生器设计: 标签：基于FPGA任意频率波形发生器设计; 积分：1 类型：应用文档上传者：seudzy上传时间：2013-11-03; 简介：基于FPGA任意频率波形发生器设计

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基于FPGA的CMOS图像传感器（OV7725）显示并保存图像: 标签：fpga 图像图像传感器传感器显示; 积分：1 类型：源码上传者：论文帝上传时间：2013-07-01; 简介：CD1_OV7725_DISPLAY_SAVE .......................\FPGA_CODE .......................\.........\.metadata .......................\.........\.........\.lock .......................\.........\.........\.log .......................\.........\.........\.plugins .......................\.........\.........\........\com.altera.nj.ui .......................\.........\.........\........\................\dialog_settings.xml .......................\.........\.........\........\org.eclipse.cdt.core .......................\.........\.........\........\....................\.log .......................\.........\.........\........\....................\hello_world_0.1335424685213.pdom .......................\.........\.........\........\....................\hello_world_0_syslib.1335424684953.pdom .......................\.........\.........\........\org.eclipse.cdt.make.core .......................\.........\.........\........\.........................\.log .......................\.........\.........\........\.........................\specs.c .......................\.........\.........\........\.........................\specs.cpp .......................\.........\.........\........\org.eclipse.cdt.make.ui .......................\.........\.........\........\.......................\dialog_settings.xml .......................\.........\.........\........\org.eclipse.cdt.ui .......................\.........\.........\........\..................\dialog_settings.xml .......................\.........\.........\........\org.eclipse.core.resources .......................\.........\.........\........\..........................\.history .......................\.........\.........\........\..........................\........\36 .......................\.........\.........\........\..........................\........\68 .......................\.........\.........\........\..........................\........\6f .......................\.........\.........\........\..........................\........\79 .......................\.........\.........\........\..........................\........\a0 .......................\.........\.........\........\..........................\........\b1 .......................\.........\.........\........\..........................\........\b5 .......................\.........\.........\........\..........................\........\c3 .......................\.........\.........\........\..........................\........\e6 .......................\.........\.........\........\..........................\.projects .......................\.........\.........\........\..........................\.root .......................\.........\.........\........\..........................\.....\.indexes .......................\.........\.........\........\..........................\.....\........\history.version .......................\.........\.........\........\..........................\.....\........\properties.index .......................\.........\.........\........\..........................\.....\........\properties.version .......................\.........\.........\........\..........................\.....\6.tree .......................\.........\.........\........\..........................\.safetable .......................\.........\.........\........\..........................\..........\org.eclipse.core.resources .......................\.........\.........\........\org.eclipse.core.runtime .......................\.........\.........\........\........................\.settings .......................\.........\.........\........\........................\.........\org.eclipse.cdt.debug.core.prefs .......................\.........\.........\........\........................\.........\org.eclipse.cdt.ui.prefs .......................\.........\.........\........\........................\.........\org.eclipse.core.resources.prefs .......................\.........\.........\........\........................\.........\org.eclipse.ui.editors.prefs .......................\.........\.........\........\........................\.........\org.eclipse.ui.ide.prefs .......................\.........\.........\........\........................\.........\org.eclipse.ui.prefs .......................\.........\.........\........\org.eclipse.debug.core .......................\.........\.........\........\......................\.launches .......................\.........\.........\........\......................\.........\hello_world_0 Nios II HW configuration.launch .......................\.........\.........\........\org.eclipse.debug.ui .......................\.........\.........\........\....................\dialog_settings.xml .......................\.........\.........\........\....................\launchConfigurationHistory.xml .......................\.........\.........\........\org.eclipse.ui.ide .......................\.........\.........\........\..................\dialog_settings.xml .......................\.........\.........\........\org.eclipse.ui.workbench .......................\.........\.........\........\........................\dialog_settings.xml .......................\.........\.........\........\........................\workbench.xml .......................\.........\.........\version.ini .......................\.........\.sopc_builder .......................\.........\.............\filters.xml .......................\.........\.............\install.ptf .......................\.........\.............\install2.ptf .......................\.........\.............\preferences.xml .......................\.........\CD1_OV7725_DISPLAY_SAVE.asm.rpt .......................\.........\CD1_OV7725_DISPLAY_SAVE.cdf .......................\.........\CD1_OV7725_DISPLAY_SAVE.done .......................\.........\CD1_OV7725_DISPLAY_SAVE.fit.rpt .......................\.........\CD1_OV7725_DISPLAY_SAVE.fit.smsg .......................\.........\CD1_OV7725_DISPLAY_SAVE.fit.summary .......................\.........\CD1_OV7725_DISPLAY_SAVE.flow.rpt .......................\.........\CD1_OV7725_DISPLAY_SAVE.jdi .......................\.........\CD1_OV7725_DISPLAY_SAVE.map.rpt .......................\.........\CD1_OV7725_DISPLAY_SAVE.map.smsg .......................\.........\CD1_OV7725_DISPLAY_SAVE.map.summary .......................\.........\CD1_OV7725_DISPLAY_SAVE.pin .......................\.........\CD1_OV7725_DISPLAY_SAVE.pof .......................\.........\CD1_OV7725_DISPLAY_SAVE.qpf .......................\.........\CD1_OV7725_DISPLAY_SAVE.qsf .......................\.........\CD1_OV7725_DISPLAY_SAVE.sof .......................\.........\CD1_OV7725_DISPLAY_SAVE.sta.rpt .......................\.........\CD1_OV7725_DISPLAY_SAVE.sta.summary .......................\.........\CMOS_Capture.v.bak .......................\.........\CONTROL.v .......................\.........\Curve_Averaging.v.bak .......................\.........\GamaCOR.v.bak .......................\.........\GamaCOR_Bypass.mif .......................\.........\GamaCOR_R.mif .......................\.........\GamaRAM.qip .......................\.........\I2C_CMOS_Config.v.bak .......................\.........\I2C_Controller.v.bak .......................\.........\IP .......................\.........\..\Image_RW .......................\.........\..\........\Image_RW.v .......................\.........\..\........\Image_RW.v.bak .......................\.........\..\........\Image_RW_hw.tcl .......................\.........\..\........\Image_RW_hw.tcl~ .......................\.........\Image_RW_0.v .......................\.........\KEY.v